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Pcie_brige_test
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邱棚 676086060d DCT检查通过 2022-11-21 22:54:44 +08:00
History DCT检查通过 2022-11-21 22:54:44 +08:00
Project Logs for Pcie_Brige_Test 重新设置最小间距为6mil 2022-11-21 17:10:20 +08:00
Project Outputs for Pcie_Brige_Test DCT检查通过 2022-11-21 22:54:44 +08:00
__Previews 重新设置最小间距为6mil 2022-11-21 17:10:20 +08:00
PCIE_Brige_PCB.PcbDoc DCT检查通过 2022-11-21 22:54:44 +08:00
Pcie_Brige_Cfg.SchDoc 重新设置最小间距为6mil 2022-11-21 17:10:20 +08:00
Pcie_Brige_Core.SchDoc 重新设置最小间距为6mil 2022-11-21 17:10:20 +08:00
Pcie_Brige_Test.PrjPcb PCB初始化 2022-11-21 00:10:13 +08:00
Pcie_Brige_Test.PrjPcbStructure first commit 2022-11-20 21:10:53 +08:00
Pcie_Brige_pwr.SchDoc 重新设置最小间距为6mil 2022-11-21 17:10:20 +08:00
Pcie_PCB.PcbLib PCB初始化 2022-11-21 00:10:13 +08:00
pcie_test.SchLib PCB初始化 2022-11-21 00:10:13 +08:00