224 lines
5.1 KiB
C
224 lines
5.1 KiB
C
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2013-07-06 Bernard first version
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* 2015-11-06 zchong support iar compiler
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include "am33xx.h"
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#include "interrupt.h"
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#define AINTC_BASE AM33XX_AINTC_REGS
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#define MAX_HANDLERS 128
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extern volatile rt_uint8_t rt_interrupt_nest;
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/* exception and interrupt handler table */
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struct rt_irq_desc isr_table[MAX_HANDLERS];
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rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
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rt_uint32_t rt_thread_switch_interrupt_flag;
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/**
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* @addtogroup AM33xx
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*/
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/*@{*/
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void rt_dump_aintc(void)
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{
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int k;
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rt_kprintf("active irq %d", INTC_SIR_IRQ(AINTC_BASE));
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rt_kprintf("\n--- hw mask ---\n");
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for (k = 0; k < 4; k++)
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{
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rt_kprintf("0x%08x, ", INTC_MIR(AINTC_BASE, k));
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}
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rt_kprintf("\n--- hw itr ---\n");
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for (k = 0; k < 4; k++)
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{
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rt_kprintf("0x%08x, ", INTC_ITR(AINTC_BASE, k));
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}
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rt_kprintf("\n");
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}
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const unsigned int AM335X_VECTOR_BASE = 0x4030FC00;
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extern void rt_cpu_vector_set_base(unsigned int addr);
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#ifdef __ICCARM__
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extern int __vector;
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#else
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extern int system_vectors;
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#endif
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static void rt_hw_vector_init(void)
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{
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unsigned int *dest = (unsigned int *)AM335X_VECTOR_BASE;
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#ifdef __ICCARM__
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unsigned int *src = (unsigned int *)&__vector;
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#else
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unsigned int *src = (unsigned int *)&system_vectors;
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#endif
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rt_memcpy(dest, src, 16 * 4);
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rt_cpu_vector_set_base(AM335X_VECTOR_BASE);
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}
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/**
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* This function will initialize hardware interrupt
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*/
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void rt_hw_interrupt_init(void)
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{
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/* Reset the ARM interrupt controller */
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INTC_SYSCONFIG(AINTC_BASE) = INTC_SYSCONFIG_SOFTRESET;
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/* Wait for the reset to complete */
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while((INTC_SYSSTATUS(AINTC_BASE)
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& INTC_SYSSTATUS_RESETDONE) != INTC_SYSSTATUS_RESETDONE);
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/* Enable any interrupt generation by setting priority threshold */
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INTC_THRESHOLD(AINTC_BASE) = INTC_THRESHOLD_PRIORITYTHRESHOLD;
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/* initialize vector table */
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rt_hw_vector_init();
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/* init exceptions table */
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rt_memset(isr_table, 0x00, sizeof(isr_table));
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/* init interrupt nest, and context in thread sp */
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rt_interrupt_nest = 0;
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rt_interrupt_from_thread = 0;
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rt_interrupt_to_thread = 0;
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rt_thread_switch_interrupt_flag = 0;
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}
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/**
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* This function will mask a interrupt.
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* @param vector the interrupt number
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*/
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void rt_hw_interrupt_mask(int vector)
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{
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INTC_MIR_SET(AINTC_BASE, vector >> 0x05) = 0x1 << (vector & 0x1f);
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}
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/**
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* This function will un-mask a interrupt.
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* @param vector the interrupt number
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*/
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void rt_hw_interrupt_umask(int vector)
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{
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INTC_MIR_CLEAR(AINTC_BASE, vector >> 0x05) = 0x1 << (vector & 0x1f);
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}
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/**
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* This function will control the interrupt attribute.
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* @param vector the interrupt number
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*/
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void rt_hw_interrupt_control(int vector, int priority, int route)
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{
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int fiq;
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if (route == 0)
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fiq = 0;
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else
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fiq = 1;
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INTC_ILR(AINTC_BASE, vector) = ((priority << 0x02) & 0x1FC) | fiq ;
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}
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int rt_hw_interrupt_get_active(int fiq_irq)
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{
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int ir;
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if (fiq_irq == INT_FIQ)
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{
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ir = INTC_SIR_FIQ(AINTC_BASE) & 0x7f;
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}
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else
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{
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ir = INTC_SIR_IRQ(AINTC_BASE) & 0x7f;
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}
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return ir;
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}
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void rt_hw_interrupt_ack(int fiq_irq)
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{
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if (fiq_irq == INT_FIQ)
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{
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/* new FIQ generation */
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INTC_CONTROL(AINTC_BASE) |= 0x02;
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}
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else
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{
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/* new IRQ generation */
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INTC_CONTROL(AINTC_BASE) |= 0x01;
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}
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}
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/**
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* This function will install a interrupt service routine to a interrupt.
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* @param vector the interrupt number
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* @param new_handler the interrupt service routine to be installed
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* @param old_handler the old interrupt service routine
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*/
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rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
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void *param, const char *name)
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{
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rt_isr_handler_t old_handler = RT_NULL;
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if(vector < MAX_HANDLERS)
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{
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old_handler = isr_table[vector].handler;
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if (handler != RT_NULL)
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{
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#ifdef RT_USING_INTERRUPT_INFO
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rt_strncpy(isr_table[vector].name, name, RT_NAME_MAX);
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#endif /* RT_USING_INTERRUPT_INFO */
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isr_table[vector].handler = handler;
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isr_table[vector].param = param;
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}
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}
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return old_handler;
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}
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/**
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* This function will trigger an interrupt.
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* @param vector the interrupt number
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*/
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void rt_hw_interrupt_trigger(int vector)
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{
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INTC_ISR_SET(AINTC_BASE, vector>>5) = 1 << (vector & 0x1f);
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}
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void rt_hw_interrupt_clear(int vector)
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{
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INTC_ISR_CLEAR(AINTC_BASE, vector>>5) = 1 << (vector & 0x1f);
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}
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void rt_dump_isr_table(void)
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{
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int idx;
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for(idx = 0; idx < MAX_HANDLERS; idx++)
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{
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#ifdef RT_USING_INTERRUPT_INFO
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rt_kprintf("nr:%4d, name: %*.s, handler: 0x%p, param: 0x%08x\r\n",
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idx, RT_NAME_MAX, isr_table[idx].name,
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isr_table[idx].handler, isr_table[idx].param);
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#else
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rt_kprintf("nr:%4d, handler: 0x%p, param: 0x%08x\r\n",
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idx, isr_table[idx].handler, isr_table[idx].param);
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#endif
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}
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}
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/*@}*/
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