增加usart驱动，支持lpuart0作为系统日志输出端口
parent
752b91920a
commit
0290eb4312
106
.config
106
.config
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@ -7,7 +7,6 @@
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# RT-Thread Kernel
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#
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CONFIG_RT_NAME_MAX=8
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# CONFIG_RT_USING_BIG_ENDIAN is not set
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# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
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# CONFIG_RT_USING_SMP is not set
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CONFIG_RT_ALIGN_SIZE=4
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@ -18,7 +17,6 @@ CONFIG_RT_THREAD_PRIORITY_MAX=32
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CONFIG_RT_TICK_PER_SECOND=1000
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CONFIG_RT_USING_OVERFLOW_CHECK=y
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CONFIG_RT_USING_HOOK=y
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CONFIG_RT_HOOK_USING_FUNC_PTR=y
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CONFIG_RT_USING_IDLE_HOOK=y
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CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
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CONFIG_IDLE_THREAD_STACK_SIZE=256
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@ -31,8 +29,7 @@ CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
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#
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# CONFIG_RT_KSERVICE_USING_STDLIB is not set
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# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
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# CONFIG_RT_USING_TINY_FFS is not set
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# CONFIG_RT_PRINTF_LONGLONG is not set
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# CONFIG_RT_USING_ASM_MEMCPY is not set
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CONFIG_RT_DEBUG=y
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# CONFIG_RT_DEBUG_COLOR is not set
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# CONFIG_RT_DEBUG_INIT_CONFIG is not set
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@ -60,16 +57,12 @@ CONFIG_RT_USING_MESSAGEQUEUE=y
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# Memory Management
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#
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CONFIG_RT_USING_MEMPOOL=y
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# CONFIG_RT_USING_MEMHEAP is not set
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# CONFIG_RT_USING_NOHEAP is not set
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CONFIG_RT_USING_SMALL_MEM=y
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# CONFIG_RT_USING_SLAB is not set
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# CONFIG_RT_USING_MEMHEAP is not set
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CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y
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# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set
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# CONFIG_RT_USING_SLAB_AS_HEAP is not set
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# CONFIG_RT_USING_USERHEAP is not set
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# CONFIG_RT_USING_NOHEAP is not set
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# CONFIG_RT_USING_MEMTRACE is not set
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# CONFIG_RT_USING_HEAP_ISR is not set
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CONFIG_RT_USING_HEAP=y
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#
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@ -80,8 +73,9 @@ CONFIG_RT_USING_DEVICE=y
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# CONFIG_RT_USING_INTERRUPT_INFO is not set
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CONFIG_RT_USING_CONSOLE=y
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CONFIG_RT_CONSOLEBUF_SIZE=128
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CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
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CONFIG_RT_VER_NUM=0x40100
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CONFIG_RT_CONSOLE_DEVICE_NAME="lpuart0"
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# CONFIG_RT_PRINTF_LONGLONG is not set
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CONFIG_RT_VER_NUM=0x40005
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# CONFIG_RT_USING_CPU_FFS is not set
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# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
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@ -92,7 +86,6 @@ CONFIG_RT_USING_COMPONENTS_INIT=y
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CONFIG_RT_USING_USER_MAIN=y
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CONFIG_RT_MAIN_THREAD_STACK_SIZE=512
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CONFIG_RT_MAIN_THREAD_PRIORITY=10
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# CONFIG_RT_USING_LEGACY is not set
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#
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# C++ features
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@ -127,6 +120,7 @@ CONFIG_FINSH_ARG_MAX=10
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# Device Drivers
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#
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CONFIG_RT_USING_DEVICE_IPC=y
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CONFIG_RT_PIPE_BUFSZ=512
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# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
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CONFIG_RT_USING_SERIAL=y
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CONFIG_RT_USING_SERIAL_V1=y
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@ -160,35 +154,18 @@ CONFIG_RT_USING_PIN=y
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#
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# Using USB
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#
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# CONFIG_RT_USING_USB is not set
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# CONFIG_RT_USING_USB_HOST is not set
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# CONFIG_RT_USING_USB_DEVICE is not set
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#
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# POSIX layer and C standard library
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#
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CONFIG_RT_USING_LIBC=y
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# CONFIG_RT_USING_PTHREADS is not set
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CONFIG_RT_LIBC_USING_TIME=y
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# CONFIG_RT_USING_MODULE is not set
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CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
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#
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# POSIX (Portable Operating System Interface) layer
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#
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# CONFIG_RT_USING_POSIX_FS is not set
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# CONFIG_RT_USING_POSIX_DELAY is not set
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# CONFIG_RT_USING_POSIX_CLOCK is not set
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# CONFIG_RT_USING_PTHREADS is not set
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#
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# Interprocess Communication (IPC)
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#
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# CONFIG_RT_USING_POSIX_PIPE is not set
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# CONFIG_RT_USING_POSIX_MESSAGE_QUEUE is not set
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# CONFIG_RT_USING_POSIX_MESSAGE_SEMAPHORE is not set
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#
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# Socket is in the 'Network' category
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#
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#
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# Network
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#
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@ -222,16 +199,35 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
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# Utilities
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#
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# CONFIG_RT_USING_RYM is not set
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# CONFIG_RT_USING_ULOG is not set
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CONFIG_RT_USING_ULOG=y
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# CONFIG_ULOG_OUTPUT_LVL_A is not set
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# CONFIG_ULOG_OUTPUT_LVL_E is not set
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# CONFIG_ULOG_OUTPUT_LVL_W is not set
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# CONFIG_ULOG_OUTPUT_LVL_I is not set
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CONFIG_ULOG_OUTPUT_LVL_D=y
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CONFIG_ULOG_OUTPUT_LVL=7
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# CONFIG_ULOG_USING_ISR_LOG is not set
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CONFIG_ULOG_ASSERT_ENABLE=y
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CONFIG_ULOG_LINE_BUF_SIZE=128
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# CONFIG_ULOG_USING_ASYNC_OUTPUT is not set
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#
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# log format
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#
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# CONFIG_ULOG_OUTPUT_FLOAT is not set
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CONFIG_ULOG_USING_COLOR=y
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CONFIG_ULOG_OUTPUT_TIME=y
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# CONFIG_ULOG_TIME_USING_TIMESTAMP is not set
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CONFIG_ULOG_OUTPUT_LEVEL=y
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CONFIG_ULOG_OUTPUT_TAG=y
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# CONFIG_ULOG_OUTPUT_THREAD_NAME is not set
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CONFIG_ULOG_BACKEND_USING_CONSOLE=y
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# CONFIG_ULOG_USING_FILTER is not set
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# CONFIG_ULOG_USING_SYSLOG is not set
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# CONFIG_RT_USING_UTEST is not set
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# CONFIG_RT_USING_VAR_EXPORT is not set
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# CONFIG_RT_USING_RT_LINK is not set
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#
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# RT-Thread Utestcases
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#
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# CONFIG_RT_USING_UTESTCASES is not set
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#
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# RT-Thread online packages
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#
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@ -440,7 +436,12 @@ CONFIG_PKG_EASYLOGGER_VER="v2.0.0"
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# CONFIG_PKG_USING_SEGGER_RTT is not set
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# CONFIG_PKG_USING_RDB is not set
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# CONFIG_PKG_USING_QRCODE is not set
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# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
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CONFIG_PKG_USING_ULOG_EASYFLASH=y
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CONFIG_PKG_ULOG_EASYFLASH_PATH="/packages/tools/ulog_easyflash"
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CONFIG_PKG_USING_ULOG_EASYFLASH_V00200=y
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# CONFIG_PKG_USING_ULOG_EASYFLASH_V00100 is not set
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# CONFIG_PKG_USING_ULOG_EASYFLASH_LATEST_VERSION is not set
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CONFIG_PKG_ULOG_EASYFLASH_VER="v0.2.0"
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# CONFIG_PKG_USING_ULOG_FILE is not set
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# CONFIG_PKG_USING_LOGMGR is not set
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# CONFIG_PKG_USING_ADBD is not set
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@ -500,8 +501,21 @@ CONFIG_PKG_EASYLOGGER_VER="v2.0.0"
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#
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# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
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#
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# CONFIG_PKG_USING_CMSIS_5 is not set
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# CONFIG_PKG_USING_CMSIS_RTOS2 is not set
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CONFIG_PKG_USING_CMSIS_5=y
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CONFIG_PKG_CMSIS_5_PATH="/packages/system/CMSIS/CMSIS_5"
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CONFIG_PKG_CMSIS_CORE=y
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# CONFIG_PKG_CMSIS_NN is not set
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# CONFIG_PKG_CMSIS_DSP is not set
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CONFIG_PKG_CMSIS_5_AUX_VER="latest"
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CONFIG_PKG_USING_CMSIS_5_LATEST_VERSION=y
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# CONFIG_PKG_USING_CMSIS_5_V50800 is not set
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CONFIG_PKG_CMSIS_5_VER="latest"
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CONFIG_PKG_USING_CMSIS_5_AUX=y
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CONFIG_PKG_CMSIS_5_AUX_PATH="/packages/system/CMSIS/CMSIS_5_AUX"
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CONFIG_PKG_USING_CMSIS_RTOS2=y
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CONFIG_PKG_CMSIS_RTOS2_PATH="/packages/system/CMSIS/CMSIS_RTOS2"
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CONFIG_PKG_USING_CMSIS_RTOS2_LATEST_VERSION=y
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CONFIG_PKG_CMSIS_RTOS2_VER="latest"
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#
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# Micrium: Micrium software products porting for RT-Thread
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@ -701,7 +715,13 @@ CONFIG_MCU_HC32L073=y
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# On-chip Peripheral Drivers
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#
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CONFIG_BSP_USING_GPIO=y
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# CONFIG_BSP_USING_UART is not set
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CONFIG_BSP_USING_UART=y
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CONFIG_BSP_USING_UART0=y
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# CONFIG_BSP_USING_UART1 is not set
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# CONFIG_BSP_USING_UART2 is not set
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# CONFIG_BSP_USING_UART3 is not set
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CONFIG_BSP_USING_LPUART0=y
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# CONFIG_BSP_USING_LPUART1 is not set
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# CONFIG_BSP_USING_I2C1 is not set
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#
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@ -1,3 +1,10 @@
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/*
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* @Description:
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* @Date: 2022-01-10 17:05:41
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* @LastEditors: CK.Zh
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* @LastEditTime: 2022-01-10 17:27:06
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* @FilePath: /motion_ec_rtt/applications/main.c
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*/
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/*
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* Copyright (C) 2021, Huada Semiconductor Co., Ltd.
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*
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@ -26,8 +33,7 @@
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******************************************************************************/
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/* defined the LED pin: PC9 */
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#define LED_PIN GET_PIN(C, 13)
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#define KEY_PIN GET_PIN(B, 9)
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/*******************************************************************************
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* Global variable definitions (declared in header file with 'extern')
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@ -29,6 +29,22 @@ menu "On-chip Peripheral Drivers"
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config BSP_USING_UART1
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bool "Enable UART1"
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default n
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config BSP_USING_UART2
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bool "Enable UART2"
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default n
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config BSP_USING_UART3
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bool "Enable UART3"
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default n
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config BSP_USING_LPUART0
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bool "Enable LPUART0"
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default n
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config BSP_USING_LPUART1
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bool "Enable LPUART1"
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default n
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endif
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menuconfig BSP_USING_I2C1
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@ -2,8 +2,8 @@
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* @Description:
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* @Date: 2022-01-06 14:31:32
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* @LastEditors: CK.Zh
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* @LastEditTime: 2022-01-10 11:24:25
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* @FilePath: /rt-thread/bsp/hc32l073/board/board.h
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* @LastEditTime: 2022-01-10 17:27:17
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* @FilePath: /motion_ec_rtt/board/board.h
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*/
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/*
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* Copyright (C) 2021, Huada Semiconductor Co., Ltd.
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@ -46,9 +46,32 @@ extern int __bss_end;
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#define HEAP_END SRAM_END
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#endif
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#define LED_PIN GET_PIN(C, 13)
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#define KEY_PIN GET_PIN(B, 9)
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#define KEY_PIN GET_PIN(B, 9)
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#define KEY_PIN GET_PIN(B, 9)
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#define KEY_PIN GET_PIN(B, 9)
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#define KEY_PIN GET_PIN(B, 9)
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#define KEY_PIN GET_PIN(B, 9)
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#define KEY_PIN GET_PIN(B, 9)
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#define KEY_PIN GET_PIN(B, 9)
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#define KEY_PIN GET_PIN(B, 9)
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void rt_hw_board_init(void);
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void rt_hw_us_delay(rt_uint32_t us);
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#endif
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// <<< Use Configuration Wizard in Context Menu >>>
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@ -2,8 +2,8 @@
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* @Description:
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* @Date: 2022-01-06 14:27:36
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* @LastEditors: CK.Zh
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* @LastEditTime: 2022-01-07 11:11:01
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* @FilePath: /rt-thread/bsp/hc32l073/board/board_config.h
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* @LastEditTime: 2022-01-10 20:03:16
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* @FilePath: /motion_ec_rtt/board/board_config.h
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*/
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/*
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*
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@ -44,4 +44,49 @@
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#define UART1_TX_AF GpioAf1
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#endif
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// #if defined(BSP_USING_UART2)
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// #define UART2_RX_PORT GpioPortA
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// #define UART2_RX_PIN GpioPin3
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// #define UART2_RX_AF GpioAf1
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// #define UART2_TX_PORT GpioPortA
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// #define UART2_TX_PIN GpioPin2
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// #define UART2_TX_AF GpioAf1
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// #endif
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// #if defined(BSP_USING_UART3)
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// #define UART3_RX_PORT GpioPortA
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// #define UART3_RX_PIN GpioPin3
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// #define UART3_RX_AF GpioAf1
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// #define UART3_TX_PORT GpioPortA
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// #define UART3_TX_PIN GpioPin2
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// #define UART3_TX_AF GpioAf1
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// #endif
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#if defined(BSP_USING_LPUART0)
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#define LPUART0_RX_PORT GpioPortC
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#define LPUART0_RX_PIN GpioPin11
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#define LPUART0_RX_AF GpioAf2
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#define LPUART0_TX_PORT GpioPortC
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#define LPUART0_TX_PIN GpioPin10
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#define LPUART0_TX_AF GpioAf2
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#endif
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// #if defined(BSP_USING_LPUART1)
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// #define LPUART1_RX_PORT GpioPortA
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// #define LPUART1_RX_PIN GpioPin3
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// #define LPUART1_RX_AF GpioAf1
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// #define LPUART1_TX_PORT GpioPortA
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// #define LPUART1_TX_PIN GpioPin2
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// #define LPUART1_TX_AF GpioAf1
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// #endif
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#endif
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@ -0,0 +1,312 @@
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/*
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* @Description:
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* @Date: 2022-01-10 17:36:06
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* @LastEditors: CK.Zh
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* @LastEditTime: 2022-01-10 19:53:36
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* @FilePath: /motion_ec_rtt/drivers/drv_usart.c
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*/
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/*
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-9-1 DongBowen first version
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*/
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#include "drv_usart.h"
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "board.h"
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#ifdef RT_USING_SERIAL
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#ifdef BSP_USING_UART
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#if !defined(BSP_USING_UART0) && !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && \
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!defined(BSP_USING_UART3)
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#error "Please define at least one BSP_USING_UARTx"
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/* this driver can be disabled at menuconfig -> RT-Thread Components -> Device Drivers */
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#endif
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enum
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{
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#ifdef BSP_USING_UART0
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UART0_INDEX,
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#endif
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#ifdef BSP_USING_UART1
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UART1_INDEX,
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#endif
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#ifdef BSP_USING_UART2
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UART2_INDEX,
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#endif
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#ifdef BSP_USING_UART3
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UART3_INDEX,
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#endif
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};
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static struct hc_uart_cfg uart_cfg[] =
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{
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#ifdef BSP_USING_UART0
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UART0_CFG,
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#endif
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#ifdef BSP_USING_UART1
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UART1_CFG,
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#endif
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#ifdef BSP_USING_UART2
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UART2_CFG,
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#endif
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#ifdef BSP_USING_UART3
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UART3_CFG,
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#endif
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#ifdef BSP_USING_LPUART0
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LPUART0_CFG,
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#endif
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#ifdef BSP_USING_LPUART1
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LPUART1_CFG,
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#endif
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};
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static struct hc_uart uart_drv[sizeof(uart_cfg) / sizeof(uart_cfg[0])] = {0};
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static rt_err_t _uart_init(struct rt_serial_device *serial_device, struct serial_configure *configure)
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{
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stc_gpio_cfg_t stcGpioCfg;
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stc_uart_cfg_t stcCfg;
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||||
|
||||
struct hc_uart_cfg *cfg;
|
||||
RT_ASSERT(serial_device != RT_NULL);
|
||||
RT_ASSERT(configure != RT_NULL);
|
||||
cfg = serial_device->parent.user_data;
|
||||
|
||||
/* configure rx and tx gpio */
|
||||
rt_memset(&stcGpioCfg, 0, sizeof(stcGpioCfg));
|
||||
Sysctrl_SetPeripheralGate(SysctrlPeripheralGpio, TRUE);
|
||||
stcGpioCfg.enDir = GpioDirOut;
|
||||
Gpio_Init(cfg->tx_port, cfg->tx_pin, &stcGpioCfg);
|
||||
Gpio_SetAfMode(cfg->tx_port, cfg->tx_pin, cfg->tx_af);
|
||||
stcGpioCfg.enDir = GpioDirIn;
|
||||
Gpio_Init(cfg->rx_port, cfg->rx_pin, &stcGpioCfg);
|
||||
Gpio_SetAfMode(cfg->rx_port, cfg->rx_pin, cfg->rx_af);
|
||||
|
||||
/* configure uart */
|
||||
rt_memset(&stcCfg, 0, sizeof(stcCfg));
|
||||
|
||||
Sysctrl_SetPeripheralGate(cfg->uart_periph, TRUE);
|
||||
|
||||
stcCfg.stcBaud.u32Baud = configure->baud_rate;
|
||||
stcCfg.stcBaud.enClkDiv = UartMsk8Or16Div;
|
||||
stcCfg.stcBaud.u32Pclk = Sysctrl_GetPClkFreq();
|
||||
|
||||
switch (configure->data_bits)
|
||||
{
|
||||
case DATA_BITS_8:
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
switch (configure->stop_bits)
|
||||
{
|
||||
case STOP_BITS_1:
|
||||
stcCfg.enStopBit = UartMsk1bit;
|
||||
break;
|
||||
case STOP_BITS_2:
|
||||
stcCfg.enStopBit = UartMsk2bit;
|
||||
break;
|
||||
default:
|
||||
stcCfg.enStopBit = UartMsk1bit;
|
||||
break;
|
||||
}
|
||||
|
||||
switch (configure->parity)
|
||||
{
|
||||
case PARITY_NONE:
|
||||
stcCfg.enMmdorCk = UartMskDataOrAddr;
|
||||
stcCfg.enRunMode = UartMskMode1;
|
||||
break;
|
||||
case PARITY_ODD:
|
||||
stcCfg.enMmdorCk = UartMskOdd;
|
||||
stcCfg.enRunMode = UartMskMode3;
|
||||
break;
|
||||
case PARITY_EVEN:
|
||||
stcCfg.enMmdorCk = UartMskEven;
|
||||
stcCfg.enRunMode = UartMskMode3;
|
||||
break;
|
||||
default:
|
||||
stcCfg.enMmdorCk = UartMskDataOrAddr;
|
||||
stcCfg.enRunMode = UartMskMode1;
|
||||
break;
|
||||
}
|
||||
|
||||
Uart_Init(cfg->uart, &stcCfg);
|
||||
|
||||
Uart_ClrStatus(cfg->uart, UartRC);
|
||||
Uart_ClrStatus(cfg->uart, UartTC);
|
||||
|
||||
rt_hw_us_delay(2);
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t _uart_control(struct rt_serial_device *serial_device, int cmd, void *arg)
|
||||
{
|
||||
struct hc_uart_cfg *cfg;
|
||||
RT_ASSERT(serial_device != RT_NULL);
|
||||
cfg = serial_device->parent.user_data;
|
||||
|
||||
switch (cmd)
|
||||
{
|
||||
case RT_DEVICE_CTRL_CLR_INT:
|
||||
/* disable rx irq */
|
||||
Uart_DisableIrq(cfg->uart, UartRxIrq);
|
||||
EnableNvic(cfg->irqn, IrqLevel3, FALSE);
|
||||
break;
|
||||
case RT_DEVICE_CTRL_SET_INT:
|
||||
/* enable rx irq */
|
||||
Uart_EnableIrq(cfg->uart, UartRxIrq);
|
||||
EnableNvic(cfg->irqn, IrqLevel3, TRUE);
|
||||
break;
|
||||
}
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static int _uart_putc(struct rt_serial_device *serial_device, char c)
|
||||
{
|
||||
struct hc_uart_cfg *cfg;
|
||||
RT_ASSERT(serial_device != RT_NULL);
|
||||
cfg = serial_device->parent.user_data;
|
||||
|
||||
Uart_SendDataPoll(cfg->uart, (uint8_t)c);
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int _uart_getc(struct rt_serial_device *serial_device)
|
||||
{
|
||||
int ch;
|
||||
struct hc_uart_cfg *cfg;
|
||||
RT_ASSERT(serial_device != RT_NULL);
|
||||
cfg = serial_device->parent.user_data;
|
||||
|
||||
ch = -1;
|
||||
|
||||
if (Uart_GetStatus(cfg->uart, UartRC))
|
||||
{
|
||||
Uart_ClrStatus(cfg->uart, UartRC);
|
||||
ch = Uart_ReceiveData(cfg->uart);
|
||||
}
|
||||
|
||||
return ch;
|
||||
}
|
||||
|
||||
static const struct rt_uart_ops _uart_ops =
|
||||
{
|
||||
.configure = _uart_init,
|
||||
.control = _uart_control,
|
||||
.putc = _uart_putc,
|
||||
.getc = _uart_getc,
|
||||
.dma_transmit = RT_NULL
|
||||
};
|
||||
|
||||
/**
|
||||
* Uart common interrupt process. This need add to uart ISR.
|
||||
*
|
||||
* @param serial serial device
|
||||
*/
|
||||
static void rt_hw_uart_isr(struct rt_serial_device *serial_device)
|
||||
{
|
||||
struct hc_uart_cfg *cfg;
|
||||
uint32_t status;
|
||||
RT_ASSERT(serial_device != RT_NULL);
|
||||
|
||||
cfg = serial_device->parent.user_data;
|
||||
status = cfg->uart->ISR;
|
||||
|
||||
/* UART in mode Receiver -------------------------------------------------*/
|
||||
if (status & (1 << UartFE))
|
||||
{
|
||||
Uart_ClrStatus(cfg->uart, UartFE);
|
||||
}
|
||||
if (status & (1 << UartPE))
|
||||
{
|
||||
Uart_ClrStatus(cfg->uart, UartPE);
|
||||
}
|
||||
if (status & (1 << UartRC))
|
||||
{
|
||||
rt_hw_serial_isr(serial_device, RT_SERIAL_EVENT_RX_IND);
|
||||
}
|
||||
}
|
||||
|
||||
#if defined(BSP_USING_UART0)
|
||||
void Uart0_IRQHandler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
rt_hw_uart_isr(&(uart_drv[UART0_INDEX].serial_device));
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
#endif /* BSP_USING_UART0 */
|
||||
|
||||
#if defined(BSP_USING_UART1)
|
||||
void Uart1_IRQHandler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
rt_hw_uart_isr(&(uart_drv[UART1_INDEX].serial_device));
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
#endif /* BSP_USING_UART1 */
|
||||
|
||||
#if defined(BSP_USING_UART2)
|
||||
void Uart2_IRQHandler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
rt_hw_uart_isr(&(uart_drv[UART2_INDEX].serial_device));
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
#endif /* BSP_USING_UART2 */
|
||||
|
||||
#if defined(BSP_USING_UART3)
|
||||
void Uart3_IRQHandler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
rt_hw_uart_isr(&(uart_drv[UART3_INDEX].serial_device));
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
#endif /* BSP_USING_UART3 */
|
||||
|
||||
int rt_hw_uart_init(void)
|
||||
{
|
||||
struct serial_configure cfg = RT_SERIAL_CONFIG_DEFAULT;
|
||||
int i = 0;
|
||||
rt_err_t result = RT_EOK;
|
||||
|
||||
for (i = 0; i < sizeof(uart_cfg) / sizeof(uart_cfg[0]); i++)
|
||||
{
|
||||
uart_drv[i].cfg = &uart_cfg[i];
|
||||
uart_drv[i].serial_device.ops = &_uart_ops;
|
||||
uart_drv[i].serial_device.config = cfg;
|
||||
/* register UART device */
|
||||
result = rt_hw_serial_register(&uart_drv[i].serial_device, uart_drv[i].cfg->name,
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart_drv[i].cfg);
|
||||
RT_ASSERT(result == RT_EOK);
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
INIT_BOARD_EXPORT(rt_hw_uart_init);
|
||||
|
||||
#endif /* BSP_USING_UART */
|
||||
#endif /* RT_USING_SERIAL */
|
||||
|
|
@ -0,0 +1,161 @@
|
|||
/*
|
||||
* @Description:
|
||||
* @Date: 2022-01-10 17:36:12
|
||||
* @LastEditors: CK.Zh
|
||||
* @LastEditTime: 2022-01-10 19:58:24
|
||||
* @FilePath: /motion_ec_rtt/drivers/drv_usart.h
|
||||
*/
|
||||
/*
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-9-1 DongBowen first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_USART_H__
|
||||
#define __DRV_USART_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "rtdevice.h"
|
||||
|
||||
#include "board_config.h"
|
||||
|
||||
/* hc config class */
|
||||
struct hc_uart_cfg
|
||||
{
|
||||
const char *name;
|
||||
M0P_UART_TypeDef *uart;
|
||||
en_sysctrl_peripheral_gate_t uart_periph;
|
||||
IRQn_Type irqn;
|
||||
|
||||
en_gpio_port_t rx_port;
|
||||
en_gpio_pin_t rx_pin;
|
||||
en_gpio_af_t rx_af;
|
||||
|
||||
en_gpio_port_t tx_port;
|
||||
en_gpio_pin_t tx_pin;
|
||||
en_gpio_af_t tx_af;
|
||||
};
|
||||
|
||||
/* hc uart dirver class */
|
||||
struct hc_uart
|
||||
{
|
||||
struct hc_uart_cfg *cfg;
|
||||
struct rt_serial_device serial_device;
|
||||
};
|
||||
|
||||
#ifdef BSP_USING_UART0
|
||||
#ifndef UART0_CFG
|
||||
#define UART0_CFG \
|
||||
{ \
|
||||
.name = "uart0", \
|
||||
.uart = M0P_UART0, \
|
||||
.uart_periph = SysctrlPeripheralUart0, \
|
||||
.irqn = UART0_2_IRQn, \
|
||||
.rx_port = UART0_RX_PORT, \
|
||||
.rx_pin = UART0_RX_PIN, \
|
||||
.rx_af = UART0_RX_AF, \
|
||||
.tx_port = UART0_TX_PORT, \
|
||||
.tx_pin = UART0_TX_PIN, \
|
||||
.tx_af = UART0_TX_AF, \
|
||||
}
|
||||
#endif /* UART0_CFG */
|
||||
#endif /* BSP_USING_UART0 */
|
||||
|
||||
#ifdef BSP_USING_UART1
|
||||
#ifndef UART1_CFG
|
||||
#define UART1_CFG \
|
||||
{ \
|
||||
.name = "uart1", \
|
||||
.uart = M0P_UART1, \
|
||||
.uart_periph = SysctrlPeripheralUart1, \
|
||||
.irqn = UART1_3_IRQn, \
|
||||
.rx_port = UART1_RX_PORT, \
|
||||
.rx_pin = UART1_RX_PIN, \
|
||||
.rx_af = UART1_RX_AF, \
|
||||
.tx_port = UART1_TX_PORT, \
|
||||
.tx_pin = UART1_TX_PIN, \
|
||||
.tx_af = UART1_TX_AF, \
|
||||
}
|
||||
#endif /* UART1_CFG */
|
||||
#endif /* BSP_USING_UART1 */
|
||||
|
||||
#ifdef BSP_USING_UART2
|
||||
#ifndef UART2_CFG
|
||||
#define UART2_CFG \
|
||||
{ \
|
||||
.name = "uart2", \
|
||||
.uart = M0P_UART2, \
|
||||
.uart_periph = SysctrlPeripheralUart2, \
|
||||
.irqn = UART0_2_IRQn, \
|
||||
.rx_port = UART2_RX_PORT, \
|
||||
.rx_pin = UART2_RX_PIN, \
|
||||
.rx_af = UART2_RX_AF, \
|
||||
.tx_port = UART2_TX_PORT, \
|
||||
.tx_pin = UART2_TX_PIN, \
|
||||
.tx_af = UART2_TX_AF, \
|
||||
}
|
||||
#endif /* UART2_CFG */
|
||||
#endif /* BSP_USING_UART2 */
|
||||
|
||||
#ifdef BSP_USING_UART3
|
||||
#ifndef UART3_CFG
|
||||
#define UART3_CFG \
|
||||
{ \
|
||||
.name = "uart3", \
|
||||
.uart = M0P_UART3, \
|
||||
.uart_periph = SysctrlPeripheralUart3, \
|
||||
.irqn = UART1_3_IRQn, \
|
||||
.rx_port = UART3_RX_PORT, \
|
||||
.rx_pin = UART3_RX_PIN, \
|
||||
.rx_af = UART3_RX_AF, \
|
||||
.tx_port = UART3_TX_PORT, \
|
||||
.tx_pin = UART3_TX_PIN, \
|
||||
.tx_af = UART3_TX_AF, \
|
||||
}
|
||||
#endif /* UART3_CFG */
|
||||
#endif /* BSP_USING_UART3 */
|
||||
|
||||
|
||||
#ifdef BSP_USING_LPUART0
|
||||
#ifndef LPUART0_CFG
|
||||
#define LPUART0_CFG \
|
||||
{ \
|
||||
.name = "lpuart0", \
|
||||
.uart = M0P_LPUART0, \
|
||||
.uart_periph = SysctrlPeripheralLpUart0, \
|
||||
.irqn = LPUART0_IRQn, \
|
||||
.rx_port = LPUART0_RX_PORT, \
|
||||
.rx_pin = LPUART0_RX_PIN, \
|
||||
.rx_af = LPUART0_RX_AF, \
|
||||
.tx_port = LPUART0_TX_PORT, \
|
||||
.tx_pin = LPUART0_TX_PIN, \
|
||||
.tx_af = LPUART0_TX_AF, \
|
||||
}
|
||||
#endif /* LPUART0_CFG */
|
||||
#endif /* BSP_USING_LPUART0 */
|
||||
|
||||
|
||||
#ifdef BSP_USING_LPUART1
|
||||
#ifndef LPUART1_CFG
|
||||
#define LPUART1_CFG \
|
||||
{ \
|
||||
.name = "lpuart1", \
|
||||
.uart = M0P_LPUART1, \
|
||||
.uart_periph = SysctrlPeripheralLpUart1, \
|
||||
.irqn = LPUART1_IRQn, \
|
||||
.rx_port = LPUART1_RX_PORT, \
|
||||
.rx_pin = LPUART1_RX_PIN, \
|
||||
.rx_af = LPUART1_RX_AF, \
|
||||
.tx_port = LPUART1_TX_PORT, \
|
||||
.tx_pin = LPUART1_TX_PIN, \
|
||||
.tx_af = LPUART1_TX_AF, \
|
||||
}
|
||||
#endif /* LPUART1_CFG */
|
||||
#endif /* BSP_USING_LPUART1 */
|
||||
|
||||
int rt_hw_uart_init(void);
|
||||
|
||||
#endif /* __DRV_USART_H__ */
|
||||
|
|
@ -0,0 +1,2 @@
|
|||
Warn : deprecated option: -p/--pipe. Use '-c "gdb_port pipe; log_output openocd.log"' instead.
|
||||
Unexpected command line argument: list
|
||||
Binary file not shown.
51
rtconfig.h
51
rtconfig.h
|
|
@ -1,10 +1,3 @@
|
|||
/*
|
||||
* @Description:
|
||||
* @Date: 2022-01-06 14:31:32
|
||||
* @LastEditors: CK.Zh
|
||||
* @LastEditTime: 2022-01-10 16:02:30
|
||||
* @FilePath: /rt-thread/bsp/hc32l073/rtconfig.h
|
||||
*/
|
||||
#ifndef RT_CONFIG_H__
|
||||
#define RT_CONFIG_H__
|
||||
|
||||
|
|
@ -20,7 +13,6 @@
|
|||
#define RT_TICK_PER_SECOND 1000
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_USING_HOOK
|
||||
#define RT_HOOK_USING_FUNC_PTR
|
||||
#define RT_USING_IDLE_HOOK
|
||||
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 256
|
||||
|
|
@ -44,7 +36,6 @@
|
|||
|
||||
#define RT_USING_MEMPOOL
|
||||
#define RT_USING_SMALL_MEM
|
||||
#define RT_USING_SMALL_MEM_AS_HEAP
|
||||
#define RT_USING_HEAP
|
||||
|
||||
/* Kernel Device Object */
|
||||
|
|
@ -52,8 +43,8 @@
|
|||
#define RT_USING_DEVICE
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||
#define RT_VER_NUM 0x40100
|
||||
#define RT_CONSOLE_DEVICE_NAME "lpuart0"
|
||||
#define RT_VER_NUM 0x40005
|
||||
|
||||
/* RT-Thread Components */
|
||||
|
||||
|
|
@ -87,8 +78,9 @@
|
|||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
// #define RT_USING_SERIAL
|
||||
// #define RT_USING_SERIAL_V1
|
||||
#define RT_PIPE_BUFSZ 512
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_USING_SERIAL_V1
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_PIN
|
||||
|
||||
|
|
@ -97,16 +89,10 @@
|
|||
|
||||
/* POSIX layer and C standard library */
|
||||
|
||||
#define RT_USING_LIBC
|
||||
#define RT_LIBC_USING_TIME
|
||||
#define RT_LIBC_DEFAULT_TIMEZONE 8
|
||||
|
||||
/* POSIX (Portable Operating System Interface) layer */
|
||||
|
||||
|
||||
/* Interprocess Communication (IPC) */
|
||||
|
||||
|
||||
/* Socket is in the 'Network' category */
|
||||
|
||||
/* Network */
|
||||
|
||||
/* Socket abstraction layer */
|
||||
|
|
@ -126,9 +112,19 @@
|
|||
|
||||
/* Utilities */
|
||||
|
||||
#define RT_USING_ULOG
|
||||
#define ULOG_OUTPUT_LVL_D
|
||||
#define ULOG_OUTPUT_LVL 7
|
||||
#define ULOG_ASSERT_ENABLE
|
||||
#define ULOG_LINE_BUF_SIZE 128
|
||||
|
||||
/* RT-Thread Utestcases */
|
||||
/* log format */
|
||||
|
||||
#define ULOG_USING_COLOR
|
||||
#define ULOG_OUTPUT_TIME
|
||||
#define ULOG_OUTPUT_LEVEL
|
||||
#define ULOG_OUTPUT_TAG
|
||||
#define ULOG_BACKEND_USING_CONSOLE
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
|
|
@ -187,6 +183,8 @@
|
|||
#define PKG_EASYLOGGER_NEWLINE_SIGN_CRLF
|
||||
#define PKG_EASYLOGGER_ENABLE_COLOR
|
||||
#define PKG_USING_EASYLOGGER_V200
|
||||
#define PKG_USING_ULOG_EASYFLASH
|
||||
#define PKG_USING_ULOG_EASYFLASH_V00200
|
||||
|
||||
/* system packages */
|
||||
|
||||
|
|
@ -201,6 +199,12 @@
|
|||
|
||||
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
|
||||
|
||||
#define PKG_USING_CMSIS_5
|
||||
#define PKG_CMSIS_CORE
|
||||
#define PKG_USING_CMSIS_5_LATEST_VERSION
|
||||
#define PKG_USING_CMSIS_5_AUX
|
||||
#define PKG_USING_CMSIS_RTOS2
|
||||
#define PKG_USING_CMSIS_RTOS2_LATEST_VERSION
|
||||
|
||||
/* Micrium: Micrium software products porting for RT-Thread */
|
||||
|
||||
|
|
@ -228,6 +232,9 @@
|
|||
/* On-chip Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_GPIO
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_UART0
|
||||
#define BSP_USING_LPUART0
|
||||
|
||||
/* Board extended module Drivers */
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue