178 lines
4.3 KiB
C
178 lines
4.3 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2006-09-06 XuXinming first version
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* 2006-09-15 Bernard modify rt_hw_trap_irq for more effective
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*/
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#include <rtthread.h>
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#include <rthw.h>
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#include "s3c44b0.h"
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extern unsigned char interrupt_bank0[256];
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extern unsigned char interrupt_bank1[256];
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extern unsigned char interrupt_bank2[256];
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extern unsigned char interrupt_bank3[256];
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extern struct rt_thread *rt_current_thread;
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/**
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* @addtogroup S3C44B0
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*/
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/*@{*/
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/**
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* this function will show registers of CPU
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*
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* @param regs the registers point
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*/
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void rt_hw_show_register (struct rt_hw_register *regs)
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{
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rt_kprintf("Execption:\n");
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rt_kprintf("r00:0x%08x r01:0x%08x r02:0x%08x r03:0x%08x\n", regs->r0, regs->r1, regs->r2, regs->r3);
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rt_kprintf("r04:0x%08x r05:0x%08x r06:0x%08x r07:0x%08x\n", regs->r4, regs->r5, regs->r6, regs->r7);
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rt_kprintf("r08:0x%08x r09:0x%08x r10:0x%08x\n", regs->r8, regs->r9, regs->r10);
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rt_kprintf("fp :0x%08x ip :0x%08x\n", regs->fp, regs->ip);
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rt_kprintf("sp :0x%08x lr :0x%08x pc :0x%08x\n", regs->sp, regs->lr, regs->pc);
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rt_kprintf("cpsr:0x%08x\n", regs->cpsr);
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}
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/**
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* When ARM7TDMI comes across an instruction which it cannot handle,
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* it takes the undefined instruction trap.
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*
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* @param regs system registers
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*
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* @note never invoke this function in application
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*/
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void rt_hw_trap_udef(struct rt_hw_register *regs)
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{
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rt_hw_show_register(regs);
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rt_kprintf("undefined instruction\n");
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rt_hw_cpu_shutdown();
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}
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/**
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* The software interrupt instruction (SWI) is used for entering
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* Supervisor mode, usually to request a particular supervisor
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* function.
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*
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* @param regs system registers
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*
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* @note never invoke this function in application
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*/
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void rt_hw_trap_swi(struct rt_hw_register *regs)
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{
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rt_kprintf("software interrupt\n");
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rt_hw_show_register(regs);
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rt_hw_cpu_shutdown();
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}
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/**
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* An abort indicates that the current memory access cannot be completed,
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* which occurs during an instruction prefetch.
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*
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* @param regs system registers
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*
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* @note never invoke this function in application
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*/
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void rt_hw_trap_pabt(struct rt_hw_register *regs)
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{
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rt_hw_show_register(regs);
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rt_kprintf("prefetch abort\n");
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rt_hw_cpu_shutdown();
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}
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/**
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* An abort indicates that the current memory access cannot be completed,
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* which occurs during a data access.
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*
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* @param regs system registers
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*
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* @note never invoke this function in application
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*/
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void rt_hw_trap_dabt(struct rt_hw_register *regs)
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{
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rt_hw_show_register(regs);
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rt_kprintf("data abort\n");
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rt_hw_cpu_shutdown();
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}
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/**
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* Normally, system will never reach here
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*
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* @param regs system registers
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*
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* @note never invoke this function in application
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*/
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void rt_hw_trap_resv(struct rt_hw_register *regs)
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{
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rt_kprintf("not used\n");
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rt_hw_show_register(regs);
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rt_hw_cpu_shutdown();
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}
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extern rt_isr_handler_t isr_table[];
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void rt_hw_trap_irq()
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{
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register unsigned long ispr, intstat;
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register rt_isr_handler_t isr_func;
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#ifdef BSP_INT_DEBUG
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rt_kprintf("irq coming, ");
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#endif
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intstat = I_ISPR & 0x7ffffff;
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#ifdef BSP_INT_DEBUG
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rt_kprintf("I_ISPR: %d\n", intstat);
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#endif
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ispr = intstat;
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/* to find interrupt */
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if ( intstat & 0xff ) /* lowest 8bits */
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{
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intstat = interrupt_bank0[intstat & 0xff];
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isr_func = (rt_isr_handler_t)isr_table[ intstat ];
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}
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else if ( intstat & 0xff00 ) /* low 8bits */
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{
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intstat = interrupt_bank1[(intstat & 0xff00) >> 8];
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isr_func = (rt_isr_handler_t)isr_table[ intstat ];
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}
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else if ( intstat & 0xff0000 ) /* high 8bits */
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{
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intstat = interrupt_bank2[(intstat & 0xff0000) >> 16];
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isr_func = (rt_isr_handler_t)isr_table[ intstat ];
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}
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else if ( intstat & 0xff000000 ) /* highest 8bits */
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{
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intstat = interrupt_bank3[(intstat & 0xff000000) >> 24];
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isr_func = (rt_isr_handler_t)isr_table[ intstat ];
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}
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else return;
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#ifdef BSP_INT_DEBUG
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rt_kprintf("irq: %d happen\n", intstat);
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#endif
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/* turn to interrupt service routine */
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isr_func(intstat);
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I_ISPC = ispr; /* clear interrupt */
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}
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void rt_hw_trap_fiq()
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{
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rt_kprintf("fast interrupt request\n");
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}
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/*@}*/
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