82 lines
1.5 KiB
ArmAsm
82 lines
1.5 KiB
ArmAsm
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-12-10 Jesven first version
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*/
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#define Mode_USR 0x10
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#define Mode_FIQ 0x11
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#define Mode_IRQ 0x12
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#define Mode_SVC 0x13
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#define Mode_MON 0x16
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#define Mode_ABT 0x17
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#define Mode_UDF 0x1B
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#define Mode_SYS 0x1F
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#define A_Bit 0x100
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#define I_Bit 0x80 @; when I bit is set, IRQ is disabled
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#define F_Bit 0x40 @; when F bit is set, FIQ is disabled
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#define T_Bit 0x20
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.cpu arm9
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.syntax unified
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.text
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/*
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* void lwp_user_entry(args, text, data);
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*/
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.global lwp_user_entry
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.type lwp_user_entry, % function
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lwp_user_entry:
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mrs r9, cpsr
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mov r8, r9
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bic r9, #0x1f
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orr r9, #Mode_USR
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orr r8, #I_Bit
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msr cpsr_c, r8
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msr spsr, r9
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/* set data address. */
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mov r9, r2
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movs pc, r1
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/*
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* void SVC_Handler(void);
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*/
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.global SVC_Handler
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.type SVC_Handler, % function
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SVC_Handler:
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push {lr}
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mrs lr, spsr
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push {r4, r5, lr}
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mrs r4, cpsr
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bic r4, #I_Bit
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msr cpsr_c, r4
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push {r0 - r3, r12}
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and r0, r7, #0xff
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bl lwp_get_sys_api
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cmp r0, #0 /* r0 = api */
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mov r4, r0
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pop {r0 - r3, r12}
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beq svc_exit
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ldr lr, = svc_exit
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bx r4
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svc_exit:
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mrs r4, cpsr
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orr r4, #I_Bit
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msr cpsr_c, r4
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pop {r4, r5, lr}
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msr spsr_cxsf, lr
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pop {lr}
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movs pc, lr
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