199 lines
12 KiB
C
199 lines
12 KiB
C
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/*
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* This file is part of the Serial Flash Universal Driver Library.
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*
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* Copyright (c) 2016-2018, Armink, <armink.ztl@gmail.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* 'Software'), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED 'AS IS', WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* Function: It is the flash types and specification macro definition head file for this library.
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* Created on: 2016-06-09
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*/
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#ifndef _SFUD_FLASH_DEF_H_
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#define _SFUD_FLASH_DEF_H_
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#include <stdint.h>
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#include <sfud_cfg.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* flash program(write) data mode
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*/
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enum sfud_write_mode {
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SFUD_WM_PAGE_256B = 1 << 0, /**< write 1 to 256 bytes per page */
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SFUD_WM_BYTE = 1 << 1, /**< byte write */
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SFUD_WM_AAI = 1 << 2, /**< auto address increment */
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SFUD_WM_DUAL_BUFFER = 1 << 3, /**< dual-buffer write, like AT45DB series */
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};
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/* manufacturer information */
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typedef struct {
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char *name;
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uint8_t id;
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} sfud_mf;
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/* flash chip information */
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typedef struct {
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char *name; /**< flash chip name */
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uint8_t mf_id; /**< manufacturer ID */
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uint8_t type_id; /**< memory type ID */
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uint8_t capacity_id; /**< capacity ID */
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uint32_t capacity; /**< flash capacity (bytes) */
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uint16_t write_mode; /**< write mode @see sfud_write_mode */
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uint32_t erase_gran; /**< erase granularity (bytes) */
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uint8_t erase_gran_cmd; /**< erase granularity size block command */
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} sfud_flash_chip;
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#ifdef SFUD_USING_QSPI
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/* QSPI flash chip's extended information compared with SPI flash */
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typedef struct {
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uint8_t mf_id; /**< manufacturer ID */
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uint8_t type_id; /**< memory type ID */
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uint8_t capacity_id; /**< capacity ID */
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uint8_t read_mode; /**< supported read mode on this qspi flash chip */
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} sfud_qspi_flash_ext_info;
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#endif
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/* SFUD support manufacturer JEDEC ID */
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#define SFUD_MF_ID_CYPRESS 0x01
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#define SFUD_MF_ID_FUJITSU 0x04
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#define SFUD_MF_ID_EON 0x1C
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#define SFUD_MF_ID_ATMEL 0x1F
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#define SFUD_MF_ID_MICRON 0x20
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#define SFUD_MF_ID_AMIC 0x37
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#define SFUD_MF_ID_NOR_MEM 0x52
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#define SFUD_MF_ID_SANYO 0x62
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#define SFUD_MF_ID_INTEL 0x89
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#define SFUD_MF_ID_ESMT 0x8C
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#define SFUD_MF_ID_FUDAN 0xA1
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#define SFUD_MF_ID_HYUNDAI 0xAD
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#define SFUD_MF_ID_SST 0xBF
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#define SFUD_MF_ID_MACRONIX 0xC2
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#define SFUD_MF_ID_GIGADEVICE 0xC8
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#define SFUD_MF_ID_ISSI 0xD5
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#define SFUD_MF_ID_WINBOND 0xEF
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/* SFUD supported manufacturer information table */
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#define SFUD_MF_TABLE \
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{ \
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{"Cypress", SFUD_MF_ID_CYPRESS}, \
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{"Fujitsu", SFUD_MF_ID_FUJITSU}, \
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{"EON", SFUD_MF_ID_EON}, \
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{"Atmel", SFUD_MF_ID_ATMEL}, \
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{"Micron", SFUD_MF_ID_MICRON}, \
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{"AMIC", SFUD_MF_ID_AMIC}, \
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{"Sanyo", SFUD_MF_ID_SANYO}, \
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{"Intel", SFUD_MF_ID_INTEL}, \
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{"ESMT", SFUD_MF_ID_ESMT}, \
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{"Fudan", SFUD_MF_ID_FUDAN}, \
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{"Hyundai", SFUD_MF_ID_HYUNDAI}, \
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{"SST", SFUD_MF_ID_SST}, \
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{"GigaDevice", SFUD_MF_ID_GIGADEVICE}, \
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{"ISSI", SFUD_MF_ID_ISSI}, \
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{"Winbond", SFUD_MF_ID_WINBOND}, \
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{"Macronix", SFUD_MF_ID_MACRONIX}, \
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{"NOR-MEM", SFUD_MF_ID_NOR_MEM}, \
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}
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#ifdef SFUD_USING_FLASH_INFO_TABLE
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/* SFUD supported flash chip information table. If the flash not support JEDEC JESD216 standard,
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* then the SFUD will find the flash chip information by this table. You can add other flash to here then
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* notice me for update it. The configuration information name and index reference the sfud_flash_chip structure.
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* | name | mf_id | type_id | capacity_id | capacity | write_mode | erase_gran | erase_gran_cmd |
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*/
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#define SFUD_FLASH_CHIP_TABLE \
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{ \
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{"AT45DB161E", SFUD_MF_ID_ATMEL, 0x26, 0x00, 2L*1024L*1024L, SFUD_WM_BYTE|SFUD_WM_DUAL_BUFFER, 512, 0x81}, \
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{"W25Q40BV", SFUD_MF_ID_WINBOND, 0x40, 0x13, 512L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \
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{"W25X40CL", SFUD_MF_ID_WINBOND, 0x30, 0x13, 512L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \
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{"W25X16AV", SFUD_MF_ID_WINBOND, 0x30, 0x15, 2L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \
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{"W25Q16BV", SFUD_MF_ID_WINBOND, 0x40, 0x15, 2L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \
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{"W25Q32BV", SFUD_MF_ID_WINBOND, 0x40, 0x16, 4L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \
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{"W25Q64CV", SFUD_MF_ID_WINBOND, 0x40, 0x17, 8L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \
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{"W25Q64DW", SFUD_MF_ID_WINBOND, 0x60, 0x17, 8L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \
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{"W25Q128BV", SFUD_MF_ID_WINBOND, 0x40, 0x18, 16L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \
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{"W25Q256FV", SFUD_MF_ID_WINBOND, 0x40, 0x19, 32L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \
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{"SST25VF080B", SFUD_MF_ID_SST, 0x25, 0x8E, 1L*1024L*1024L, SFUD_WM_BYTE|SFUD_WM_AAI, 4096, 0x20}, \
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{"SST25VF016B", SFUD_MF_ID_SST, 0x25, 0x41, 2L*1024L*1024L, SFUD_WM_BYTE|SFUD_WM_AAI, 4096, 0x20}, \
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{"M25P32", SFUD_MF_ID_MICRON, 0x20, 0x16, 4L*1024L*1024L, SFUD_WM_PAGE_256B, 64L*1024L, 0xD8}, \
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{"M25P80", SFUD_MF_ID_MICRON, 0x20, 0x14, 1L*1024L*1024L, SFUD_WM_PAGE_256B, 64L*1024L, 0xD8}, \
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{"M25P40", SFUD_MF_ID_MICRON, 0x20, 0x13, 512L*1024L, SFUD_WM_PAGE_256B, 64L*1024L, 0xD8}, \
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{"EN25Q32B", SFUD_MF_ID_EON, 0x30, 0x16, 4L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \
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{"GD25Q64B", SFUD_MF_ID_GIGADEVICE, 0x40, 0x17, 8L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \
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{"GD25Q16B", SFUD_MF_ID_GIGADEVICE, 0x40, 0x15, 2L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \
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{"GD25Q32C", SFUD_MF_ID_GIGADEVICE, 0x40, 0x16, 4L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \
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{"S25FL216K", SFUD_MF_ID_CYPRESS, 0x40, 0x15, 2L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \
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{"S25FL032P", SFUD_MF_ID_CYPRESS, 0x02, 0x15, 4L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \
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{"A25L080", SFUD_MF_ID_AMIC, 0x30, 0x14, 1L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \
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{"F25L004", SFUD_MF_ID_ESMT, 0x20, 0x13, 512L*1024L, SFUD_WM_BYTE|SFUD_WM_AAI, 4096, 0x20}, \
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{"PCT25VF016B", SFUD_MF_ID_SST, 0x25, 0x41, 2L*1024L*1024L, SFUD_WM_BYTE|SFUD_WM_AAI, 4096, 0x20}, \
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{"NM25Q128EVB", SFUD_MF_ID_NOR_MEM, 0x21, 0x18, 16L*1024L*1024L, SFUD_WM_PAGE_256B, 4096, 0x20}, \
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}
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#endif /* SFUD_USING_FLASH_INFO_TABLE */
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#ifdef SFUD_USING_QSPI
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/* This table saves flash read-fast instructions in QSPI mode,
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* SFUD can use this table to select the most appropriate read instruction for flash.
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* | mf_id | type_id | capacity_id | qspi_read_mode |
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*/
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#define SFUD_FLASH_EXT_INFO_TABLE \
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{ \
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/* W25Q40BV */ \
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{SFUD_MF_ID_WINBOND, 0x40, 0x13, NORMAL_SPI_READ|DUAL_OUTPUT}, \
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/* W25Q80JV */ \
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{SFUD_MF_ID_WINBOND, 0x40, 0x14, NORMAL_SPI_READ|DUAL_OUTPUT}, \
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/* W25Q16BV */ \
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{SFUD_MF_ID_WINBOND, 0x40, 0x15, NORMAL_SPI_READ|DUAL_OUTPUT}, \
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/* W25Q32BV */ \
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{SFUD_MF_ID_WINBOND, 0x40, 0x16, NORMAL_SPI_READ|DUAL_OUTPUT|QUAD_OUTPUT|QUAD_IO}, \
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/* W25Q64JV */ \
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{SFUD_MF_ID_WINBOND, 0x40, 0x17, NORMAL_SPI_READ|DUAL_OUTPUT|DUAL_IO|QUAD_OUTPUT|QUAD_IO}, \
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/* W25Q128JV */ \
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{SFUD_MF_ID_WINBOND, 0x40, 0x18, NORMAL_SPI_READ|DUAL_OUTPUT|DUAL_IO|QUAD_OUTPUT|QUAD_IO}, \
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/* W25Q256FV */ \
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{SFUD_MF_ID_WINBOND, 0x40, 0x19, NORMAL_SPI_READ|DUAL_OUTPUT|DUAL_IO|QUAD_OUTPUT|QUAD_IO}, \
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/* EN25Q32B */ \
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{SFUD_MF_ID_EON, 0x30, 0x16, NORMAL_SPI_READ|DUAL_OUTPUT|QUAD_IO}, \
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/* S25FL216K */ \
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{SFUD_MF_ID_CYPRESS, 0x40, 0x15, NORMAL_SPI_READ|DUAL_OUTPUT}, \
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/* A25L080 */ \
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{SFUD_MF_ID_AMIC, 0x30, 0x14, NORMAL_SPI_READ|DUAL_OUTPUT|DUAL_IO}, \
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/* A25LQ64 */ \
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{SFUD_MF_ID_AMIC, 0x40, 0x17, NORMAL_SPI_READ|DUAL_OUTPUT|DUAL_IO|QUAD_IO}, \
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/* MX25L3206E and KH25L3206E */ \
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{SFUD_MF_ID_MACRONIX, 0x20, 0x16, NORMAL_SPI_READ|DUAL_OUTPUT}, \
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/* MX25L51245G */ \
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{SFUD_MF_ID_MACRONIX, 0x20, 0x1A, NORMAL_SPI_READ|DUAL_OUTPUT|DUAL_IO|QUAD_OUTPUT|QUAD_IO}, \
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/* GD25Q64B */ \
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{SFUD_MF_ID_GIGADEVICE, 0x40, 0x17, NORMAL_SPI_READ|DUAL_OUTPUT}, \
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/* NM25Q128EVB */ \
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{SFUD_MF_ID_NOR_MEM, 0x21, 0x18, NORMAL_SPI_READ|DUAL_OUTPUT|DUAL_IO|QUAD_OUTPUT|QUAD_IO}, \
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}
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#endif /* SFUD_USING_QSPI */
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SFUD_FLASH_DEF_H_ */
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