176 lines
6.9 KiB
C
176 lines
6.9 KiB
C
/**
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******************************************************************************
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* @file stm32f0xx_crs.h
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* @author MCD Application Team
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* @version V1.5.1
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* @date 13-October-2021
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* @brief This file contains all the functions prototypes for the CRS firmware
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* library, applicable only for STM32F042 and STM32F072 devices.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2014 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F0XX_CRS_H
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#define __STM32F0XX_CRS_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*!< Includes ----------------------------------------------------------------*/
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#include "stm32f0xx.h"
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/** @addtogroup STM32F0xx_StdPeriph_Driver
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* @{
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*/
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/** @addtogroup CRS
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup CRS_Interrupt_Sources
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* @{
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*/
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#define CRS_IT_SYNCOK CRS_ISR_SYNCOKF /*!< SYNC event OK */
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#define CRS_IT_SYNCWARN CRS_ISR_SYNCWARNF /*!< SYNC warning */
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#define CRS_IT_ERR CRS_ISR_ERRF /*!< error */
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#define CRS_IT_ESYNC CRS_ISR_ESYNCF /*!< Expected SYNC */
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#define CRS_IT_TRIMOVF CRS_ISR_TRIMOVF /*!< Trimming overflow or underflow */
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#define CRS_IT_SYNCERR CRS_ISR_SYNCERR /*!< SYNC error */
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#define CRS_IT_SYNCMISS CRS_ISR_SYNCMISS /*!< SYNC missed*/
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#define IS_CRS_IT(IT) (((IT) == CRS_IT_SYNCOK) || ((IT) == CRS_IT_SYNCWARN) || \
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((IT) == CRS_IT_ERR) || ((IT) == CRS_IT_ESYNC))
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#define IS_CRS_GET_IT(IT) (((IT) == CRS_IT_SYNCOK) || ((IT) == CRS_IT_SYNCWARN) || \
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((IT) == CRS_IT_ERR) || ((IT) == CRS_IT_ESYNC) || \
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((IT) == CRS_IT_TRIMOVF) || ((IT) == CRS_IT_SYNCERR) || \
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((IT) == CRS_IT_SYNCMISS))
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#define IS_CRS_CLEAR_IT(IT) ((IT) != 0x00)
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/**
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* @}
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*/
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/** @defgroup CRS_Flags
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* @{
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*/
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#define CRS_FLAG_SYNCOK CRS_ISR_SYNCOKF /*!< SYNC event OK */
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#define CRS_FLAG_SYNCWARN CRS_ISR_SYNCWARNF /*!< SYNC warning */
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#define CRS_FLAG_ERR CRS_ISR_ERRF /*!< error */
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#define CRS_FLAG_ESYNC CRS_ISR_ESYNCF /*!< Expected SYNC */
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#define CRS_FLAG_TRIMOVF CRS_ISR_TRIMOVF /*!< Trimming overflow or underflow */
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#define CRS_FLAG_SYNCERR CRS_ISR_SYNCERR /*!< SYNC error */
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#define CRS_FLAG_SYNCMISS CRS_ISR_SYNCMISS /*!< SYNC missed*/
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#define IS_CRS_FLAG(FLAG) (((FLAG) == CRS_FLAG_SYNCOK) || ((FLAG) == CRS_FLAG_SYNCWARN) || \
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((FLAG) == CRS_FLAG_ERR) || ((FLAG) == CRS_FLAG_ESYNC) || \
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((FLAG) == CRS_FLAG_TRIMOVF) || ((FLAG) == CRS_FLAG_SYNCERR) || \
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((FLAG) == CRS_FLAG_SYNCMISS))
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/**
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* @}
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*/
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/** @defgroup CRS_Synchro_Source
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* @{
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*/
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#define CRS_SYNCSource_GPIO ((uint32_t)0x00) /*!< Synchro Signal soucre GPIO */
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#define CRS_SYNCSource_LSE CRS_CFGR_SYNCSRC_0 /*!< Synchro Signal source LSE */
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#define CRS_SYNCSource_USB CRS_CFGR_SYNCSRC_1 /*!< Synchro Signal source USB SOF */
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#define IS_CRS_SYNC_SOURCE(SOURCE) (((SOURCE) == CRS_SYNCSource_GPIO) || \
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((SOURCE) == CRS_SYNCSource_LSE) ||\
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((SOURCE) == CRS_SYNCSource_USB))
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/**
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* @}
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*/
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/** @defgroup CRS_SynchroDivider
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* @{
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*/
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#define CRS_SYNC_Div1 ((uint32_t)0x00) /*!< Synchro Signal not divided */
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#define CRS_SYNC_Div2 CRS_CFGR_SYNCDIV_0 /*!< Synchro Signal divided by 2 */
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#define CRS_SYNC_Div4 CRS_CFGR_SYNCDIV_1 /*!< Synchro Signal divided by 4 */
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#define CRS_SYNC_Div8 (CRS_CFGR_SYNCDIV_1 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 8 */
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#define CRS_SYNC_Div16 CRS_CFGR_SYNCDIV_2 /*!< Synchro Signal divided by 16 */
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#define CRS_SYNC_Div32 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 32 */
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#define CRS_SYNC_Div64 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_1) /*!< Synchro Signal divided by 64 */
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#define CRS_SYNC_Div128 CRS_CFGR_SYNCDIV /*!< Synchro Signal divided by 128 */
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#define IS_CRS_SYNC_DIV(DIV) (((DIV) == CRS_SYNC_Div1) || ((DIV) == CRS_SYNC_Div2) ||\
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((DIV) == CRS_SYNC_Div4) || ((DIV) == CRS_SYNC_Div8) || \
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((DIV) == CRS_SYNC_Div16) || ((DIV) == CRS_SYNC_Div32) || \
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((DIV) == CRS_SYNC_Div64) || ((DIV) == CRS_SYNC_Div128))
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/**
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* @}
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*/
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/** @defgroup CRS_SynchroPolarity
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* @{
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*/
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#define CRS_SYNCPolarity_Rising ((uint32_t)0x00) /*!< Synchro Active on rising edge */
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#define CRS_SYNCPolarity_Falling CRS_CFGR_SYNCPOL /*!< Synchro Active on falling edge */
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#define IS_CRS_SYNC_POLARITY(POLARITY) (((POLARITY) == CRS_SYNCPolarity_Rising) || \
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((POLARITY) == CRS_SYNCPolarity_Falling))
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/* Exported functions ------------------------------------------------------- */
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/* Configuration of the CRS **********************************/
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void CRS_DeInit(void);
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void CRS_AdjustHSI48CalibrationValue(uint8_t CRS_HSI48CalibrationValue);
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void CRS_FrequencyErrorCounterCmd(FunctionalState NewState);
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void CRS_AutomaticCalibrationCmd(FunctionalState NewState);
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void CRS_SoftwareSynchronizationGenerate(void);
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void CRS_FrequencyErrorCounterReload(uint32_t CRS_ReloadValue);
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void CRS_FrequencyErrorLimitConfig(uint8_t CRS_ErrorLimitValue);
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void CRS_SynchronizationPrescalerConfig(uint32_t CRS_Prescaler);
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void CRS_SynchronizationSourceConfig(uint32_t CRS_Source);
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void CRS_SynchronizationPolarityConfig(uint32_t CRS_Polarity);
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uint32_t CRS_GetReloadValue(void);
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uint32_t CRS_GetHSI48CalibrationValue(void);
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uint32_t CRS_GetFrequencyErrorValue(void);
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uint32_t CRS_GetFrequencyErrorDirection(void);
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/* Interrupts and flags management functions **********************************/
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void CRS_ITConfig(uint32_t CRS_IT, FunctionalState NewState);
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FlagStatus CRS_GetFlagStatus(uint32_t CRS_FLAG);
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void CRS_ClearFlag(uint32_t CRS_FLAG);
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ITStatus CRS_GetITStatus(uint32_t CRS_IT);
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void CRS_ClearITPendingBit(uint32_t CRS_IT);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __STM32F0XX_CRS_H */
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/**
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* @}
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*/
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/**
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* @}
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*/
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