Pcie_brige_test/Project Logs for Pcie_Brige.../PCIE_Brige_PCB PCB ECO 2022...

22 lines
1.1 KiB
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Added Pin To Net: NetName=PCIE_SW_VDDR_3V3 Pin=U1-D14
Change Net Name : Old Net Name=NetP21_1 New Net Name=SDA_I2C
Change Net Name : Old Net Name=NetP21_2 New Net Name=SCL_I2C
Change Net Name : Old Net Name=NetP22_1 New Net Name=EEDO
Change Net Name : Old Net Name=NetP22_2 New Net Name=EECK
Change Net Name : Old Net Name=NetP22_3 New Net Name=EECS
Change Net Name : Old Net Name=NetP22_4 New Net Name=EEDI
Change Net Name : Old Net Name=NetP23_1 New Net Name=SHCL_I2C
Change Net Name : Old Net Name=NetP23_2 New Net Name=SHDA_I2C
Change Net Name : Old Net Name=NetP23_3 New Net Name=SHPCINT
Change Net Name : Old Net Name=NetP24_1 New Net Name=GPIO0
Change Net Name : Old Net Name=NetP24_2 New Net Name=GPIO1
Change Net Name : Old Net Name=NetP24_3 New Net Name=GPIO2
Change Net Name : Old Net Name=NetP24_4 New Net Name=GPIO3
Change Net Name : Old Net Name=NetP24_5 New Net Name=GPIO4
Change Net Name : Old Net Name=NetP24_6 New Net Name=GPIO5
Change Net Name : Old Net Name=NetP24_7 New Net Name=GPIO6
Change Net Name : Old Net Name=NetP24_8 New Net Name=GPIO7
Added Room: Name=Pcie_Brige_Cfg
Added Room: Name=Pcie_Brige_Core
Added Room: Name=Pcie_Brige_pwr