49 lines
2.0 KiB
Plaintext
49 lines
2.0 KiB
Plaintext
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Added Component: Designator=H1(PlatedThrHole)
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Added Component: Designator=H2(PlatedThrHole)
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Added Component: Designator=H3(PlatedThrHole)
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Added Component: Designator=H4(PlatedThrHole)
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Added Pin To Net: NetName=GND Pin=H1-1
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Added Pin To Net: NetName=GND Pin=H1-1
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Added Pin To Net: NetName=GND Pin=H1-1
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Added Pin To Net: NetName=GND Pin=H1-1
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Added Pin To Net: NetName=GND Pin=H1-1
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Added Pin To Net: NetName=GND Pin=H1-1
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Added Pin To Net: NetName=GND Pin=H1-1
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Added Pin To Net: NetName=GND Pin=H1-1
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Added Pin To Net: NetName=GND Pin=H1-1
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Added Pin To Net: NetName=GND Pin=H2-1
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Added Pin To Net: NetName=GND Pin=H2-1
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Added Pin To Net: NetName=GND Pin=H2-1
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Added Pin To Net: NetName=GND Pin=H2-1
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Added Pin To Net: NetName=GND Pin=H2-1
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Added Pin To Net: NetName=GND Pin=H2-1
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Added Pin To Net: NetName=GND Pin=H2-1
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Added Pin To Net: NetName=GND Pin=H2-1
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Added Pin To Net: NetName=GND Pin=H2-1
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Added Pin To Net: NetName=GND Pin=H3-1
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Added Pin To Net: NetName=GND Pin=H3-1
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Added Pin To Net: NetName=GND Pin=H3-1
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Added Pin To Net: NetName=GND Pin=H3-1
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Added Pin To Net: NetName=GND Pin=H3-1
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Added Pin To Net: NetName=GND Pin=H3-1
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Added Pin To Net: NetName=GND Pin=H3-1
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Added Pin To Net: NetName=GND Pin=H3-1
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Added Pin To Net: NetName=GND Pin=H3-1
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Added Pin To Net: NetName=GND Pin=H4-1
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Added Pin To Net: NetName=GND Pin=H4-1
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Added Pin To Net: NetName=GND Pin=H4-1
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Added Pin To Net: NetName=GND Pin=H4-1
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Added Pin To Net: NetName=GND Pin=H4-1
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Added Pin To Net: NetName=GND Pin=H4-1
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Added Pin To Net: NetName=GND Pin=H4-1
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Added Pin To Net: NetName=GND Pin=H4-1
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Added Pin To Net: NetName=GND Pin=H4-1
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Added Pin To Net: NetName=PCIE_SW_VDDR_3V3 Pin=U1-D14
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Added Member To Class: ClassName=Pcie_Brige_pwr Member=Component H1 PlatedThrHole
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Added Member To Class: ClassName=Pcie_Brige_pwr Member=Component H2 PlatedThrHole
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Added Member To Class: ClassName=Pcie_Brige_pwr Member=Component H3 PlatedThrHole
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Added Member To Class: ClassName=Pcie_Brige_pwr Member=Component H4 PlatedThrHole
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Added Room: Name=Pcie_Brige_Cfg
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Added Room: Name=Pcie_Brige_Core
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Added Room: Name=Pcie_Brige_pwr
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