296 lines
12 KiB
C
296 lines
12 KiB
C
/*
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* @Description:
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* @Date: 2020-04-17 13:16:16
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* @LastEditors: CK.Zh
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* @LastEditTime: 2021-01-07 18:00:29
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* @FilePath: \NaviKit_stm32\Core\Src\navikit.c
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*/
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/*
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* navikit.c
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*
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* Created on: Apr 17, 2020
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* Author: oarap
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*/
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#include "navikit.h"
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#include "cmsis_os2.h" // ::CMSIS:RTOS2
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NaviKit_t NaviKit;
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void NaviKit_var_init()
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{
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NaviKit.sys.sta = idle;
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NaviKit.sys.next_sta = idle;
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}
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void TaskBeep(uint32_t time_ms , uint8_t n)
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{
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for(uint8_t i=0;i<n;i++){
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HAL_GPIO_WritePin(SYS_BUZZ_CTL_GPIO_Port,SYS_BUZZ_CTL_Pin, GPIO_PIN_RESET);
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osDelay(time_ms>>1);//equal "time divided by 2"
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HAL_GPIO_WritePin(SYS_BUZZ_CTL_GPIO_Port,SYS_BUZZ_CTL_Pin, GPIO_PIN_SET);
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osDelay(time_ms>>1);//equal "time divided by 2"
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}
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}
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void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
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{
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if(hadc->Instance == ADC1)
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{
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// ADC_CHANNEL_TEMPSENSOR ADC_CHANNEL_16 /* ADC internal channel (no connection on device pin) */
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// ADC_CHANNEL_VREFINT ADC_CHANNEL_17 /* ADC internal channel (no connection on device pin) */
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float adc_17_voltage = (float)1.2 / NaviKit.pmb.rails.adc[1];//reference voltage
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NaviKit.pmb.rails.out_24v = (float)(adc_17_voltage * NaviKit.pmb.rails.adc[2] * 16);
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NaviKit.pmb.rails.out_5v = (float)(adc_17_voltage * NaviKit.pmb.rails.adc[3] * 8);
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NaviKit.pmb.rails.out_12v = (float)(adc_17_voltage * NaviKit.pmb.rails.adc[4] * 8);
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NaviKit.pmb.rails.bkp_bat = (float)(adc_17_voltage * NaviKit.pmb.rails.adc[5] * 8);
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NaviKit.pmb.rails.main_pwr = (float)(adc_17_voltage * NaviKit.pmb.rails.adc[6] * 16);
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}
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}
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void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
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{
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HAL_ADCEx_Calibration_Start(&hadc1);
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}
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void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
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{
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switch (GPIO_Pin){
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case SOM_SHUTDOWN_REQ_Pin:{
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if(HAL_GPIO_ReadPin(SOM_SHUTDOWN_REQ_GPIO_Port, SOM_SHUTDOWN_REQ_Pin)==GPIO_PIN_RESET){//falling edge trigger
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if(NaviKit.sys.sta == run){//if jetson nano shutdown output low,the power_en should be set low less than 10us
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PWR_Enable(SOM_PWR_EN,false,0);
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NaviKit.sys.next_sta = idle;
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log_i("SOM's shutdown_req pin falling edge, SOM request to shutdown.");
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}
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}else{//Rising edge trigger
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}
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}break;
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case SOM_MOD_SLEEP_Pin:{
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if(HAL_GPIO_ReadPin(SOM_MOD_SLEEP_GPIO_Port, SOM_MOD_SLEEP_Pin)==GPIO_PIN_SET){//Rising edge trigger
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log_i("SOM's sleep pin rising edge.");
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}else{//falling edge trigger
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log_v("SOM's sleep pin falling edge.");
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}
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}break;
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case SYS_POWER_BTN_Pin:{
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if(HAL_GPIO_ReadPin(SYS_POWER_BTN_GPIO_Port, SYS_POWER_BTN_Pin)==GPIO_PIN_SET){//Rising edge trigger
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NaviKit.sys.power_btn = true;
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log_v("power_btn status: pressed.");
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}else{//falling edge trigger
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NaviKit.sys.power_btn = false;
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log_v("power_btn status: released.");
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}
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}break;
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case SYS_CUSTOM_BTN_Pin:{
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if(HAL_GPIO_ReadPin(SYS_CUSTOM_BTN_GPIO_Port, SYS_CUSTOM_BTN_Pin)==GPIO_PIN_RESET){//falling edge trigger
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log_v("custom_btn status: pressed.");
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NaviKit.sys.custom_btn = true;
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}else{//Rising edge trigger
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log_v("custom_btn status: released.");
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NaviKit.sys.custom_btn = false;
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}
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}break;
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}
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}
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void enter_standby_state(){
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log_i("EC enter to STANDBY Mode to save power, see you!");
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HAL_PWR_EnableWakeUpPin(PWR_WAKEUP_PIN1);//Enable PA0 wakeup function
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__HAL_RCC_RTC_DISABLE();
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HAL_PWR_EnterSTANDBYMode();
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}
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//write "bios update flag" to bkp register, and reset system
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void enter_isp_state()
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{
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ISP_Prepare();
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}
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//timeout:the time of wait
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void enter_idle_state(uint16_t delay)
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{
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log_i("Enter to idle state.");
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TaskBeep(50,1);
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PWR_Enable(SOM_SLEEP,true,delay);
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PWR_Enable(USB3_Port4,false, delay);
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PWR_Enable(USB3_Port3,false, delay);
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PWR_Enable(USB3_Port2,false, delay);
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PWR_Enable(USB3_Port1,false, delay);
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PWR_Enable(USB3_Port6,false, delay);
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PWR_Enable(USB3_Port5,false, delay);
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PWR_Enable(USB2_Port6,false, delay);
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PWR_Enable(USB2_Port5,false, delay);
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PWR_Enable(USB2_Port4,false, delay);
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PWR_Enable(USB2_Port3,false, delay);
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PWR_Enable(USB2_Port2,false, delay);
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PWR_Enable(USB2_Port1,false, delay);
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PWR_Enable(SOC_USB3_HUB ,false, delay);
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PWR_Enable(SOC_USB2_HUB ,false, delay);
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PWR_Enable(SOC_USB3_HOST,false, delay);
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PWR_Enable(SOC_USB3_GEC ,false, delay);
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PWR_Enable(SOC_GE_SW ,false, delay);
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PWR_Enable(SYS_FAN1 ,false , delay);
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PWR_Enable(SYS_FAN2 ,false , delay);
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PWR_Enable(SYS_FAN3 ,false , delay);
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PWR_Enable(SOM_PWR_EN ,false, delay);
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PWR_Enable(PMB_PS_ON ,false , 0);
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}
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void enter_run_state(uint16_t delay)
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{
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log_i("Enter to run state");
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TaskBeep(200,1);
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PWR_Enable(PMB_PS_ON ,true, delay);
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PWR_Enable(SOM_DFU ,false, 0); //disable dfu pin
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PWR_Enable(SOM_RESET , false , 0); //disable reset pin
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PWR_Enable(SYS_FAN1 ,true , delay);
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PWR_Enable(SYS_FAN2 ,true , delay);
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PWR_Enable(SYS_FAN3 ,true , delay);
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PWR_Enable(SOM_PWR_EN , true , delay);
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PWR_Enable(SOC_USB3_HUB ,true , delay);
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PWR_Enable(SOC_USB2_HUB ,true , delay);
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PWR_Enable(SOC_USB3_HOST,true , delay);
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PWR_Enable(SOC_USB3_GEC ,true , delay);
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PWR_Enable(SOC_GE_SW ,true , delay);
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PWR_Enable(USB2_Port1,true , delay);
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PWR_Enable(USB2_Port2,true , delay);
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PWR_Enable(USB2_Port3,true , delay);
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PWR_Enable(USB2_Port4,true , delay);
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PWR_Enable(USB2_Port5,true , delay);
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PWR_Enable(USB2_Port6,true , delay);
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PWR_Enable(USB3_Port5,true , delay);
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PWR_Enable(USB3_Port6,true , delay);
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PWR_Enable(USB3_Port1,true , delay);
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PWR_Enable(USB3_Port2,true , delay);
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PWR_Enable(USB3_Port3,true , delay);
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PWR_Enable(USB3_Port4,true , delay);
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}
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void enter_sleep_state(uint16_t delay)
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{
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log_i("Enter to sleep state.");
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TaskBeep(50,1);
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}
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void enter_dfu_state(uint16_t delay)
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{
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log_i("Enter to DFU state.");
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TaskBeep(500,3);
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PWR_Enable(PMB_PS_ON , true , delay);
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PWR_Enable(SOM_DFU , true , 0);
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PWR_Enable(SOM_RESET , false , 0); //disable reset pin
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PWR_Enable(SYS_FAN1 , true , delay);
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PWR_Enable(SYS_FAN2 , true , delay);
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PWR_Enable(SYS_FAN3 , true , delay);
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PWR_Enable(SOM_PWR_EN , true , delay);
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}
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//para, delay：reset low level signal duration (ms)
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void som_reboot(uint16_t delay){
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log_i("Jetson Nano rebooting...");
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PWR_Enable(SOM_RESET,true,0);
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TaskBeep(100,1);
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PWR_Enable(SOM_RESET,false,0);
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}
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//device power enable or disable
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//delay: After executing the operation delay (ms)
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void PWR_Enable(enum Device_t device,bool en,uint16_t delay){
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switch (device){
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case USB2_Port1: {HAL_GPIO_WritePin(USB2_VBUS_CTL_1_GPIO_Port, USB2_VBUS_CTL_1_Pin, en); }break;
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case USB2_Port2: {HAL_GPIO_WritePin(USB2_VBUS_CTL_2_GPIO_Port, USB2_VBUS_CTL_2_Pin, en); }break;
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case USB2_Port3: {HAL_GPIO_WritePin(USB2_VBUS_CTL_3_GPIO_Port, USB2_VBUS_CTL_3_Pin, en); }break;
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case USB2_Port4: {HAL_GPIO_WritePin(USB2_VBUS_CTL_4_GPIO_Port, USB2_VBUS_CTL_4_Pin, en); }break;
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case USB2_Port5: {HAL_GPIO_WritePin(USB2_VBUS_CTL_5_GPIO_Port, USB2_VBUS_CTL_5_Pin, en); }break;
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case USB2_Port6: {HAL_GPIO_WritePin(USB2_VBUS_CTL_6_GPIO_Port, USB2_VBUS_CTL_6_Pin, en); }break;
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case USB3_Port1: {HAL_GPIO_WritePin(USB3_VBUS_CTL_1_GPIO_Port, USB3_VBUS_CTL_1_Pin, en); }break;
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case USB3_Port2: {HAL_GPIO_WritePin(USB3_VBUS_CTL_2_GPIO_Port, USB3_VBUS_CTL_2_Pin, en); }break;
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case USB3_Port3: {HAL_GPIO_WritePin(USB3_VBUS_CTL_3_GPIO_Port, USB3_VBUS_CTL_3_Pin, en); }break;
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case USB3_Port4: {HAL_GPIO_WritePin(USB3_VBUS_CTL_4_GPIO_Port, USB3_VBUS_CTL_4_Pin, en); }break;
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case USB3_Port5: {HAL_GPIO_WritePin(USB3_VBUS_CTL_5_GPIO_Port, USB3_VBUS_CTL_5_Pin, en); }break;
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case USB3_Port6: {HAL_GPIO_WritePin(USB3_VBUS_CTL_6_GPIO_Port, USB3_VBUS_CTL_6_Pin, en); }break;
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case SOC_USB2_HUB: {HAL_GPIO_WritePin(SOC_U2_HUB_PWR_CTL_GPIO_Port,SOC_U2_HUB_PWR_CTL_Pin, en); }break;
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case SOC_USB3_HUB: {HAL_GPIO_WritePin(SOC_U3_HUB_PWR_CTL_GPIO_Port,SOC_U3_HUB_PWR_CTL_Pin, en); }break;
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case SOC_USB3_HOST: {HAL_GPIO_WritePin(SOC_U3_HOST_PWR_CTL_GPIO_Port,SOC_U3_HOST_PWR_CTL_Pin, en); }break;
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case SOC_USB3_GEC: {HAL_GPIO_WritePin(SOC_U3_GEC_PWR_CTL_GPIO_Port,SOC_U3_GEC_PWR_CTL_Pin, en); }break;
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case SOC_GE_SW: {HAL_GPIO_WritePin(SOC_GE_SW_PWR_CTL_GPIO_Port, SOC_GE_SW_PWR_CTL_Pin, en); }break;
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case SYS_FAN1: {HAL_GPIO_WritePin(SYS_FAN_CTL_1_GPIO_Port, SYS_FAN_CTL_1_Pin, en); }break;
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case SYS_FAN2: {HAL_GPIO_WritePin(SYS_FAN_CTL_2_GPIO_Port, SYS_FAN_CTL_2_Pin, en); }break;
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case SYS_FAN3: {HAL_GPIO_WritePin(SYS_FAN_CTL_3_GPIO_Port, SYS_FAN_CTL_3_Pin, en); }break;
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case SYS_RUN_LED: {HAL_GPIO_WritePin(SYS_RUN_LED_CTL_GPIO_Port, SYS_RUN_LED_CTL_Pin, !en); }break;
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case SYS_PWR_LED: {HAL_GPIO_WritePin(SYS_POWER_LED_CTL_GPIO_Port, SYS_POWER_LED_CTL_Pin, !en); }break;
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case SOM_PWR_EN: {HAL_GPIO_WritePin(SOM_POWER_EN_GPIO_Port, SOM_POWER_EN_Pin, en); }break;
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case SOM_DFU: {HAL_GPIO_WritePin(SOM_FORCE_RECOVERY_GPIO_Port,SOM_FORCE_RECOVERY_Pin, !en); }break;
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case SOM_RESET: {HAL_GPIO_WritePin(SOM_SYS_RESET_GPIO_Port, SOM_SYS_RESET_Pin, !en); }break;
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case SOM_SLEEP: {HAL_GPIO_WritePin(SOM_SLEEP_WAKE_GPIO_Port, SOM_SLEEP_WAKE_Pin, !en); }break;
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case PMB_PS_ON: {HAL_GPIO_WritePin(PMB_PS_ON_GPIO_Port, PMB_PS_ON_Pin, en); }break;
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default: {log_e("PWR_Enable device parameter is invalid."); }break;
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}
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osDelay(delay);
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}
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//check device on board power status
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bool PWR_Status(enum Device_t device){
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bool sta = false;
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switch (device){
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case USB2_Port1: {sta = HAL_GPIO_ReadPin(USB2_VBUS_CTL_1_GPIO_Port,USB2_VBUS_CTL_1_Pin); }break;
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case USB2_Port2: {sta = HAL_GPIO_ReadPin(USB2_VBUS_CTL_2_GPIO_Port,USB2_VBUS_CTL_2_Pin); }break;
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case USB2_Port3: {sta = HAL_GPIO_ReadPin(USB2_VBUS_CTL_3_GPIO_Port,USB2_VBUS_CTL_3_Pin); }break;
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case USB2_Port4: {sta = HAL_GPIO_ReadPin(USB2_VBUS_CTL_4_GPIO_Port,USB2_VBUS_CTL_4_Pin); }break;
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case USB2_Port5: {sta = HAL_GPIO_ReadPin(USB2_VBUS_CTL_5_GPIO_Port,USB2_VBUS_CTL_5_Pin); }break;
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case USB2_Port6: {sta = HAL_GPIO_ReadPin(USB2_VBUS_CTL_6_GPIO_Port,USB2_VBUS_CTL_6_Pin); }break;
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case USB3_Port1: {sta = HAL_GPIO_ReadPin(USB3_VBUS_CTL_1_GPIO_Port,USB3_VBUS_CTL_1_Pin); }break;
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case USB3_Port2: {sta = HAL_GPIO_ReadPin(USB3_VBUS_CTL_2_GPIO_Port,USB3_VBUS_CTL_2_Pin); }break;
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case USB3_Port3: {sta = HAL_GPIO_ReadPin(USB3_VBUS_CTL_3_GPIO_Port,USB3_VBUS_CTL_3_Pin); }break;
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case USB3_Port4: {sta = HAL_GPIO_ReadPin(USB3_VBUS_CTL_4_GPIO_Port,USB3_VBUS_CTL_4_Pin); }break;
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case USB3_Port5: {sta = HAL_GPIO_ReadPin(USB3_VBUS_CTL_5_GPIO_Port,USB3_VBUS_CTL_5_Pin); }break;
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case USB3_Port6: {sta = HAL_GPIO_ReadPin(USB3_VBUS_CTL_6_GPIO_Port,USB3_VBUS_CTL_6_Pin); }break;
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case SOC_USB2_HUB: {sta = HAL_GPIO_ReadPin(SOC_U2_HUB_PWR_CTL_GPIO_Port,SOC_U2_HUB_PWR_CTL_Pin); }break;
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case SOC_USB3_HUB: {sta = HAL_GPIO_ReadPin(SOC_U3_HUB_PWR_CTL_GPIO_Port,SOC_U3_HUB_PWR_CTL_Pin); }break;
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case SOC_USB3_HOST: {sta = HAL_GPIO_ReadPin(SOC_U3_HOST_PWR_CTL_GPIO_Port,SOC_U3_HOST_PWR_CTL_Pin); }break;
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case SOC_USB3_GEC: {sta = HAL_GPIO_ReadPin(SOC_U3_GEC_PWR_CTL_GPIO_Port,SOC_U3_GEC_PWR_CTL_Pin); }break;
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case SOC_GE_SW: {sta = HAL_GPIO_ReadPin(SOC_GE_SW_PWR_CTL_GPIO_Port,SOC_GE_SW_PWR_CTL_Pin); }break;
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case SYS_FAN1: {sta = HAL_GPIO_ReadPin(SYS_FAN_CTL_1_GPIO_Port,SYS_FAN_CTL_1_Pin); }break;
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case SYS_FAN2: {sta = HAL_GPIO_ReadPin(SYS_FAN_CTL_2_GPIO_Port,SYS_FAN_CTL_2_Pin); }break;
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case SYS_FAN3: {sta = HAL_GPIO_ReadPin(SYS_FAN_CTL_3_GPIO_Port,SYS_FAN_CTL_3_Pin); }break;
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case SYS_RUN_LED: {sta = !HAL_GPIO_ReadPin(SYS_RUN_LED_CTL_GPIO_Port,SYS_RUN_LED_CTL_Pin); }break;
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case SYS_PWR_LED: {sta = !HAL_GPIO_ReadPin(SYS_POWER_LED_CTL_GPIO_Port,SYS_POWER_LED_CTL_Pin); }break;
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case SOM_PWR_EN: {sta = HAL_GPIO_ReadPin(SOM_POWER_EN_GPIO_Port,SOM_POWER_EN_Pin); }break;
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case SOM_DFU: {sta = !HAL_GPIO_ReadPin(SOM_FORCE_RECOVERY_GPIO_Port,SOM_FORCE_RECOVERY_Pin); }break;
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case SOM_RESET: {sta = !HAL_GPIO_ReadPin(SOM_SYS_RESET_GPIO_Port,SOM_SYS_RESET_Pin); }break;
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case SOM_SLEEP: {sta = !HAL_GPIO_ReadPin(SOM_SLEEP_WAKE_GPIO_Port,SOM_SLEEP_WAKE_Pin); }break;
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case PMB_PS_ON: {sta = HAL_GPIO_ReadPin(PMB_PS_ON_GPIO_Port,PMB_PS_ON_Pin); }break;
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default: {log_e("PWR_Status device parameter is invalid."); }break;
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}
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return sta;
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}
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