Motion_EC_Stm32_archived/Core/Src/navikit.c

317 lines
13 KiB
C

/*
* @Description:
* @Date: 2020-04-17 13:16:16
* @LastEditors: CK.Zh
* @LastEditTime: 2020-12-30 14:19:14
* @FilePath: \NaviKit_stm32\Core\Src\navikit.c
*/
/*
* navikit.c
*
* Created on: Apr 17, 2020
* Author: oarap
*/
#include "navikit.h"
NaviKit_t NaviKit;
void NaviKit_var_init()
{
NaviKit.sys.sta = idle;
NaviKit.sys.next_sta = idle;
}
void TaskBeep(uint32_t time_ms , uint8_t n)
{
for(uint8_t i=0;i<n;i++){
HAL_GPIO_WritePin(SYS_BUZZ_CTL_GPIO_Port,SYS_BUZZ_CTL_Pin, GPIO_PIN_RESET);
osDelay(time_ms>>1);
HAL_GPIO_WritePin(SYS_BUZZ_CTL_GPIO_Port,SYS_BUZZ_CTL_Pin, GPIO_PIN_SET);
osDelay(time_ms>>1);
}
}
void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
{
if(hadc->Instance == ADC1)
{
// ADC_CHANNEL_TEMPSENSOR ADC_CHANNEL_16 /* ADC internal channel (no connection on device pin) */
// ADC_CHANNEL_VREFINT ADC_CHANNEL_17 /* ADC internal channel (no connection on device pin) */
float adc_17_voltage = (float)1.2 / NaviKit.pmb.rails.adc[1];//reference voltage
NaviKit.pmb.rails.out_24v = (float)(adc_17_voltage * NaviKit.pmb.rails.adc[2] * 16);
NaviKit.pmb.rails.out_5v = (float)(adc_17_voltage * NaviKit.pmb.rails.adc[3] * 8);
NaviKit.pmb.rails.out_12v = (float)(adc_17_voltage * NaviKit.pmb.rails.adc[4] * 8);
NaviKit.pmb.rails.bkp_bat = (float)(adc_17_voltage * NaviKit.pmb.rails.adc[5] * 8);
NaviKit.pmb.rails.main_pwr = (float)(adc_17_voltage * NaviKit.pmb.rails.adc[6] * 16);
}
}
void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
{
HAL_ADCEx_Calibration_Start(&hadc1);
}
void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
{
if(GPIO_Pin == SOM_SHUTDOWN_REQ_Pin){
if(HAL_GPIO_ReadPin(SOM_SHUTDOWN_REQ_GPIO_Port, SOM_SHUTDOWN_REQ_Pin)==GPIO_PIN_RESET){//falling edge trigger
if(NaviKit.sys.sta == run){//if jetson nano shutdown output low,the power_en should be set low less than 10us
HAL_GPIO_WritePin(SOM_POWER_EN_GPIO_Port ,SOM_POWER_EN_Pin, GPIO_PIN_RESET);
NaviKit.sys.next_sta = idle;
Log(info,"SOM request to shutdown");
}
}
else{//Rising edge trigger
}
}
else if(GPIO_Pin == SYS_POWER_BTN_Pin){
if(HAL_GPIO_ReadPin(SYS_POWER_BTN_GPIO_Port, SYS_POWER_BTN_Pin)==GPIO_PIN_SET){//Rising edge trigger
NaviKit.sys.power_btn = true;
Log(debug,"power_btn status: pressed.");
}
if(HAL_GPIO_ReadPin(SYS_POWER_BTN_GPIO_Port, SYS_POWER_BTN_Pin)==GPIO_PIN_RESET){//falling edge trigger
NaviKit.sys.power_btn = false;
Log(debug,"power_btn status: released.");
}
}
else if(GPIO_Pin == SYS_CUSTOM_BTN_Pin){
if(HAL_GPIO_ReadPin(SYS_CUSTOM_BTN_GPIO_Port, SYS_CUSTOM_BTN_Pin)==GPIO_PIN_RESET){//falling edge trigger
Log(debug,"custom_btn status: pressed.");
NaviKit.sys.custom_btn = true;
}
if(HAL_GPIO_ReadPin(SYS_CUSTOM_BTN_GPIO_Port, SYS_CUSTOM_BTN_Pin)==GPIO_PIN_SET){//Rising edge trigger
Log(debug,"custom_btn status: released.");
NaviKit.sys.custom_btn = false;
}
}
}
//write "bios update flag" to bkp register, and reset system
void enter_isp_state()
{
RTC_HandleTypeDef hrtc;
hrtc.Instance = RTC;
__HAL_RCC_PWR_CLK_ENABLE();
__HAL_RCC_BKP_CLK_ENABLE();
__HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_HSE_DIV128);
__HAL_RCC_RTC_ENABLE();
HAL_PWR_EnableBkUpAccess();
HAL_RTCEx_BKUPWrite(&hrtc,ISP_BKP_DR,BKP_DR_Jump_to_ISP);
osDelay(10);
if(HAL_RTCEx_BKUPRead(&hrtc,ISP_BKP_DR) == BKP_DR_Jump_to_ISP)
{//write successful
TaskBeep(500,5);
Log(info,"Enter to EC update state.");
Log(info,"System will reboot ,then run ISP automatic.");
HAL_NVIC_SystemReset();
}
else{
Log(error,"Backup register writen error, can not enter EC update state.");
}
}
//timeout:the time of wait
void enter_idle_state(uint16_t delay)
{
Log(info,"Enter to idle state");
TaskBeep(50,1);
PWR_Enable(SOM_PWR_EN ,false, delay);
PWR_Enable(SOC_USB3_HUB ,false, delay);
PWR_Enable(SOC_USB2_HUB ,false, delay);
PWR_Enable(SOC_USB3_HOST,false, delay);
PWR_Enable(SOC_USB3_GEC ,false, delay);
PWR_Enable(SOC_GE_SW ,false, delay);
PWR_Enable(USB3_Port4,false, delay);
PWR_Enable(USB3_Port3,false, delay);
PWR_Enable(USB3_Port2,false, delay);
PWR_Enable(USB3_Port1,false, delay);
PWR_Enable(USB3_Port6,false, delay);
PWR_Enable(USB3_Port5,false, delay);
PWR_Enable(USB2_Port6,false, delay);
PWR_Enable(USB2_Port5,false, delay);
PWR_Enable(USB2_Port4,false, delay);
PWR_Enable(USB2_Port3,false, delay);
PWR_Enable(USB2_Port2,false, delay);
PWR_Enable(USB2_Port1,false, delay);
PWR_Enable(SYS_FAN1 ,false , delay);
PWR_Enable(SYS_FAN2 ,false , delay);
PWR_Enable(SYS_FAN3 ,false , delay);
PWR_Enable(PMB_PS_ON ,false , delay);
}
void enter_run_state(uint16_t delay)
{
Log(info,"Enter to run state");
TaskBeep(200,1);
PWR_Enable(SOM_DFU ,false, delay);
PWR_Enable(PMB_PS_ON ,true, delay);
PWR_Enable(SYS_FAN1 ,true , delay);
PWR_Enable(SYS_FAN2 ,true , delay);
PWR_Enable(SYS_FAN3 ,true , delay);
PWR_Enable(SOC_USB3_HUB ,true , delay);
PWR_Enable(SOC_USB2_HUB ,true , delay);
PWR_Enable(SOC_USB3_HOST,true , delay);
PWR_Enable(SOC_USB3_GEC ,true , delay);
PWR_Enable(SOC_GE_SW ,true , delay);
PWR_Enable(USB2_Port1,true , delay);
PWR_Enable(USB2_Port2,true , delay);
PWR_Enable(USB2_Port3,true , delay);
PWR_Enable(USB2_Port4,true , delay);
PWR_Enable(USB2_Port5,true , delay);
PWR_Enable(USB2_Port6,true , delay);
PWR_Enable(USB3_Port5,true , delay);
PWR_Enable(USB3_Port6,true , delay);
PWR_Enable(USB3_Port1,true , delay);
PWR_Enable(USB3_Port2,true , delay);
PWR_Enable(USB3_Port3,true , delay);
PWR_Enable(USB3_Port4,true , delay);
PWR_Enable(SOM_PWR_EN , true , delay);
}
void enter_sleep_state(uint16_t delay)
{
Log(info,"Enter to sleep state");
TaskBeep(50,1);
}
void enter_dfu_state(uint16_t delay)
{
Log(info,"Enter to DFU state");
TaskBeep(500,3);
PWR_Enable(SOM_DFU , true , delay);
PWR_Enable(PMB_PS_ON , true , delay);
PWR_Enable(SYS_FAN1 , true , delay);
PWR_Enable(SYS_FAN2 , true , delay);
PWR_Enable(SYS_FAN3 , true , delay);
PWR_Enable(SOC_USB3_HUB , true , delay);
PWR_Enable(SOC_USB2_HUB , true , delay);
PWR_Enable(SOC_USB3_HOST , true , delay);
PWR_Enable(SOC_USB3_GEC , true , delay);
PWR_Enable(SOC_GE_SW , true , delay);
PWR_Enable(USB2_Port1 , true , delay);
PWR_Enable(USB2_Port2 , true , delay);
PWR_Enable(USB2_Port3 , true , delay);
PWR_Enable(USB2_Port4 , true , delay);
PWR_Enable(USB2_Port5 , true , delay);
PWR_Enable(USB2_Port6 , true , delay);
PWR_Enable(USB2_Port1 , true , delay);
PWR_Enable(USB2_Port1 , true , delay);
PWR_Enable(USB3_Port5,true , delay);
PWR_Enable(USB3_Port6,true , delay);
PWR_Enable(USB3_Port1,true , delay);
PWR_Enable(USB3_Port2,true , delay);
PWR_Enable(USB3_Port3,true , delay);
PWR_Enable(USB3_Port4,true , delay);
PWR_Enable(SOM_PWR_EN , true , delay);
//
// HAL_GPIO_WritePin(SOM_FORCE_RECOVERY_GPIO_Port ,SOM_FORCE_RECOVERY_Pin, GPIO_PIN_RESET); HAL_Delay(100);
// HAL_GPIO_WritePin(SOM_SYS_RESET_GPIO_Port ,SOM_SYS_RESET_Pin, GPIO_PIN_RESET); HAL_Delay(100);
//
// HAL_Delay(5000);
// HAL_GPIO_WritePin(SOM_SYS_RESET_GPIO_Port ,SOM_SYS_RESET_Pin, GPIO_PIN_SET); HAL_Delay(100);
// HAL_GPIO_WritePin(SOM_FORCE_RECOVERY_GPIO_Port ,SOM_FORCE_RECOVERY_Pin, GPIO_PIN_SET); HAL_Delay(100);
}
//device power enable or disable
//delay: After executing the operation delay (ms)
void PWR_Enable(enum Device_t device,bool en,uint16_t delay){
switch (device){
case USB2_Port1: {HAL_GPIO_WritePin(USB2_VBUS_CTL_1_GPIO_Port,USB2_VBUS_CTL_1_Pin, en); }break;
case USB2_Port2: {HAL_GPIO_WritePin(USB2_VBUS_CTL_2_GPIO_Port,USB2_VBUS_CTL_2_Pin, en); }break;
case USB2_Port3: {HAL_GPIO_WritePin(USB2_VBUS_CTL_3_GPIO_Port,USB2_VBUS_CTL_3_Pin, en); }break;
case USB2_Port4: {HAL_GPIO_WritePin(USB2_VBUS_CTL_4_GPIO_Port,USB2_VBUS_CTL_4_Pin, en); }break;
case USB2_Port5: {HAL_GPIO_WritePin(USB2_VBUS_CTL_5_GPIO_Port,USB2_VBUS_CTL_5_Pin, en); }break;
case USB2_Port6: {HAL_GPIO_WritePin(USB2_VBUS_CTL_6_GPIO_Port,USB2_VBUS_CTL_6_Pin, en); }break;
case USB3_Port1: {HAL_GPIO_WritePin(USB3_VBUS_CTL_1_GPIO_Port,USB3_VBUS_CTL_1_Pin, en); }break;
case USB3_Port2: {HAL_GPIO_WritePin(USB3_VBUS_CTL_2_GPIO_Port,USB3_VBUS_CTL_2_Pin, en); }break;
case USB3_Port3: {HAL_GPIO_WritePin(USB3_VBUS_CTL_3_GPIO_Port,USB3_VBUS_CTL_3_Pin, en); }break;
case USB3_Port4: {HAL_GPIO_WritePin(USB3_VBUS_CTL_4_GPIO_Port,USB3_VBUS_CTL_4_Pin, en); }break;
case USB3_Port5: {HAL_GPIO_WritePin(USB3_VBUS_CTL_5_GPIO_Port,USB3_VBUS_CTL_5_Pin, en); }break;
case USB3_Port6: {HAL_GPIO_WritePin(USB3_VBUS_CTL_6_GPIO_Port,USB3_VBUS_CTL_6_Pin, en); }break;
case SOC_USB2_HUB: {HAL_GPIO_WritePin(SOC_U2_HUB_PWR_CTL_GPIO_Port,SOC_U2_HUB_PWR_CTL_Pin, en); }break;
case SOC_USB3_HUB: {HAL_GPIO_WritePin(SOC_U3_HUB_PWR_CTL_GPIO_Port,SOC_U3_HUB_PWR_CTL_Pin, en); }break;
case SOC_USB3_HOST: {HAL_GPIO_WritePin(SOC_U3_HOST_PWR_CTL_GPIO_Port,SOC_U3_HOST_PWR_CTL_Pin, en); }break;
case SOC_USB3_GEC: {HAL_GPIO_WritePin(SOC_U3_GEC_PWR_CTL_GPIO_Port,SOC_U3_GEC_PWR_CTL_Pin, en); }break;
case SOC_GE_SW: {HAL_GPIO_WritePin(SOC_GE_SW_PWR_CTL_GPIO_Port,SOC_GE_SW_PWR_CTL_Pin, en); }break;
case SYS_FAN1: {HAL_GPIO_WritePin(SYS_FAN_CTL_1_GPIO_Port,SYS_FAN_CTL_1_Pin, en); }break;
case SYS_FAN2: {HAL_GPIO_WritePin(SYS_FAN_CTL_2_GPIO_Port,SYS_FAN_CTL_2_Pin, en); }break;
case SYS_FAN3: {HAL_GPIO_WritePin(SYS_FAN_CTL_3_GPIO_Port,SYS_FAN_CTL_3_Pin, en); }break;
case SYS_RUN_LED: {HAL_GPIO_WritePin(SYS_RUN_LED_CTL_GPIO_Port,SYS_RUN_LED_CTL_Pin, !en); }break;
case SYS_PWR_LED: {HAL_GPIO_WritePin(SYS_POWER_LED_CTL_GPIO_Port,SYS_POWER_LED_CTL_Pin, !en); }break;
case SOM_PWR_EN: {HAL_GPIO_WritePin(SOM_POWER_EN_GPIO_Port,SOM_POWER_EN_Pin, en); }break;
case SOM_DFU: {HAL_GPIO_WritePin(SOM_FORCE_RECOVERY_GPIO_Port,SOM_FORCE_RECOVERY_Pin, !en); }break;
case SOM_RESET: {HAL_GPIO_WritePin(SOM_SYS_RESET_GPIO_Port,SOM_SYS_RESET_Pin, !en); }break;
case PMB_PS_ON: {HAL_GPIO_WritePin(PMB_PS_ON_GPIO_Port,PMB_PS_ON_Pin, en); }break;
default: {Log(error,"PWR_Enable device parameter is invalid."); }break;
}
osDelay(delay);
}
//check device on board power status
bool PWR_Status(enum Device_t device){
bool sta = false;
switch (device){
case USB2_Port1: {sta = HAL_GPIO_ReadPin(USB2_VBUS_CTL_1_GPIO_Port,USB2_VBUS_CTL_1_Pin); }break;
case USB2_Port2: {sta = HAL_GPIO_ReadPin(USB2_VBUS_CTL_2_GPIO_Port,USB2_VBUS_CTL_2_Pin); }break;
case USB2_Port3: {sta = HAL_GPIO_ReadPin(USB2_VBUS_CTL_3_GPIO_Port,USB2_VBUS_CTL_3_Pin); }break;
case USB2_Port4: {sta = HAL_GPIO_ReadPin(USB2_VBUS_CTL_4_GPIO_Port,USB2_VBUS_CTL_4_Pin); }break;
case USB2_Port5: {sta = HAL_GPIO_ReadPin(USB2_VBUS_CTL_5_GPIO_Port,USB2_VBUS_CTL_5_Pin); }break;
case USB2_Port6: {sta = HAL_GPIO_ReadPin(USB2_VBUS_CTL_6_GPIO_Port,USB2_VBUS_CTL_6_Pin); }break;
case USB3_Port1: {sta = HAL_GPIO_ReadPin(USB3_VBUS_CTL_1_GPIO_Port,USB3_VBUS_CTL_1_Pin); }break;
case USB3_Port2: {sta = HAL_GPIO_ReadPin(USB3_VBUS_CTL_2_GPIO_Port,USB3_VBUS_CTL_2_Pin); }break;
case USB3_Port3: {sta = HAL_GPIO_ReadPin(USB3_VBUS_CTL_3_GPIO_Port,USB3_VBUS_CTL_3_Pin); }break;
case USB3_Port4: {sta = HAL_GPIO_ReadPin(USB3_VBUS_CTL_4_GPIO_Port,USB3_VBUS_CTL_4_Pin); }break;
case USB3_Port5: {sta = HAL_GPIO_ReadPin(USB3_VBUS_CTL_5_GPIO_Port,USB3_VBUS_CTL_5_Pin); }break;
case USB3_Port6: {sta = HAL_GPIO_ReadPin(USB3_VBUS_CTL_6_GPIO_Port,USB3_VBUS_CTL_6_Pin); }break;
case SOC_USB2_HUB: {sta = HAL_GPIO_ReadPin(SOC_U2_HUB_PWR_CTL_GPIO_Port,SOC_U2_HUB_PWR_CTL_Pin); }break;
case SOC_USB3_HUB: {sta = HAL_GPIO_ReadPin(SOC_U3_HUB_PWR_CTL_GPIO_Port,SOC_U3_HUB_PWR_CTL_Pin); }break;
case SOC_USB3_HOST: {sta = HAL_GPIO_ReadPin(SOC_U3_HOST_PWR_CTL_GPIO_Port,SOC_U3_HOST_PWR_CTL_Pin); }break;
case SOC_USB3_GEC: {sta = HAL_GPIO_ReadPin(SOC_U3_GEC_PWR_CTL_GPIO_Port,SOC_U3_GEC_PWR_CTL_Pin); }break;
case SOC_GE_SW: {sta = HAL_GPIO_ReadPin(SOC_GE_SW_PWR_CTL_GPIO_Port,SOC_GE_SW_PWR_CTL_Pin); }break;
case SYS_FAN1: {sta = HAL_GPIO_ReadPin(SYS_FAN_CTL_1_GPIO_Port,SYS_FAN_CTL_1_Pin); }break;
case SYS_FAN2: {sta = HAL_GPIO_ReadPin(SYS_FAN_CTL_2_GPIO_Port,SYS_FAN_CTL_2_Pin); }break;
case SYS_FAN3: {sta = HAL_GPIO_ReadPin(SYS_FAN_CTL_3_GPIO_Port,SYS_FAN_CTL_3_Pin); }break;
case SYS_RUN_LED: {sta = !HAL_GPIO_ReadPin(SYS_RUN_LED_CTL_GPIO_Port,SYS_RUN_LED_CTL_Pin); }break;
case SYS_PWR_LED: {sta = !HAL_GPIO_ReadPin(SYS_POWER_LED_CTL_GPIO_Port,SYS_POWER_LED_CTL_Pin); }break;
case SOM_PWR_EN: {sta = HAL_GPIO_ReadPin(SOM_POWER_EN_GPIO_Port,SOM_POWER_EN_Pin); }break;
case SOM_DFU: {sta = !HAL_GPIO_ReadPin(SOM_FORCE_RECOVERY_GPIO_Port,SOM_FORCE_RECOVERY_Pin); }break;
case SOM_RESET: {sta = !HAL_GPIO_ReadPin(SOM_SYS_RESET_GPIO_Port,SOM_SYS_RESET_Pin); }break;
case PMB_PS_ON: {sta = HAL_GPIO_ReadPin(PMB_PS_ON_GPIO_Port,PMB_PS_ON_Pin); }break;
default: {Log(error,"PWR_Status device parameter is invalid."); }break;
}
return sta;
}