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enable DMA for uart1 and uart4

master
ThinkPad-T460P 2021-03-10 14:43:41 +08:00
parent 237bf3fd38
commit e018861597
3 changed files with 159 additions and 0 deletions
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1
Core/Src/dma.c
View File

@ -40,6 +40,7 @@ void MX_DMA_Init(void)
/* DMA controller clock enable */ /* DMA controller clock enable */
__HAL_RCC_DMA1_CLK_ENABLE(); __HAL_RCC_DMA1_CLK_ENABLE();
__HAL_RCC_DMA2_CLK_ENABLE();
} }

60
Core/Src/stm32f1xx_it.c
View File

@ -61,6 +61,10 @@ extern DMA_HandleTypeDef hdma_adc1;
extern ADC_HandleTypeDef hadc1; extern ADC_HandleTypeDef hadc1;
extern I2C_HandleTypeDef hi2c1; extern I2C_HandleTypeDef hi2c1;
extern RTC_HandleTypeDef hrtc; extern RTC_HandleTypeDef hrtc;
extern DMA_HandleTypeDef hdma_uart4_rx;
extern DMA_HandleTypeDef hdma_uart4_tx;
extern DMA_HandleTypeDef hdma_usart1_tx;
extern DMA_HandleTypeDef hdma_usart1_rx;
extern UART_HandleTypeDef huart4; extern UART_HandleTypeDef huart4;
extern UART_HandleTypeDef huart1; extern UART_HandleTypeDef huart1;
extern TIM_HandleTypeDef htim1; extern TIM_HandleTypeDef htim1;
@ -276,6 +280,34 @@ void DMA1_Channel1_IRQHandler(void)
/* USER CODE END DMA1_Channel1_IRQn 1 */ /* USER CODE END DMA1_Channel1_IRQn 1 */
} }
/**
* @brief This function handles DMA1 channel4 global interrupt.
*/
void DMA1_Channel4_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Channel4_IRQn 0 */
/* USER CODE END DMA1_Channel4_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_usart1_tx);
/* USER CODE BEGIN DMA1_Channel4_IRQn 1 */
/* USER CODE END DMA1_Channel4_IRQn 1 */
}
/**
* @brief This function handles DMA1 channel5 global interrupt.
*/
void DMA1_Channel5_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Channel5_IRQn 0 */
/* USER CODE END DMA1_Channel5_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_usart1_rx);
/* USER CODE BEGIN DMA1_Channel5_IRQn 1 */
/* USER CODE END DMA1_Channel5_IRQn 1 */
}
/** /**
* @brief This function handles ADC1 and ADC2 global interrupts. * @brief This function handles ADC1 and ADC2 global interrupts.
*/ */
@ -391,6 +423,34 @@ void UART4_IRQHandler(void)
/* USER CODE END UART4_IRQn 1 */ /* USER CODE END UART4_IRQn 1 */
} }
/**
* @brief This function handles DMA2 channel3 global interrupt.
*/
void DMA2_Channel3_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Channel3_IRQn 0 */
/* USER CODE END DMA2_Channel3_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_uart4_rx);
/* USER CODE BEGIN DMA2_Channel3_IRQn 1 */
/* USER CODE END DMA2_Channel3_IRQn 1 */
}
/**
* @brief This function handles DMA2 channel5 global interrupt.
*/
void DMA2_Channel5_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Channel5_IRQn 0 */
/* USER CODE END DMA2_Channel5_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_uart4_tx);
/* USER CODE BEGIN DMA2_Channel5_IRQn 1 */
/* USER CODE END DMA2_Channel5_IRQn 1 */
}
/** /**
* @brief This function handles USB OTG FS global interrupt. * @brief This function handles USB OTG FS global interrupt.
*/ */

98
Core/Src/usart.c
View File

@ -26,11 +26,22 @@
UART_HandleTypeDef huart4; UART_HandleTypeDef huart4;
UART_HandleTypeDef huart1; UART_HandleTypeDef huart1;
DMA_HandleTypeDef hdma_uart4_rx;
DMA_HandleTypeDef hdma_uart4_tx;
DMA_HandleTypeDef hdma_usart1_tx;
DMA_HandleTypeDef hdma_usart1_rx;
/* UART4 init function */ /* UART4 init function */
void MX_UART4_Init(void) void MX_UART4_Init(void)
{ {
/* USER CODE BEGIN UART4_Init 0 */
/* USER CODE END UART4_Init 0 */
/* USER CODE BEGIN UART4_Init 1 */
/* USER CODE END UART4_Init 1 */
huart4.Instance = UART4; huart4.Instance = UART4;
huart4.Init.BaudRate = 56000; huart4.Init.BaudRate = 56000;
huart4.Init.WordLength = UART_WORDLENGTH_8B; huart4.Init.WordLength = UART_WORDLENGTH_8B;
@ -43,6 +54,9 @@ void MX_UART4_Init(void)
{ {
Error_Handler(); Error_Handler();
} }
/* USER CODE BEGIN UART4_Init 2 */
/* USER CODE END UART4_Init 2 */
} }
/* USART1 init function */ /* USART1 init function */
@ -50,6 +64,13 @@ void MX_UART4_Init(void)
void MX_USART1_UART_Init(void) void MX_USART1_UART_Init(void)
{ {
/* USER CODE BEGIN USART1_Init 0 */
/* USER CODE END USART1_Init 0 */
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1; huart1.Instance = USART1;
huart1.Init.BaudRate = 56000; huart1.Init.BaudRate = 56000;
huart1.Init.WordLength = UART_WORDLENGTH_8B; huart1.Init.WordLength = UART_WORDLENGTH_8B;
@ -62,6 +83,9 @@ void MX_USART1_UART_Init(void)
{ {
Error_Handler(); Error_Handler();
} }
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
} }
@ -92,6 +116,39 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
/* UART4 DMA Init */
/* UART4_RX Init */
hdma_uart4_rx.Instance = DMA2_Channel3;
hdma_uart4_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_uart4_rx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_uart4_rx.Init.MemInc = DMA_MINC_ENABLE;
hdma_uart4_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_uart4_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_uart4_rx.Init.Mode = DMA_NORMAL;
hdma_uart4_rx.Init.Priority = DMA_PRIORITY_LOW;
if (HAL_DMA_Init(&hdma_uart4_rx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmarx,hdma_uart4_rx);
/* UART4_TX Init */
hdma_uart4_tx.Instance = DMA2_Channel5;
hdma_uart4_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_uart4_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_uart4_tx.Init.MemInc = DMA_MINC_ENABLE;
hdma_uart4_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_uart4_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_uart4_tx.Init.Mode = DMA_NORMAL;
hdma_uart4_tx.Init.Priority = DMA_PRIORITY_LOW;
if (HAL_DMA_Init(&hdma_uart4_tx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmatx,hdma_uart4_tx);
/* USER CODE BEGIN UART4_MspInit 1 */ /* USER CODE BEGIN UART4_MspInit 1 */
/* USER CODE END UART4_MspInit 1 */ /* USER CODE END UART4_MspInit 1 */
@ -119,6 +176,39 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USART1 DMA Init */
/* USART1_TX Init */
hdma_usart1_tx.Instance = DMA1_Channel4;
hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_usart1_tx.Init.Mode = DMA_NORMAL;
hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart1_tx);
/* USART1_RX Init */
hdma_usart1_rx.Instance = DMA1_Channel5;
hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_usart1_rx.Init.Mode = DMA_NORMAL;
hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmarx,hdma_usart1_rx);
/* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE BEGIN USART1_MspInit 1 */
/* USER CODE END USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */
@ -142,6 +232,10 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
*/ */
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10|GPIO_PIN_11); HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10|GPIO_PIN_11);
/* UART4 DMA DeInit */
HAL_DMA_DeInit(uartHandle->hdmarx);
HAL_DMA_DeInit(uartHandle->hdmatx);
/* UART4 interrupt Deinit */ /* UART4 interrupt Deinit */
HAL_NVIC_DisableIRQ(UART4_IRQn); HAL_NVIC_DisableIRQ(UART4_IRQn);
/* USER CODE BEGIN UART4_MspDeInit 1 */ /* USER CODE BEGIN UART4_MspDeInit 1 */
@ -162,6 +256,10 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
*/ */
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10); HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
/* USART1 DMA DeInit */
HAL_DMA_DeInit(uartHandle->hdmatx);
HAL_DMA_DeInit(uartHandle->hdmarx);
/* USART1 interrupt Deinit */ /* USART1 interrupt Deinit */
HAL_NVIC_DisableIRQ(USART1_IRQn); HAL_NVIC_DisableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_MspDeInit 1 */ /* USER CODE BEGIN USART1_MspDeInit 1 */