master
张程凯 2022-01-10 16:20:39 +08:00
commit 5bf7f6a0a8
2199 changed files with 867237 additions and 0 deletions

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.config Normal file
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#
# Automatically generated file; DO NOT EDIT.
# RT-Thread Project Configuration
#
#
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_BIG_ENDIAN is not set
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_HOOK_USING_FUNC_PTR=y
CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=256
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
#
# kservice optimization
#
# CONFIG_RT_KSERVICE_USING_STDLIB is not set
# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
# CONFIG_RT_USING_TINY_FFS is not set
# CONFIG_RT_PRINTF_LONGLONG is not set
CONFIG_RT_DEBUG=y
# CONFIG_RT_DEBUG_COLOR is not set
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
#
# Inter-Thread communication
#
CONFIG_RT_USING_SEMAPHORE=y
CONFIG_RT_USING_MUTEX=y
CONFIG_RT_USING_EVENT=y
CONFIG_RT_USING_MAILBOX=y
CONFIG_RT_USING_MESSAGEQUEUE=y
# CONFIG_RT_USING_SIGNALS is not set
#
# Memory Management
#
CONFIG_RT_USING_MEMPOOL=y
CONFIG_RT_USING_SMALL_MEM=y
# CONFIG_RT_USING_SLAB is not set
# CONFIG_RT_USING_MEMHEAP is not set
CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y
# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set
# CONFIG_RT_USING_SLAB_AS_HEAP is not set
# CONFIG_RT_USING_USERHEAP is not set
# CONFIG_RT_USING_NOHEAP is not set
# CONFIG_RT_USING_MEMTRACE is not set
# CONFIG_RT_USING_HEAP_ISR is not set
CONFIG_RT_USING_HEAP=y
#
# Kernel Device Object
#
CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_DEVICE_OPS is not set
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
CONFIG_RT_VER_NUM=0x40100
# CONFIG_RT_USING_CPU_FFS is not set
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
#
# RT-Thread Components
#
CONFIG_RT_USING_COMPONENTS_INIT=y
CONFIG_RT_USING_USER_MAIN=y
CONFIG_RT_MAIN_THREAD_STACK_SIZE=512
CONFIG_RT_MAIN_THREAD_PRIORITY=10
# CONFIG_RT_USING_LEGACY is not set
#
# C++ features
#
# CONFIG_RT_USING_CPLUSPLUS is not set
#
# Command shell
#
CONFIG_RT_USING_FINSH=y
CONFIG_RT_USING_MSH=y
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_THREAD_NAME="tshell"
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=512
CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_CMD_SIZE=80
CONFIG_MSH_USING_BUILT_IN_COMMANDS=y
CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_ARG_MAX=10
#
# Device virtual file system
#
# CONFIG_RT_USING_DFS is not set
#
# Device Drivers
#
CONFIG_RT_USING_DEVICE_IPC=y
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
CONFIG_RT_USING_SERIAL=y
CONFIG_RT_USING_SERIAL_V1=y
# CONFIG_RT_USING_SERIAL_V2 is not set
# CONFIG_RT_SERIAL_USING_DMA is not set
CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
# CONFIG_RT_USING_PHY is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_DAC is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_WIFI is not set
#
# Using USB
#
# CONFIG_RT_USING_USB is not set
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
#
# POSIX layer and C standard library
#
# CONFIG_RT_USING_MODULE is not set
CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
#
# POSIX (Portable Operating System Interface) layer
#
# CONFIG_RT_USING_POSIX_FS is not set
# CONFIG_RT_USING_POSIX_DELAY is not set
# CONFIG_RT_USING_POSIX_CLOCK is not set
# CONFIG_RT_USING_PTHREADS is not set
#
# Interprocess Communication (IPC)
#
# CONFIG_RT_USING_POSIX_PIPE is not set
# CONFIG_RT_USING_POSIX_MESSAGE_QUEUE is not set
# CONFIG_RT_USING_POSIX_MESSAGE_SEMAPHORE is not set
#
# Socket is in the 'Network' category
#
#
# Network
#
#
# Socket abstraction layer
#
# CONFIG_RT_USING_SAL is not set
#
# Network interface device
#
# CONFIG_RT_USING_NETDEV is not set
#
# light weight TCP/IP stack
#
# CONFIG_RT_USING_LWIP is not set
#
# AT commands
#
# CONFIG_RT_USING_AT is not set
#
# VBUS(Virtual Software BUS)
#
# CONFIG_RT_USING_VBUS is not set
#
# Utilities
#
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
# CONFIG_RT_USING_VAR_EXPORT is not set
# CONFIG_RT_USING_RT_LINK is not set
#
# RT-Thread Utestcases
#
# CONFIG_RT_USING_UTESTCASES is not set
#
# RT-Thread online packages
#
#
# IoT - internet of things
#
# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_UMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_WEBNET is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_MYMQTT is not set
# CONFIG_PKG_USING_KAWAII_MQTT is not set
# CONFIG_PKG_USING_BC28_MQTT is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
#
# Wi-Fi
#
#
# Marvell WiFi
#
# CONFIG_PKG_USING_WLANMARVELL is not set
#
# Wiced WiFi
#
# CONFIG_PKG_USING_WLAN_WICED is not set
# CONFIG_PKG_USING_RW007 is not set
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_CMUX is not set
# CONFIG_PKG_USING_PPP_DEVICE is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
# CONFIG_PKG_USING_WIZNET is not set
# CONFIG_PKG_USING_ZB_COORDINATOR is not set
#
# IoT Cloud
#
# CONFIG_PKG_USING_ONENET is not set
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
# CONFIG_PKG_USING_JIOT-C-SDK is not set
# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
# CONFIG_PKG_USING_JOYLINK is not set
# CONFIG_PKG_USING_EZ_IOT_OS is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
# CONFIG_PKG_USING_IPMSG is not set
# CONFIG_PKG_USING_LSSDP is not set
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
# CONFIG_PKG_USING_LIBRWS is not set
# CONFIG_PKG_USING_TCPSERVER is not set
# CONFIG_PKG_USING_PROTOBUF_C is not set
# CONFIG_PKG_USING_DLT645 is not set
# CONFIG_PKG_USING_QXWZ is not set
# CONFIG_PKG_USING_SMTP_CLIENT is not set
# CONFIG_PKG_USING_ABUP_FOTA is not set
# CONFIG_PKG_USING_LIBCURL2RTT is not set
# CONFIG_PKG_USING_CAPNP is not set
# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
# CONFIG_PKG_USING_AGILE_TELNET is not set
# CONFIG_PKG_USING_NMEALIB is not set
# CONFIG_PKG_USING_AGILE_JSMN is not set
# CONFIG_PKG_USING_PDULIB is not set
# CONFIG_PKG_USING_BTSTACK is not set
# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
# CONFIG_PKG_USING_MAVLINK is not set
# CONFIG_PKG_USING_RAPIDJSON is not set
# CONFIG_PKG_USING_BSAL is not set
# CONFIG_PKG_USING_AGILE_MODBUS is not set
# CONFIG_PKG_USING_AGILE_FTP is not set
# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
# CONFIG_PKG_USING_RT_LINK_HW is not set
# CONFIG_PKG_USING_LORA_PKT_FWD is not set
# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set
# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set
# CONFIG_PKG_USING_HM is not set
# CONFIG_PKG_USING_SMALL_MODBUS is not set
# CONFIG_PKG_USING_NET_SERVER is not set
#
# security packages
#
# CONFIG_PKG_USING_MBEDTLS is not set
# CONFIG_PKG_USING_LIBSODIUM is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
# CONFIG_PKG_USING_TFM is not set
# CONFIG_PKG_USING_YD_CRYPTO is not set
#
# language packages
#
# CONFIG_PKG_USING_LUA is not set
# CONFIG_PKG_USING_JERRYSCRIPT is not set
# CONFIG_PKG_USING_MICROPYTHON is not set
# CONFIG_PKG_USING_PIKASCRIPT is not set
#
# multimedia packages
#
#
# LVGL: powerful and easy-to-use embedded GUI library
#
# CONFIG_PKG_USING_LVGL is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
#
# u8g2: a monochrome graphic library
#
# CONFIG_PKG_USING_U8G2_OFFICIAL is not set
# CONFIG_PKG_USING_U8G2 is not set
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
# CONFIG_PKG_USING_STEMWIN is not set
# CONFIG_PKG_USING_WAVPLAYER is not set
# CONFIG_PKG_USING_TJPGD is not set
# CONFIG_PKG_USING_PDFGEN is not set
# CONFIG_PKG_USING_HELIX is not set
# CONFIG_PKG_USING_AZUREGUIX is not set
# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
# CONFIG_PKG_USING_NUEMWIN is not set
# CONFIG_PKG_USING_MP3PLAYER is not set
# CONFIG_PKG_USING_TINYJPEG is not set
# CONFIG_PKG_USING_UGUI is not set
#
# PainterEngine: A cross-platform graphics application framework written in C language
#
# CONFIG_PKG_USING_PAINTERENGINE is not set
# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set
# CONFIG_PKG_USING_MCURSES is not set
# CONFIG_PKG_USING_TERMBOX is not set
# CONFIG_PKG_USING_VT100 is not set
#
# tools packages
#
# CONFIG_PKG_USING_CMBACKTRACE is not set
CONFIG_PKG_USING_EASYFLASH=y
CONFIG_PKG_EASYFLASH_PATH="/packages/tools/EasyFlash"
CONFIG_PKG_EASYFLASH_ENV=y
# CONFIG_PKG_EASYFLASH_ENV_AUTO_UPDATE is not set
# CONFIG_PKG_EASYFLASH_LOG is not set
# CONFIG_PKG_EASYFLASH_IAP is not set
CONFIG_PKG_EASYFLASH_ERASE_GRAN=4096
CONFIG_PKG_EASYFLASH_WRITE_GRAN_1BIT=y
# CONFIG_PKG_EASYFLASH_WRITE_GRAN_8BITS is not set
# CONFIG_PKG_EASYFLASH_WRITE_GRAN_32BITS is not set
CONFIG_PKG_EASYFLASH_WRITE_GRAN=1
CONFIG_PKG_EASYFLASH_START_ADDR=0
CONFIG_PKG_EASYFLASH_DEBUG=y
CONFIG_PKG_USING_EASYFLASH_V410=y
# CONFIG_PKG_USING_EASYFLASH_V400 is not set
# CONFIG_PKG_USING_EASYFLASH_V330 is not set
# CONFIG_PKG_USING_EASYFLASH_V321 is not set
# CONFIG_PKG_USING_EASYFLASH_V310 is not set
# CONFIG_PKG_USING_EASYFLASH_V300 is not set
# CONFIG_PKG_USING_EASYFLASH_LATEST_VERSION is not set
CONFIG_PKG_EASYFLASH_VER="v4.1.0"
CONFIG_PKG_EASYFLASH_VER_NUM=0x40100
CONFIG_PKG_USING_EASYLOGGER=y
#
# EasyLogger Options
#
CONFIG_PKG_EASYLOGGER_ENABLE_OUTPUT=y
# CONFIG_PKG_EASYLOGGER_OUTPUT_LVL_ASSERT is not set
# CONFIG_PKG_EASYLOGGER_OUTPUT_LVL_ERROR is not set
# CONFIG_PKG_EASYLOGGER_OUTPUT_LVL_WARN is not set
# CONFIG_PKG_EASYLOGGER_OUTPUT_LVL_INFO is not set
CONFIG_PKG_EASYLOGGER_OUTPUT_LVL_VERBOSE=y
CONFIG_PKG_EASYLOGGER_ENABLE_ASSERT=y
CONFIG_PKG_EASYLOGGER_LINE_BUF_SIZE=256
CONFIG_PKG_EASYLOGGER_FILTER_TAG_MAX_LEN=30
CONFIG_PKG_EASYLOGGER_FILTER_KW_MAX_LEN=16
CONFIG_PKG_EASYLOGGER_NEWLINE_SIGN_CRLF=y
# CONFIG_PKG_EASYLOGGER_NEWLINE_SIGN_LF is not set
# CONFIG_PKG_EASYLOGGER_NEWLINE_SIGN_CR is not set
CONFIG_PKG_EASYLOGGER_ENABLE_COLOR=y
# CONFIG_PKG_EASYLOGGER_ENABLE_ASYNC_OUTPUT is not set
# CONFIG_PKG_EASYLOGGER_ENABLE_PLUGIN_FLASH is not set
CONFIG_PKG_EASYLOGGER_PATH="/packages/tools/EasyLogger"
CONFIG_PKG_USING_EASYLOGGER_V200=y
# CONFIG_PKG_USING_EASYLOGGER_LATEST_VERSION is not set
CONFIG_PKG_EASYLOGGER_VER="v2.0.0"
# CONFIG_PKG_USING_SYSTEMVIEW is not set
# CONFIG_PKG_USING_SEGGER_RTT is not set
# CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
# CONFIG_PKG_USING_ULOG_FILE is not set
# CONFIG_PKG_USING_LOGMGR is not set
# CONFIG_PKG_USING_ADBD is not set
# CONFIG_PKG_USING_COREMARK is not set
# CONFIG_PKG_USING_DHRYSTONE is not set
# CONFIG_PKG_USING_MEMORYPERF is not set
# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
# CONFIG_PKG_USING_BS8116A is not set
# CONFIG_PKG_USING_GPS_RMC is not set
# CONFIG_PKG_USING_URLENCODE is not set
# CONFIG_PKG_USING_UMCN is not set
# CONFIG_PKG_USING_LWRB2RTT is not set
# CONFIG_PKG_USING_CPU_USAGE is not set
# CONFIG_PKG_USING_GBK2UTF8 is not set
# CONFIG_PKG_USING_VCONSOLE is not set
# CONFIG_PKG_USING_KDB is not set
# CONFIG_PKG_USING_WAMR is not set
# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
# CONFIG_PKG_USING_LWLOG is not set
# CONFIG_PKG_USING_ANV_TRACE is not set
# CONFIG_PKG_USING_ANV_MEMLEAK is not set
# CONFIG_PKG_USING_ANV_TESTSUIT is not set
# CONFIG_PKG_USING_ANV_BENCH is not set
# CONFIG_PKG_USING_DEVMEM is not set
# CONFIG_PKG_USING_REGEX is not set
# CONFIG_PKG_USING_MEM_SANDBOX is not set
# CONFIG_PKG_USING_SOLAR_TERMS is not set
# CONFIG_PKG_USING_GAN_ZHI is not set
# CONFIG_PKG_USING_FDT is not set
#
# system packages
#
#
# enhanced kernel services
#
# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
#
# POSIX extension functions
#
# CONFIG_PKG_USING_POSIX_GETLINE is not set
# CONFIG_PKG_USING_POSIX_WCWIDTH is not set
#
# acceleration: Assembly language or algorithmic acceleration packages
#
# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
# CONFIG_PKG_USING_QFPLIB_M3 is not set
#
# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
#
# CONFIG_PKG_USING_CMSIS_5 is not set
# CONFIG_PKG_USING_CMSIS_RTOS2 is not set
#
# Micrium: Micrium software products porting for RT-Thread
#
# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
# CONFIG_PKG_USING_UC_CRC is not set
# CONFIG_PKG_USING_UC_CLK is not set
# CONFIG_PKG_USING_UC_COMMON is not set
# CONFIG_PKG_USING_UC_MODBUS is not set
# CONFIG_RT_USING_ARDUINO is not set
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_FLASHDB is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_DFS_JFFS2 is not set
# CONFIG_PKG_USING_DFS_UFFS is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_THREAD_POOL is not set
# CONFIG_PKG_USING_ROBOTS is not set
# CONFIG_PKG_USING_EV is not set
# CONFIG_PKG_USING_SYSWATCH is not set
# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
# CONFIG_PKG_USING_PLCCORE is not set
# CONFIG_PKG_USING_RAMDISK is not set
# CONFIG_PKG_USING_MININI is not set
# CONFIG_PKG_USING_QBOOT is not set
# CONFIG_PKG_USING_PPOOL is not set
# CONFIG_PKG_USING_OPENAMP is not set
# CONFIG_PKG_USING_LPM is not set
# CONFIG_PKG_USING_TLSF is not set
# CONFIG_PKG_USING_EVENT_RECORDER is not set
# CONFIG_PKG_USING_ARM_2D is not set
# CONFIG_PKG_USING_MCUBOOT is not set
# CONFIG_PKG_USING_TINYUSB is not set
# CONFIG_PKG_USING_USB_STACK is not set
# CONFIG_PKG_USING_LUATOS_SOC is not set
#
# peripheral libraries and drivers
#
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_SHT3X is not set
# CONFIG_PKG_USING_AS7341 is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set
# CONFIG_PKG_USING_SIGNAL_LED is not set
# CONFIG_PKG_USING_LEDBLINK is not set
# CONFIG_PKG_USING_LITTLED is not set
# CONFIG_PKG_USING_LKDGUI is not set
# CONFIG_PKG_USING_NRF5X_SDK is not set
# CONFIG_PKG_USING_NRFX is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
# CONFIG_PKG_USING_INFRARED is not set
# CONFIG_PKG_USING_AGILE_BUTTON is not set
# CONFIG_PKG_USING_AGILE_LED is not set
# CONFIG_PKG_USING_AT24CXX is not set
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
# CONFIG_PKG_USING_AD7746 is not set
# CONFIG_PKG_USING_PCA9685 is not set
# CONFIG_PKG_USING_I2C_TOOLS is not set
# CONFIG_PKG_USING_NRF24L01 is not set
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
# CONFIG_PKG_USING_MAX17048 is not set
# CONFIG_PKG_USING_RPLIDAR is not set
# CONFIG_PKG_USING_AS608 is not set
# CONFIG_PKG_USING_RC522 is not set
# CONFIG_PKG_USING_WS2812B is not set
# CONFIG_PKG_USING_EMBARC_BSP is not set
# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
# CONFIG_PKG_USING_MULTI_RTIMER is not set
# CONFIG_PKG_USING_MAX7219 is not set
# CONFIG_PKG_USING_BEEP is not set
# CONFIG_PKG_USING_EASYBLINK is not set
# CONFIG_PKG_USING_PMS_SERIES is not set
# CONFIG_PKG_USING_CAN_YMODEM is not set
# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
# CONFIG_PKG_USING_QLED is not set
# CONFIG_PKG_USING_PAJ7620 is not set
# CONFIG_PKG_USING_AGILE_CONSOLE is not set
# CONFIG_PKG_USING_LD3320 is not set
# CONFIG_PKG_USING_WK2124 is not set
# CONFIG_PKG_USING_LY68L6400 is not set
# CONFIG_PKG_USING_DM9051 is not set
# CONFIG_PKG_USING_SSD1306 is not set
# CONFIG_PKG_USING_QKEY is not set
# CONFIG_PKG_USING_RS485 is not set
# CONFIG_PKG_USING_NES is not set
# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
# CONFIG_PKG_USING_VDEVICE is not set
# CONFIG_PKG_USING_SGM706 is not set
# CONFIG_PKG_USING_STM32WB55_SDK is not set
# CONFIG_PKG_USING_RDA58XX is not set
# CONFIG_PKG_USING_LIBNFC is not set
# CONFIG_PKG_USING_MFOC is not set
# CONFIG_PKG_USING_TMC51XX is not set
# CONFIG_PKG_USING_TCA9534 is not set
# CONFIG_PKG_USING_KOBUKI is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_MICRO_ROS is not set
# CONFIG_PKG_USING_MCP23008 is not set
# CONFIG_PKG_USING_BLUETRUM_SDK is not set
# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
# CONFIG_PKG_USING_BL_MCU_SDK is not set
# CONFIG_PKG_USING_SOFT_SERIAL is not set
# CONFIG_PKG_USING_MB85RS16 is not set
#
# AI packages
#
# CONFIG_PKG_USING_LIBANN is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_ONNX_BACKEND is not set
# CONFIG_PKG_USING_ONNX_PARSER is not set
# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
# CONFIG_PKG_USING_ELAPACK is not set
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_QUEST is not set
# CONFIG_PKG_USING_NAXOS is not set
#
# miscellaneous packages
#
#
# samples: kernel and components samples
#
# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
#
# entertainment: terminal games and other interesting software packages
#
# CONFIG_PKG_USING_CMATRIX is not set
# CONFIG_PKG_USING_SL is not set
# CONFIG_PKG_USING_CAL is not set
# CONFIG_PKG_USING_ACLOCK is not set
# CONFIG_PKG_USING_THREES is not set
# CONFIG_PKG_USING_2048 is not set
# CONFIG_PKG_USING_SNAKE is not set
# CONFIG_PKG_USING_TETRIS is not set
# CONFIG_PKG_USING_DONUT is not set
# CONFIG_PKG_USING_COWSAY is not set
# CONFIG_PKG_USING_LIBCSV is not set
# CONFIG_PKG_USING_OPTPARSE is not set
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_LZMA is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_MINIZIP is not set
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_UPACKER is not set
# CONFIG_PKG_USING_UPARAM is not set
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_KI is not set
# CONFIG_PKG_USING_ARMv7M_DWT is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_CRCLIB is not set
# CONFIG_PKG_USING_LWGPS is not set
# CONFIG_PKG_USING_STATE_MACHINE is not set
# CONFIG_PKG_USING_DESIGN_PATTERN is not set
#
# Hardware Drivers Config
#
CONFIG_MCU_HC32L073=y
#
# Onboard Peripheral Drivers
#
#
# On-chip Peripheral Drivers
#
CONFIG_BSP_USING_GPIO=y
# CONFIG_BSP_USING_UART is not set
# CONFIG_BSP_USING_I2C1 is not set
#
# Board extended module Drivers
#

162
.cproject Normal file
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47
.gitattributes vendored Executable file
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@ -0,0 +1,47 @@
*.c linguist-language=C
*.C linguist-language=C
*.h linguist-language=C
*.H linguist-language=C
* text=auto
*.S text
*.asm text
*.c text
*.cc text
*.cpp text
*.cxx text
*.h text
*.htm text
*.html text
*.in text
*.ld text
*.m4 text
*.mak text
*.mk text
*.py text
*.rb text
*.s text
*.sct text
*.sh text
*.txt text
*.xml text
SConscript text
Makefile text
AUTHORS text
COPYING text
*.LZO -text
*.Opt -text
*.Uv2 -text
*.ewp -text
*.eww -text
*.vcproj -text
*.bat -text
*.dos -text
*.icf -text
*.inf -text
*.ini -text
*.sct -text
*.xsd -text
Jamfile -text

44
.gitignore vendored Normal file
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@ -0,0 +1,44 @@
*.pyc
*.map
*.dblite
*.elf
*.bin
*.hex
*.axf
*.exe
*.pdb
*.idb
*.ilk
*.old
*.crf
build
Debug
documentation/html
*~
*.o
*.obj
*.bak
*.dep
*.lib
*.a
*.i
*.d
tools/kconfig-frontends/kconfig-mconf
packages
dist
dist_ide_project
cconfig.h
GPUCache
#cscope files
cscope.*
ncscope.*
#ctag files
tags
.idea
.vscode
.history
CMakeLists.txt
cmake-build-debug

9
.ignore_format.yml Normal file
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@ -0,0 +1,9 @@
# files format check exclude path, please follow the instructions below to modify;
# If you need to exclude an entire folder, add the folder path in dir_path;
# If you need to exclude a file, add the path to the file in file_path.
file_path:
dir_path:
- libraries

1
.project Normal file
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@ -0,0 +1 @@
<?xml version="1.0" encoding="UTF-8"?>

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@ -0,0 +1,3 @@
content-types/enabled=true
content-types/org.eclipse.cdt.core.asmSource/file-extensions=s
eclipse.preferences.version=1

22
.settings/projcfg.ini Normal file
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@ -0,0 +1,22 @@
#RT-Thread Studio Project Configuration
#Sat Jan 16 15:18:32 CST 2021
project_type=rtt
chip_name=unknown
cpu_name=None
target_freq=
clock_source=
dvendor_name=
rx_pin_name=
rtt_path=
source_freq=
csp_path=
sub_series_name=
selected_rtt_version=latest
cfg_version=v3.0
tool_chain=gcc
uart_name=
tx_pin_name=
rtt_nano_path=
output_project_path=
hardware_adapter=J-Link
project_name=None

23
Kconfig Normal file
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mainmenu "RT-Thread Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config RTT_DIR
string
option env="RTT_ROOT"
default "rt-thread"
config PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
source "board/Kconfig"

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/******************************************************************************
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file base_types.h
**
** base type common define.
** @link SampleGroup Some description @endlink
**
** - 2019-03-01 1.0 Lux First version.
**
******************************************************************************/
#ifndef __BASE_TYPES_H__
#define __BASE_TYPES_H__
/*****************************************************************************/
/* Include files */
/*****************************************************************************/
#include <stdio.h>
#include <string.h>
#include <stddef.h>
#include <stdint.h>
#include <assert.h>
/*****************************************************************************/
/* Global pre-processor symbols/macros ('#define') */
/*****************************************************************************/
#ifndef TRUE
/** Value is true (boolean_t type) */
#define TRUE ((boolean_t) 1u)
#endif
#ifndef FALSE
/** Value is false (boolean_t type) */
#define FALSE ((boolean_t) 0u)
#endif
/** Returns the minimum value out of two values */
#define MINIMUM( X, Y ) ((X) < (Y) ? (X) : (Y))
/** Returns the maximum value out of two values */
#define MAXIMUM( X, Y ) ((X) > (Y) ? (X) : (Y))
/** Returns the dimension of an array */
#define ARRAY_SZ( X ) (sizeof(X) / sizeof((X)[0]))
#ifdef __DEBUG_ASSERT
#define ASSERT(x) do{ assert((x)> 0u) ; }while(0);
#else
#define ASSERT(x) {}
#endif
/******************************************************************************
* Global type definitions
******************************************************************************/
/** logical datatype (only values are TRUE and FALSE) */
typedef uint8_t boolean_t;
/** single precision floating point number (4 byte) */
typedef float float32_t;
/** double precision floating point number (8 byte) */
typedef double float64_t;
/** ASCII character for string generation (8 bit) */
typedef char char_t;
/** function pointer type to void/void function */
typedef void (*func_ptr_t)(void);
/** function pointer type to void/uint8_t function */
typedef void (*func_ptr_arg1_t)(uint8_t u8Param);
/** generic error codes */
typedef enum en_result
{
Ok = 0u, ///< No error
Error = 1u, ///< Non-specific error code
ErrorAddressAlignment = 2u, ///< Address alignment does not match
ErrorAccessRights = 3u, ///< Wrong mode (e.g. user/system) mode is set
ErrorInvalidParameter = 4u, ///< Provided parameter is not valid
ErrorOperationInProgress = 5u, ///< A conflicting or requested operation is still in progress
ErrorInvalidMode = 6u, ///< Operation not allowed in current mode
ErrorUninitialized = 7u, ///< Module (or part of it) was not initialized properly
ErrorBufferFull = 8u, ///< Circular buffer can not be written because the buffer is full
ErrorTimeout = 9u, ///< Time Out error occurred (e.g. I2C arbitration lost, Flash time-out, etc.)
ErrorNotReady = 10u, ///< A requested final state is not reached
OperationInProgress = 11u ///< Indicator for operation in progress
} en_result_t;
/*****************************************************************************/
/* Global variable declarations ('extern', definition in C source) */
/*****************************************************************************/
/*****************************************************************************/
/* Global function prototypes ('extern', definition in C source) */
/*****************************************************************************/
#endif /* __BASE_TYPES_H__ */
/******************************************************************************/
/* EOF (not truncated) */
/******************************************************************************/

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@ -0,0 +1,22 @@
#ifndef __BOARD_CONF_H__
#define __BOARD_CONF_H__
#include "gpio.h"
//hc32最小系统
#define RUN_LED_PORT GpioPortC
#define RUN_LED_PIN GpioPin13
//motion
#define PWR_LED_PORT GpioPortB
#define PWR_LED_PIN GpioPin10
//XTH
#define SYSTEM_XTH (12*1000*1000u) //12MHZ
///< XTL
#define SYSTEM_XTL (32768u) ///< 32768Hz
#endif

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@ -0,0 +1,76 @@
/*******************************************************************************
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file ddl_device.h
**
** Device define
** @link SampleGroup Some description @endlink
**
** - 2018-04-15
**
*****************************************************************************/
#ifndef __DDL_DEVICE_H__
#define __DDL_DEVICE_H__
/**
*******************************************************************************
** \brief Global device series definition
**
** \note
******************************************************************************/
#define DDL_MCU_SERIES DDL_DEVICE_SERIES_HC32L07X
/**
*******************************************************************************
** \brief Global package definition
**
** \note This definition is used for device package settings
******************************************************************************/
#define DDL_MCU_PACKAGE DDL_DEVICE_PACKAGE_HC_K
#endif /* __DDL_DEVICE_H__ */
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

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/*******************************************************************************
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file interrupts_hc32l07x.h
**
** Interrupt common define.
** @link IRQGroup Some description @endlink
**
** - 2019-03-01 1.0 Lux First version.
**
******************************************************************************/
#ifndef __INTERRUPTS_HC32L07X_H__
#define __INTERRUPTS_HC32L07X_H__
/******************************************************************************/
/* Include files */
/******************************************************************************/
#include "ddl.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/******************************************************************************/
/* Global pre-processor symbols/macros ('#define') */
/******************************************************************************/
#define DDL_IRQ_LEVEL_DEFAULT 3u
//<<此选项会打开interrupt_hc32xxx.c中的中断回调函数用户如果需要实现中断服务函数
//<<可在源码文件中定义该文件中用"__WEAK"声明的同名中断服务函数即可。
#define INT_CALLBACK_ON 1u //<<(默认值)
//<<此选项会关闭interrupt_hc32xxx.c中的中断回调函数此时用户可在该文件中自行定义中断服务函数的实现。
#define INT_CALLBACK_OFF 0u
/******************************************************************************
* Global type definitions
******************************************************************************/
#define INT_CALLBACK_PORTA INT_CALLBACK_ON
#define INT_CALLBACK_PORTB INT_CALLBACK_ON
#define INT_CALLBACK_PORTC INT_CALLBACK_ON
#define INT_CALLBACK_PORTD INT_CALLBACK_ON
#define INT_CALLBACK_PORTE INT_CALLBACK_ON
#define INT_CALLBACK_PORTF INT_CALLBACK_ON
#define INT_CALLBACK_DMAC INT_CALLBACK_ON
#define INT_CALLBACK_TIM3 INT_CALLBACK_ON
#define INT_CALLBACK_UART0 INT_CALLBACK_ON
#define INT_CALLBACK_UART1 INT_CALLBACK_ON
#define INT_CALLBACK_UART2 INT_CALLBACK_ON
#define INT_CALLBACK_UART3 INT_CALLBACK_ON
#define INT_CALLBACK_LPUART0 INT_CALLBACK_ON
#define INT_CALLBACK_LPUART1 INT_CALLBACK_ON
#define INT_CALLBACK_SPI0 INT_CALLBACK_ON
#define INT_CALLBACK_SPI1 INT_CALLBACK_ON
#define INT_CALLBACK_I2S0 INT_CALLBACK_ON
#define INT_CALLBACK_I2S1 INT_CALLBACK_ON
#define INT_CALLBACK_I2C0 INT_CALLBACK_ON
#define INT_CALLBACK_I2C1 INT_CALLBACK_ON
#define INT_CALLBACK_TIM0 INT_CALLBACK_ON
#define INT_CALLBACK_TIM1 INT_CALLBACK_ON
#define INT_CALLBACK_TIM2 INT_CALLBACK_ON
#define INT_CALLBACK_LPTIM0 INT_CALLBACK_ON
#define INT_CALLBACK_LPTIM1 INT_CALLBACK_ON
#define INT_CALLBACK_TIM4 INT_CALLBACK_ON
#define INT_CALLBACK_TIM5 INT_CALLBACK_ON
#define INT_CALLBACK_TIM6 INT_CALLBACK_ON
#define INT_CALLBACK_PCA INT_CALLBACK_ON
#define INT_CALLBACK_WDT INT_CALLBACK_ON
#define INT_CALLBACK_RTC INT_CALLBACK_ON
#define INT_CALLBACK_ADC INT_CALLBACK_ON
#define INT_CALLBACK_DAC INT_CALLBACK_ON
#define INT_CALLBACK_PCNT INT_CALLBACK_ON
#define INT_CALLBACK_VC0 INT_CALLBACK_ON
#define INT_CALLBACK_VC1 INT_CALLBACK_ON
#define INT_CALLBACK_VC2 INT_CALLBACK_ON
#define INT_CALLBACK_LVD INT_CALLBACK_ON
#define INT_CALLBACK_USBFS INT_CALLBACK_ON
#define INT_CALLBACK_CAN INT_CALLBACK_ON
#define INT_CALLBACK_LCD INT_CALLBACK_ON
#define INT_CALLBACK_FLASH INT_CALLBACK_ON
#define INT_CALLBACK_RAM INT_CALLBACK_ON
#define INT_CALLBACK_CLKTRIM INT_CALLBACK_ON
#define INT_CALLBACK_CTS INT_CALLBACK_ON
/**
*******************************************************************************
** \brief
** \note
******************************************************************************/
typedef enum en_irq_level
{
IrqLevel0 = 0u, ///< 优先级0
IrqLevel1 = 1u, ///< 优先级1
IrqLevel2 = 2u, ///< 优先级2
IrqLevel3 = 3u, ///< 优先级3
} en_irq_level_t;
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
///< 系统中断使能开关
extern void EnableNvic(IRQn_Type enIrq, en_irq_level_t enLevel, boolean_t bEn);
#ifdef __cplusplus
}
#endif
#endif /* __INTERRUPTS_HC32L07X_H__ */
/******************************************************************************
* EOF (not truncated)
******************************************************************************/

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/*******************************************************************************
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file system_hc32l07x.h
**
** A detailed description is available at
** @link SampleGroup Some description @endlink
**
** - 2019-03-01 1.0 Lux First version.
**
******************************************************************************/
#ifndef __SYSTEM_HC32L07X_H__
#define __SYSTEM_HC32L07X_H__
/******************************************************************************/
/* Include files */
/******************************************************************************/
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/******************************************************************************/
/* Global pre-processor symbols/macros ('define') */
/******************************************************************************/
#define HWWD_DISABLE (1)
/**
******************************************************************************
** \brief Clock Setup macro definition
**
** - 0: CLOCK_SETTING_NONE - User provides own clock setting in application
** - 1: CLOCK_SETTING_CMSIS -
******************************************************************************/
#define CLOCK_SETTING_NONE 0u
#define CLOCK_SETTING_CMSIS 1u
#define HC32L07xPxxx //100PIN
//#define HC32L07xKxxx //64PIN
//#define HC32L07xJxxx //48PIN
/******************************************************************************/
/* */
/* START OF USER SETTINGS HERE */
/* =========================== */
/* */
/* All lines with '<<<' can be set by user. */
/* */
/******************************************************************************/
/******************************************************************************/
/* Global function prototypes ('extern', definition in C source) */
/******************************************************************************/
extern uint32_t SystemCoreClock; // System Clock Frequency (Core Clock)
extern void SystemInit (void); // Initialize the system
extern void SystemCoreClockUpdate (void); // Update SystemCoreClock variable
#ifdef __cplusplus
}
#endif
#endif /* __SYSTEM_HC32L07X _H__ */

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;/******************************************************************************
;* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
;*
;* This software is owned and published by:
;* Huada Semiconductor Co.,Ltd ("HDSC").
;*
;* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
;* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
;*
;* This software contains source code for use with HDSC
;* components. This software is licensed by HDSC to be adapted only
;* for use in systems utilizing HDSC components. HDSC shall not be
;* responsible for misuse or illegal use of this software for devices not
;* supported herein. HDSC is providing this software "AS IS" and will
;* not be responsible for issues arising from incorrect user implementation
;* of the software.
;*
;* Disclaimer:
;* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
;* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
;* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
;* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
;* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
;* WARRANTY OF NONINFRINGEMENT.
;* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
;* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
;* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
;* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
;* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
;* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
;* SAVINGS OR PROFITS,
;* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
;* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
;* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
;* FROM, THE SOFTWARE.
;*
;* This software may be replicated in part or whole for the licensed use,
;* with the restriction that this Disclaimer and Copyright notice must be
;* included with each copy of this software, whether used in part or whole,
;* at all times.
;*/
;/*****************************************************************************/
;/*****************************************************************************/
;/* Startup for ARM */
;/* Version V1.0 */
;/* Date 2019-03-01 */
;/* Target-mcu {MCU_PN_H} */
;/*****************************************************************************/
; Stack Configuration
; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
Stack_Size EQU 0x00000200
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; Heap Configuration
; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors
DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset
DCD NMI_Handler ; NMI
DCD HardFault_Handler ; Hard Fault
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV
DCD SysTick_Handler ; SysTick
DCD PORTA_IRQHandler
DCD PORTB_IRQHandler
DCD PORTC_E_IRQHandler
DCD PORTD_F_IRQHandler
DCD DMAC_IRQHandler
DCD TIM3_IRQHandler
DCD UART0_2_IRQHandler
DCD UART1_3_IRQHandler
DCD LPUART0_IRQHandler
DCD LPUART1_IRQHandler
DCD SPI0_I2S0_IRQHandler
DCD SPI1_I2S1_IRQHandler
DCD I2C0_IRQHandler
DCD I2C1_IRQHandler
DCD TIM0_IRQHandler
DCD TIM1_IRQHandler
DCD TIM2_IRQHandler
DCD LPTIM0_1_IRQHandler
DCD TIM4_IRQHandler
DCD TIM5_IRQHandler
DCD TIM6_IRQHandler
DCD PCA_IRQHandler
DCD WDT_IRQHandler
DCD RTC_IRQHandler
DCD ADC_DAC_IRQHandler
DCD PCNT_IRQHandler
DCD VC0_1_2_LVD_IRQHandler
DCD USBFS_IRQHandler
DCD CAN_IRQHandler
DCD LCD_IRQHandler
DCD FLASH_RAM_IRQHandler
DCD CLKTRIM_CTS_IRQHandler
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
;reset NVIC if in rom debug
LDR R0, =0x20000000
LDR R2, =0x0
MOVS R1, #0 ; for warning,
ADD R1, PC,#0 ; for A1609W,
CMP R1, R0
BLS RAMCODE
; ram code base address.
ADD R2, R0,R2
RAMCODE
; reset Vector table address.
LDR R0, =0xE000ED08
STR R2, [R0]
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT PORTA_IRQHandler [WEAK]
EXPORT PORTB_IRQHandler [WEAK]
EXPORT PORTC_E_IRQHandler [WEAK]
EXPORT PORTD_F_IRQHandler [WEAK]
EXPORT DMAC_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT UART0_2_IRQHandler [WEAK]
EXPORT UART1_3_IRQHandler [WEAK]
EXPORT LPUART0_IRQHandler [WEAK]
EXPORT LPUART1_IRQHandler [WEAK]
EXPORT SPI0_I2S0_IRQHandler [WEAK]
EXPORT SPI1_I2S1_IRQHandler [WEAK]
EXPORT I2C0_IRQHandler [WEAK]
EXPORT I2C1_IRQHandler [WEAK]
EXPORT TIM0_IRQHandler [WEAK]
EXPORT TIM1_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT LPTIM0_1_IRQHandler [WEAK]
EXPORT TIM4_IRQHandler [WEAK]
EXPORT TIM5_IRQHandler [WEAK]
EXPORT TIM6_IRQHandler [WEAK]
EXPORT PCA_IRQHandler [WEAK]
EXPORT WDT_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT ADC_DAC_IRQHandler [WEAK]
EXPORT PCNT_IRQHandler [WEAK]
EXPORT VC0_1_2_LVD_IRQHandler [WEAK]
EXPORT USBFS_IRQHandler [WEAK]
EXPORT CAN_IRQHandler [WEAK]
EXPORT LCD_IRQHandler [WEAK]
EXPORT FLASH_RAM_IRQHandler [WEAK]
EXPORT CLKTRIM_CTS_IRQHandler [WEAK]
PORTA_IRQHandler
PORTB_IRQHandler
PORTC_E_IRQHandler
PORTD_F_IRQHandler
DMAC_IRQHandler
TIM3_IRQHandler
UART0_2_IRQHandler
UART1_3_IRQHandler
LPUART0_IRQHandler
LPUART1_IRQHandler
SPI0_I2S0_IRQHandler
SPI1_I2S1_IRQHandler
I2C0_IRQHandler
I2C1_IRQHandler
TIM0_IRQHandler
TIM1_IRQHandler
TIM2_IRQHandler
LPTIM0_1_IRQHandler
TIM4_IRQHandler
TIM5_IRQHandler
TIM6_IRQHandler
PCA_IRQHandler
WDT_IRQHandler
RTC_IRQHandler
ADC_DAC_IRQHandler
PCNT_IRQHandler
VC0_1_2_LVD_IRQHandler
USBFS_IRQHandler
CAN_IRQHandler
LCD_IRQHandler
FLASH_RAM_IRQHandler
CLKTRIM_CTS_IRQHandler
B .
ENDP
ALIGN
; User Initial Stack & Heap
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END

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@ -0,0 +1,168 @@
.syntax unified
.cpu cortex-m0plus
.fpu softvfp
.thumb
.global g_pfnVectors
.global Default_Handler
/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr r0, =_estack
mov sp, r0 /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
CopyDataInit:
ldr r3, =_sidata
ldr r3, [r3, r1]
str r3, [r0, r1]
adds r1, r1, #4
LoopCopyDataInit:
ldr r0, =_sdata
ldr r3, =_edata
adds r2, r0, r1
cmp r2, r3
bcc CopyDataInit
ldr r2, =_sbss
b LoopFillZerobss
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
str r3, [r2]
adds r2, r2, #4
LoopFillZerobss:
ldr r3, = _ebss
cmp r2, r3
bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
/* bl __libc_init_array */
/* Call the application's entry point.*/
bl entry
LoopForever:
b LoopForever
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
*
* @param None
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/******************************************************************************
*
* The minimal vector table for a Cortex M0. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*
******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors
g_pfnVectors:
.word _estack
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word SVC_Handler
.word 0
.word 0
.word PendSV_Handler
.word SysTick_Handler
.word PORTA_IRQHandler
.word PORTB_IRQHandler
.word PORTC_E_IRQHandler
.word PORTD_F_IRQHandler
.word DMAC_IRQHandler
.word TIM3_IRQHandler
.word UART0_2_IRQHandler
.word UART1_3_IRQHandler
.word LPUART0_IRQHandler
.word LPUART1_IRQHandler
.word SPI0_I2S0_IRQHandler
.word SPI1_I2S1_IRQHandler
.word I2C0_IRQHandler
.word I2C1_IRQHandler
.word TIM0_IRQHandler
.word TIM1_IRQHandler
.word TIM2_IRQHandler
.word LPTIM0_1_IRQHandler
.word TIM4_IRQHandler
.word TIM5_IRQHandler
.word TIM6_IRQHandler
.word PCA_IRQHandler
.word WDT_IRQHandler
.word RTC_IRQHandler
.word ADC_DAC_IRQHandler
.word PCNT_IRQHandler
.word VC0_1_2_LVD_IRQHandler
.word USBFS_IRQHandler
.word CAN_IRQHandler
.word LCD_IRQHandler
.word FLASH_RAM_IRQHandler
.word CLKTRIM_CTS_IRQHandler
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
.weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler
.weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler

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@ -0,0 +1,361 @@
;*******************************************************************************
; Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
;
; This software is owned and published by:
; Huada Semiconductor Co.,Ltd ("HDSC").
;
; BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
; BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
;
; This software contains source code for use with HDSC
; components. This software is licensed by HDSC to be adapted only
; for use in systems utilizing HDSC components. HDSC shall not be
; responsible for misuse or illegal use of this software for devices not
; supported herein. HDSC is providing this software "AS IS" and will
; not be responsible for issues arising from incorrect user implementation
; of the software.
;
; Disclaimer:
; HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
; REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
; ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
; WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
; WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
; WARRANTY OF NONINFRINGEMENT.
; HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
; NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
; LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
; LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
; INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
; INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
; SAVINGS OR PROFITS,
; EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
; YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
; INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
; FROM, THE SOFTWARE.
;
; This software may be replicated in part or whole for the licensed use,
; with the restriction that this Disclaimer and Copyright notice must be
; included with each copy of this software, whether used in part or whole,
; at all times.
;/
;/*****************************************************************************/
;/* Startup for IAR */
;/* Version V1.0 */
;/* Date 2019-03-01 */
;/* Target-mcu M0+ Device */
;/*****************************************************************************/
MODULE ?cstartup
;; Forward declaration of sections.
SECTION CSTACK:DATA:NOROOT(3)
EXTERN __iar_program_start
EXTERN SystemInit
PUBLIC __vector_table
SECTION .intvec:CODE:ROOT(8)
DATA
__vector_table
DCD sfe(CSTACK) ; Top of Stack
DCD Reset_Handler ; Reset
DCD NMI_Handler ; NMI
DCD HardFault_Handler ; Hard Fault
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV
DCD SysTick_Handler ; SysTick
; Numbered IRQ handler vectors
; Note: renaming to device dependent ISR function names are done in
DCD PORTA_IRQHandler
DCD PORTB_IRQHandler
DCD PORTC_E_IRQHandler
DCD PORTD_F_IRQHandler
DCD DMAC_IRQHandler
DCD TIM3_IRQHandler
DCD UART0_2_IRQHandler
DCD UART1_3_IRQHandler
DCD LPUART0_IRQHandler
DCD LPUART1_IRQHandler
DCD SPI0_I2S0_IRQHandler
DCD SPI1_I2S1_IRQHandler
DCD I2C0_IRQHandler
DCD I2C1_IRQHandler
DCD TIM0_IRQHandler
DCD TIM1_IRQHandler
DCD TIM2_IRQHandler
DCD LPTIM0_1_IRQHandler
DCD TIM4_IRQHandler
DCD TIM5_IRQHandler
DCD TIM6_IRQHandler
DCD PCA_IRQHandler
DCD WDT_IRQHandler
DCD RTC_IRQHandler
DCD ADC_DAC_IRQHandler
DCD PCNT_IRQHandler
DCD VC0_1_2_LVD_IRQHandler
DCD USBFS_IRQHandler
DCD CAN_IRQHandler
DCD LCD_IRQHandler
DCD FLASH_RAM_IRQHandler
DCD CLKTRIM_CTS_IRQHandler
THUMB
PUBWEAK Reset_Handler
SECTION .text:CODE:NOROOT:REORDER(2)
Reset_Handler
;reset NVIC if in rom debug
LDR R0, =0x20000000
LDR R2, =0x0 ; vector offset
cmp PC, R0
bls ROMCODE
; ram code base address.
ADD R2, R0,R2
ROMCODE
; reset Vector table address.
LDR R0, =0xE000ED08
STR R2, [R0]
LDR R0, =SystemInit
BLX R0
LDR R0, =__iar_program_start
BX R0
PUBWEAK NMI_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
NMI_Handler
B NMI_Handler
PUBWEAK HardFault_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
HardFault_Handler
B HardFault_Handler
PUBWEAK SVC_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
SVC_Handler
B SVC_Handler
PUBWEAK PendSV_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
PendSV_Handler
B PendSV_Handler
PUBWEAK SysTick_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
SysTick_Handler
B SysTick_Handler
PUBWEAK PORTA_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
PORTA_IRQHandler
B PORTA_IRQHandler
PUBWEAK PORTB_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
PORTB_IRQHandler
B PORTB_IRQHandler
PUBWEAK PORTC_E_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
PORTC_E_IRQHandler
B PORTC_E_IRQHandler
PUBWEAK PORTD_F_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
PORTD_F_IRQHandler
B PORTD_F_IRQHandler
PUBWEAK DMAC_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
DMAC_IRQHandler
B DMAC_IRQHandler
PUBWEAK TIM3_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM3_IRQHandler
B TIM3_IRQHandler
PUBWEAK UART0_2_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
UART0_2_IRQHandler
B UART0_2_IRQHandler
PUBWEAK UART1_3_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
UART1_3_IRQHandler
B UART1_3_IRQHandler
PUBWEAK LPUART0_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
LPUART0_IRQHandler
B LPUART0_IRQHandler
PUBWEAK LPUART1_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
LPUART1_IRQHandler
B LPUART1_IRQHandler
PUBWEAK SPI0_I2S0_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
SPI0_I2S0_IRQHandler
B SPI0_I2S0_IRQHandler
PUBWEAK SPI1_I2S1_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
SPI1_I2S1_IRQHandler
B SPI1_I2S1_IRQHandler
PUBWEAK I2C0_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
I2C0_IRQHandler
B I2C0_IRQHandler
PUBWEAK I2C1_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
I2C1_IRQHandler
B I2C1_IRQHandler
PUBWEAK TIM0_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM0_IRQHandler
B TIM0_IRQHandler
PUBWEAK TIM1_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM1_IRQHandler
B TIM1_IRQHandler
PUBWEAK TIM2_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM2_IRQHandler
B TIM2_IRQHandler
PUBWEAK LPTIM0_1_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
LPTIM0_1_IRQHandler
B LPTIM0_1_IRQHandler
PUBWEAK TIM4_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM4_IRQHandler
B TIM4_IRQHandler
PUBWEAK TIM5_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM5_IRQHandler
B TIM5_IRQHandler
PUBWEAK TIM6_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
TIM6_IRQHandler
B TIM6_IRQHandler
PUBWEAK PCA_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
PCA_IRQHandler
B PCA_IRQHandler
PUBWEAK WDT_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
WDT_IRQHandler
B WDT_IRQHandler
PUBWEAK RTC_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
RTC_IRQHandler
B RTC_IRQHandler
PUBWEAK ADC_DAC_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
ADC_DAC_IRQHandler
B ADC_DAC_IRQHandler
PUBWEAK PCNT_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
PCNT_IRQHandler
B PCNT_IRQHandler
PUBWEAK VC0_1_2_LVD_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
VC0_1_2_LVD_IRQHandler
B VC0_1_2_LVD_IRQHandler
PUBWEAK USBFS_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
USBFS_IRQHandler
B USBFS_IRQHandler
PUBWEAK CAN_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
CAN_IRQHandler
B CAN_IRQHandler
PUBWEAK LCD_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
LCD_IRQHandler
B LCD_IRQHandler
PUBWEAK FLASH_RAM_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
FLASH_RAM_IRQHandler
B FLASH_RAM_IRQHandler
PUBWEAK CLKTRIM_CTS_IRQHandler
SECTION .text:CODE:NOROOT:REORDER(1)
CLKTRIM_CTS_IRQHandler
B CLKTRIM_CTS_IRQHandler
END

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@ -0,0 +1,642 @@
/*
* @Description:
* @Date: 2022-01-06 16:18:23
* @LastEditors: CK.Zh
* @LastEditTime: 2022-01-10 12:02:32
* @FilePath: /rt-thread/bsp/hc32l073/Libraries/CMSIS/Device/HDSC/HC32L073/Source/interrupts_hc32l07x.c
*/
/******************************************************************************
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file interrupts_hc32l136.c
**
** Interrupt management
** @link Driver Group Some description @endlink
**
** - 2018-04-15 1.0 Lux First version.
**
**
******************************************************************************/
/*******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
#include "interrupts_hc32l07x.h"
/*******************************************************************************
* IRQ WEAK DEFINE
******************************************************************************/
__WEAK void SysTick_IRQHandler(void);
__WEAK void PortA_IRQHandler(void);
__WEAK void PortB_IRQHandler(void);
__WEAK void PortC_IRQHandler(void);
__WEAK void PortD_IRQHandler(void);
__WEAK void PortE_IRQHandler(void);
__WEAK void PortF_IRQHandler(void);
__WEAK void Dmac_IRQHandler(void);
__WEAK void Tim3_IRQHandler(void);
__WEAK void Uart0_IRQHandler(void);
__WEAK void Uart1_IRQHandler(void);
__WEAK void Uart2_IRQHandler(void);
__WEAK void Uart3_IRQHandler(void);
__WEAK void LpUart0_IRQHandler(void);
__WEAK void LpUart1_IRQHandler(void);
__WEAK void Spi0_IRQHandler(void);
__WEAK void Spi1_IRQHandler(void);
__WEAK void I2s0_IRQHandler(void);
__WEAK void I2s1_IRQHandler(void);
__WEAK void I2c0_IRQHandler(void);
__WEAK void I2c1_IRQHandler(void);
__WEAK void Tim0_IRQHandler(void);
__WEAK void Tim1_IRQHandler(void);
__WEAK void Tim2_IRQHandler(void);
__WEAK void LpTim0_IRQHandler(void);
__WEAK void LpTim1_IRQHandler(void);
__WEAK void Tim4_IRQHandler(void);
__WEAK void Tim5_IRQHandler(void);
__WEAK void Tim6_IRQHandler(void);
__WEAK void Pca_IRQHandler(void);
__WEAK void Wdt_IRQHandler(void);
__WEAK void Rtc_IRQHandler(void);
__WEAK void Adc_IRQHandler(void);
__WEAK void Dac_IRQHandler(void);
__WEAK void Pcnt_IRQHandler(void);
__WEAK void Vc0_IRQHandler(void);
__WEAK void Vc1_IRQHandler(void);
__WEAK void Vc2_IRQHandler(void);
__WEAK void Lvd_IRQHandler(void);
__WEAK void Usbfs_IRQHandler(void);
__WEAK void Can_IRQHandler(void);
__WEAK void Lcd_IRQHandler(void);
__WEAK void Flash_IRQHandler(void);
__WEAK void Ram_IRQHandler(void);
__WEAK void ClkTrim_IRQHandler(void);
__WEAK void Cts_IRQHandler(void);
/**
*******************************************************************************
** \brief NVIC 使
**
** \param [in] enIrq
** \param [in] enLevel
** \param [in] bEn
** \retval Ok
**
******************************************************************************/
void EnableNvic(IRQn_Type enIrq, en_irq_level_t enLevel, boolean_t bEn)
{
NVIC_ClearPendingIRQ(enIrq);
NVIC_SetPriority(enIrq, enLevel);
if (TRUE == bEn)
{
NVIC_EnableIRQ(enIrq);
}
else
{
NVIC_DisableIRQ(enIrq);
}
}
/**
*******************************************************************************
** \brief NVIC hardware fault
**
**
** \retval
******************************************************************************/
// void HardFault_Handler(void)
// {
// volatile int a = 0;
// while( 0 == a)
// {
// ;
// }
// }
/**
*******************************************************************************
** \brief NVIC SysTick
**
** \retval
******************************************************************************/
void SysTick_Handler(void)
{
SysTick_IRQHandler();
}
/**
*******************************************************************************
** \brief GPIO PortA
**
** \retval
******************************************************************************/
void PORTA_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_PORTA)
PortA_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief GPIO PortB
**
** \retval
******************************************************************************/
void PORTB_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_PORTB)
PortB_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief GPIO PortC/E
**
** \retval
******************************************************************************/
void PORTC_E_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_PORTC)
PortC_IRQHandler();
#endif
#if (INT_CALLBACK_ON == INT_CALLBACK_PORTE)
PortE_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief GPIO PortD/F
**
** \retval
******************************************************************************/
void PORTD_F_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_PORTD)
PortD_IRQHandler();
#endif
#if (INT_CALLBACK_ON == INT_CALLBACK_PORTF)
PortF_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief DMAC
**
** \retval
******************************************************************************/
void DMAC_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_DMAC)
Dmac_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief TIM3
**
** \retval
******************************************************************************/
void TIM3_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_TIM3)
Tim3_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief UART0/2
**
** \retval
******************************************************************************/
void UART0_2_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_UART0)
Uart0_IRQHandler();
#endif
#if (INT_CALLBACK_ON == INT_CALLBACK_UART2)
Uart2_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief UART1/3
**
** \retval
******************************************************************************/
void UART1_3_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_UART1)
Uart1_IRQHandler();
#endif
#if (INT_CALLBACK_ON == INT_CALLBACK_UART3)
Uart3_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief LPUART0 0
**
** \retval
******************************************************************************/
void LPUART0_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_LPUART0)
LpUart0_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief LPUART1 1
**
** \retval
******************************************************************************/
void LPUART1_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_LPUART1)
LpUart1_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief SPI0/I2S0
**
** \retval
******************************************************************************/
void SPI0_I2S0_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_SPI0)
Spi0_IRQHandler();
#endif
#if (INT_CALLBACK_ON == INT_CALLBACK_I2S0)
I2s0_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief SPI1/I2S1
**
** \retval
******************************************************************************/
void SPI1_I2S1_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_SPI1)
Spi1_IRQHandler();
#endif
#if (INT_CALLBACK_ON == INT_CALLBACK_I2S1)
I2s1_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief I2C0
**
** \retval
******************************************************************************/
void I2C0_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_I2C0)
I2c0_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief I2C1
**
** \retval
******************************************************************************/
void I2C1_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_I2C1)
I2c1_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief TIM0
**
** \retval
******************************************************************************/
void TIM0_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_TIM0)
Tim0_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief TIM1
**
** \retval
******************************************************************************/
void TIM1_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_TIM1)
Tim1_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief TIM2
**
** \retval
******************************************************************************/
void TIM2_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_TIM2)
Tim2_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief LPTIM0/1
**
** \retval
******************************************************************************/
void LPTIM0_1_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_LPTIM0)
LpTim0_IRQHandler();
#endif
#if (INT_CALLBACK_ON == INT_CALLBACK_LPTIM1)
LpTim1_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief TIM4
**
** \retval
******************************************************************************/
void TIM4_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_TIM4)
Tim4_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief TIM5
**
** \retval
******************************************************************************/
void TIM5_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_TIM5)
Tim5_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief TIM6
**
** \retval
******************************************************************************/
void TIM6_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_TIM6)
Tim6_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief PCA
**
** \retval
******************************************************************************/
void PCA_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_PCA)
Pca_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief WDT
**
** \retval
******************************************************************************/
void WDT_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_WDT)
Wdt_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief RTC
**
** \retval
******************************************************************************/
void RTC_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_RTC)
Rtc_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief ADC/DAC
**
** \retval
******************************************************************************/
void ADC_DAC_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_ADC)
Adc_IRQHandler();
#endif
#if (INT_CALLBACK_ON == INT_CALLBACK_DAC)
Dac_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief PCNT
**
** \retval
******************************************************************************/
void PCNT_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_PCNT)
Pcnt_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief VC0/1/2/LVD
**
** \retval
******************************************************************************/
void VC0_1_2_LVD_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_VC0)
Vc0_IRQHandler();
#endif
#if (INT_CALLBACK_ON == INT_CALLBACK_VC1)
Vc1_IRQHandler();
#endif
#if (INT_CALLBACK_ON == INT_CALLBACK_VC2)
Vc2_IRQHandler();
#endif
#if (INT_CALLBACK_ON == INT_CALLBACK_LVD)
Lvd_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief USBFS
**
** \retval
******************************************************************************/
void USBFS_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_USBFS)
Usbfs_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief CAN
**
** \retval
******************************************************************************/
void CAN_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_CAN)
Can_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief LCD
**
** \retval
******************************************************************************/
void LCD_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_LCD)
Lcd_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief FLASH/RAM
**
** \retval
******************************************************************************/
void FLASH_RAM_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_FLASH)
Flash_IRQHandler();
#endif
#if (INT_CALLBACK_ON == INT_CALLBACK_RAM)
Ram_IRQHandler();
#endif
}
/**
*******************************************************************************
** \brief CLKTRIM/CTS
**
** \retval
******************************************************************************/
void CLKTRIM_CTS_IRQHandler(void)
{
#if (INT_CALLBACK_ON == INT_CALLBACK_CLKTRIM)
ClkTrim_IRQHandler();
#endif
#if (INT_CALLBACK_ON == INT_CALLBACK_CTS)
Cts_IRQHandler();
#endif
}
/******************************************************************************/
/* EOF (not truncated) */
/******************************************************************************/

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@ -0,0 +1,182 @@
/*
* @Description:
* @Date: 2022-01-06 16:18:34
* @LastEditors: CK.Zh
* @LastEditTime: 2022-01-06 16:52:36
* @FilePath: /rt-thread/bsp/hc32l073/Libraries/CMSIS/Device/HDSC/HC32L073/Source/system_hc32l07x.c
*/
/*******************************************************************************
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file system_hc32l07x.c
**
** System clock initialization.
** @link SampleGroup Some description @endlink
**
** - 2019-03-01 1.0 Lux First version.
**
******************************************************************************/
/******************************************************************************/
/* Include files */
/******************************************************************************/
#include "base_types.h"
#include "hc32l07x.h"
#include "system_hc32l07x.h"
#include "sysctrl.h"
/**
******************************************************************************
** System Clock Frequency (Core Clock) Variable according CMSIS
******************************************************************************/
uint32_t SystemCoreClock = 4000000;
//add clock source.
void SystemCoreClockUpdate (void) // Update SystemCoreClock variable
{
SystemCoreClock = Sysctrl_GetHClkFreq();
}
/**
******************************************************************************
** \brief MCUIO.
**
** \param none
** \return none
******************************************************************************/
static void _InitHidePin(void)
{
uint32_t tmpReg = M0P_SYSCTRL->PERI_CLKEN0;
M0P_SYSCTRL->PERI_CLKEN0_f.GPIO = 1;
#if defined(HC32L07xPxxx) //100PIN MCU
M0P_GPIO->PFADS &= 0xFF4F; ///< PF04/PF05/PF07配置为数字端口
M0P_GPIO->PFDIR |= 0x00B0; ///< PF04/PF05/PF07配置为端口输入
M0P_GPIO->PFPU |= 0x00B0; ///< PF04/PF05/PF07配置为上拉
#elif defined(HC32L07xKxxx) //64PIN MCU
M0P_GPIO->PDADS &= 0x0004; ///< PD00/PD01/PD03~15配置为数字端口
M0P_GPIO->PEADS &= 0x0000; ///< PE00~15配置为数字端口
M0P_GPIO->PFADS &= 0xF903; ///< PF02~07/PF09~10配置为数字端口
M0P_GPIO->PDDIR |= 0xFFFB; ///< PD00/PD01/PD03~15配置为端口输入
M0P_GPIO->PEDIR |= 0xFFFF; ///< PE00~15配置为端口输入
M0P_GPIO->PFDIR |= 0x06FC; ///< PF02~07/PF09~10配置为数字端口
M0P_GPIO->PDPU |= 0xFFFB; ///< PD00/PD01/PD03~15配置为上拉
M0P_GPIO->PEPU |= 0xFFFF; ///< PE00~15配置为上拉
M0P_GPIO->PFPU |= 0x06FC; ///< PF02~07/PF09~10配置为数字端口
#elif defined(HC32L07xJxxx) //48PIN MCU
M0P_GPIO->PCADS &= 0xE000; ///< PC00~12配置为数字端口
M0P_GPIO->PDADS &= 0x0000; ///< PD00~15配置为数字端口
M0P_GPIO->PEADS &= 0x0000; ///< PE00~15配置为数字端口
M0P_GPIO->PFADS &= 0xF903; ///< PF02~07/PF09~10配置为数字端口
M0P_GPIO->PCDIR |= 0x1FFF; ///< PC00~12配置为端口输入
M0P_GPIO->PDDIR |= 0xFFFF; ///< PD00~15配置为端口输入
M0P_GPIO->PEDIR |= 0xFFFF; ///< PE00~15配置为端口输入
M0P_GPIO->PFDIR |= 0x06FC; ///< PF02~07/PF09~10配置为数字端口
M0P_GPIO->PCPU |= 0x1FFF; ///< PC00~12配置为上拉
M0P_GPIO->PDPU |= 0xFFFF; ///< PD00~15配置为上拉
M0P_GPIO->PEPU |= 0xFFFF; ///< PE00~15配置为上拉
M0P_GPIO->PFPU |= 0x06FC; ///< PF02~07/PF09~10配置为数字端口
#endif
M0P_SYSCTRL->PERI_CLKEN0 = tmpReg;
}
/**
******************************************************************************
** \brief Setup the microcontroller system. Initialize the System and update
** the SystemCoreClock variable.
**
** \param none
** \return none
******************************************************************************/
void SystemInit(void)
{
M0P_SYSCTRL->RCL_CR_f.TRIM = (*((volatile uint16_t*) (0x00100C22ul)));
M0P_SYSCTRL->RCH_CR_f.TRIM = (*((volatile uint16_t*) (0x00100C08ul)));
SystemCoreClockUpdate();
_InitHidePin();
}
#if defined (__CC_ARM)
extern int32_t $Super$$main(void);
/* re-define main function */
int $Sub$$main(void)
{
SystemInit();
$Super$$main();
return 0;
}
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
extern int32_t $Super$$main(void);
/* re-define main function */
int $Sub$$main(void)
{
SystemInit();
$Super$$main();
return 0;
}
#elif defined(__ICCARM__)
extern int32_t main(void);
/* __low_level_init will auto called by IAR cstartup */
extern void __iar_data_init3(void);
int __low_level_init(void)
{
// call IAR table copy function.
__iar_data_init3();
SystemInit();
main();
return 0;
}
#endif

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@ -0,0 +1,894 @@
/**************************************************************************//**
* @file cmsis_armcc.h
* @brief CMSIS compiler ARMCC (Arm Compiler 5) header file
* @version V5.1.0
* @date 08. May 2019
******************************************************************************/
/*
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef __CMSIS_ARMCC_H
#define __CMSIS_ARMCC_H
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
#error "Please use Arm Compiler Toolchain V4.0.677 or later!"
#endif
/* CMSIS compiler control architecture macros */
#if ((defined (__TARGET_ARCH_6_M ) && (__TARGET_ARCH_6_M == 1)) || \
(defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M == 1)) )
#define __ARM_ARCH_6M__ 1
#endif
#if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M == 1))
#define __ARM_ARCH_7M__ 1
#endif
#if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1))
#define __ARM_ARCH_7EM__ 1
#endif
/* __ARM_ARCH_8M_BASE__ not applicable */
/* __ARM_ARCH_8M_MAIN__ not applicable */
/* CMSIS compiler control DSP macros */
#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
#define __ARM_FEATURE_DSP 1
#endif
/* CMSIS compiler specific defines */
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE __inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static __inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE static __forceinline
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __declspec(noreturn)
#endif
#ifndef __USED
#define __USED __attribute__((used))
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak))
#endif
#ifndef __PACKED
#define __PACKED __attribute__((packed))
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT __packed struct
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION __packed union
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
#define __UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x)))
#endif
#ifndef __UNALIGNED_UINT16_WRITE
#define __UNALIGNED_UINT16_WRITE(addr, val) ((*((__packed uint16_t *)(addr))) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
#define __UNALIGNED_UINT16_READ(addr) (*((const __packed uint16_t *)(addr)))
#endif
#ifndef __UNALIGNED_UINT32_WRITE
#define __UNALIGNED_UINT32_WRITE(addr, val) ((*((__packed uint32_t *)(addr))) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
#define __UNALIGNED_UINT32_READ(addr) (*((const __packed uint32_t *)(addr)))
#endif
#ifndef __ALIGNED
#define __ALIGNED(x) __attribute__((aligned(x)))
#endif
#ifndef __RESTRICT
#define __RESTRICT __restrict
#endif
#ifndef __COMPILER_BARRIER
#define __COMPILER_BARRIER() __memory_changed()
#endif
/* ######################### Startup and Lowlevel Init ######################## */
#ifndef __PROGRAM_START
#define __PROGRAM_START __main
#endif
#ifndef __INITIAL_SP
#define __INITIAL_SP Image$$ARM_LIB_STACK$$ZI$$Limit
#endif
#ifndef __STACK_LIMIT
#define __STACK_LIMIT Image$$ARM_LIB_STACK$$ZI$$Base
#endif
#ifndef __VECTOR_TABLE
#define __VECTOR_TABLE __Vectors
#endif
#ifndef __VECTOR_TABLE_ATTRIBUTE
#define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section("RESET")))
#endif
/* ########################### Core Function Access ########################### */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
@{
*/
/**
\brief Enable IRQ Interrupts
\details Enables IRQ interrupts by clearing the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
/* intrinsic void __enable_irq(); */
/**
\brief Disable IRQ Interrupts
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
/* intrinsic void __disable_irq(); */
/**
\brief Get Control Register
\details Returns the content of the Control Register.
\return Control Register value
*/
__STATIC_INLINE uint32_t __get_CONTROL(void)
{
register uint32_t __regControl __ASM("control");
return(__regControl);
}
/**
\brief Set Control Register
\details Writes the given value to the Control Register.
\param [in] control Control Register value to set
*/
__STATIC_INLINE void __set_CONTROL(uint32_t control)
{
register uint32_t __regControl __ASM("control");
__regControl = control;
}
/**
\brief Get IPSR Register
\details Returns the content of the IPSR Register.
\return IPSR Register value
*/
__STATIC_INLINE uint32_t __get_IPSR(void)
{
register uint32_t __regIPSR __ASM("ipsr");
return(__regIPSR);
}
/**
\brief Get APSR Register
\details Returns the content of the APSR Register.
\return APSR Register value
*/
__STATIC_INLINE uint32_t __get_APSR(void)
{
register uint32_t __regAPSR __ASM("apsr");
return(__regAPSR);
}
/**
\brief Get xPSR Register
\details Returns the content of the xPSR Register.
\return xPSR Register value
*/
__STATIC_INLINE uint32_t __get_xPSR(void)
{
register uint32_t __regXPSR __ASM("xpsr");
return(__regXPSR);
}
/**
\brief Get Process Stack Pointer
\details Returns the current value of the Process Stack Pointer (PSP).
\return PSP Register value
*/
__STATIC_INLINE uint32_t __get_PSP(void)
{
register uint32_t __regProcessStackPointer __ASM("psp");
return(__regProcessStackPointer);
}
/**
\brief Set Process Stack Pointer
\details Assigns the given value to the Process Stack Pointer (PSP).
\param [in] topOfProcStack Process Stack Pointer value to set
*/
__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
{
register uint32_t __regProcessStackPointer __ASM("psp");
__regProcessStackPointer = topOfProcStack;
}
/**
\brief Get Main Stack Pointer
\details Returns the current value of the Main Stack Pointer (MSP).
\return MSP Register value
*/
__STATIC_INLINE uint32_t __get_MSP(void)
{
register uint32_t __regMainStackPointer __ASM("msp");
return(__regMainStackPointer);
}
/**
\brief Set Main Stack Pointer
\details Assigns the given value to the Main Stack Pointer (MSP).
\param [in] topOfMainStack Main Stack Pointer value to set
*/
__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
{
register uint32_t __regMainStackPointer __ASM("msp");
__regMainStackPointer = topOfMainStack;
}
/**
\brief Get Priority Mask
\details Returns the current state of the priority mask bit from the Priority Mask Register.
\return Priority Mask value
*/
__STATIC_INLINE uint32_t __get_PRIMASK(void)
{
register uint32_t __regPriMask __ASM("primask");
return(__regPriMask);
}
/**
\brief Set Priority Mask
\details Assigns the given value to the Priority Mask Register.
\param [in] priMask Priority Mask
*/
__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
{
register uint32_t __regPriMask __ASM("primask");
__regPriMask = (priMask);
}
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
/**
\brief Enable FIQ
\details Enables FIQ interrupts by clearing the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
#define __enable_fault_irq __enable_fiq
/**
\brief Disable FIQ
\details Disables FIQ interrupts by setting the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
#define __disable_fault_irq __disable_fiq
/**
\brief Get Base Priority
\details Returns the current value of the Base Priority register.
\return Base Priority register value
*/
__STATIC_INLINE uint32_t __get_BASEPRI(void)
{
register uint32_t __regBasePri __ASM("basepri");
return(__regBasePri);
}
/**
\brief Set Base Priority
\details Assigns the given value to the Base Priority register.
\param [in] basePri Base Priority value to set
*/
__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
{
register uint32_t __regBasePri __ASM("basepri");
__regBasePri = (basePri & 0xFFU);
}
/**
\brief Set Base Priority with condition
\details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
or the new value increases the BASEPRI priority level.
\param [in] basePri Base Priority value to set
*/
__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
{
register uint32_t __regBasePriMax __ASM("basepri_max");
__regBasePriMax = (basePri & 0xFFU);
}
/**
\brief Get Fault Mask
\details Returns the current value of the Fault Mask register.
\return Fault Mask register value
*/
__STATIC_INLINE uint32_t __get_FAULTMASK(void)
{
register uint32_t __regFaultMask __ASM("faultmask");
return(__regFaultMask);
}
/**
\brief Set Fault Mask
\details Assigns the given value to the Fault Mask register.
\param [in] faultMask Fault Mask value to set
*/
__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
{
register uint32_t __regFaultMask __ASM("faultmask");
__regFaultMask = (faultMask & (uint32_t)1U);
}
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
/**
\brief Get FPSCR
\details Returns the current value of the Floating Point Status/Control register.
\return Floating Point Status/Control register value
*/
__STATIC_INLINE uint32_t __get_FPSCR(void)
{
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
register uint32_t __regfpscr __ASM("fpscr");
return(__regfpscr);
#else
return(0U);
#endif
}
/**
\brief Set FPSCR
\details Assigns the given value to the Floating Point Status/Control register.
\param [in] fpscr Floating Point Status/Control value to set
*/
__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
{
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
register uint32_t __regfpscr __ASM("fpscr");
__regfpscr = (fpscr);
#else
(void)fpscr;
#endif
}
/*@} end of CMSIS_Core_RegAccFunctions */
/* ########################## Core Instruction Access ######################### */
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
Access to dedicated instructions
@{
*/
/**
\brief No Operation
\details No Operation does nothing. This instruction can be used for code alignment purposes.
*/
#define __NOP __nop
/**
\brief Wait For Interrupt
\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
*/
#define __WFI __wfi
/**
\brief Wait For Event
\details Wait For Event is a hint instruction that permits the processor to enter
a low-power state until one of a number of events occurs.
*/
#define __WFE __wfe
/**
\brief Send Event
\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
*/
#define __SEV __sev
/**
\brief Instruction Synchronization Barrier
\details Instruction Synchronization Barrier flushes the pipeline in the processor,
so that all instructions following the ISB are fetched from cache or memory,
after the instruction has been completed.
*/
#define __ISB() do {\
__schedule_barrier();\
__isb(0xF);\
__schedule_barrier();\
} while (0U)
/**
\brief Data Synchronization Barrier
\details Acts as a special kind of Data Memory Barrier.
It completes when all explicit memory accesses before this instruction complete.
*/
#define __DSB() do {\
__schedule_barrier();\
__dsb(0xF);\
__schedule_barrier();\
} while (0U)
/**
\brief Data Memory Barrier
\details Ensures the apparent order of the explicit memory operations before
and after the instruction, without ensuring their completion.
*/
#define __DMB() do {\
__schedule_barrier();\
__dmb(0xF);\
__schedule_barrier();\
} while (0U)
/**
\brief Reverse byte order (32 bit)
\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
\param [in] value Value to reverse
\return Reversed value
*/
#define __REV __rev
/**
\brief Reverse byte order (16 bit)
\details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
\param [in] value Value to reverse
\return Reversed value
*/
#ifndef __NO_EMBEDDED_ASM
__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
{
rev16 r0, r0
bx lr
}
#endif
/**
\brief Reverse byte order (16 bit)
\details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
\param [in] value Value to reverse
\return Reversed value
*/
#ifndef __NO_EMBEDDED_ASM
__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value)
{
revsh r0, r0
bx lr
}
#endif
/**
\brief Rotate Right in unsigned value (32 bit)
\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
\param [in] op1 Value to rotate
\param [in] op2 Number of Bits to rotate
\return Rotated value
*/
#define __ROR __ror
/**
\brief Breakpoint
\details Causes the processor to enter Debug state.
Debug tools can use this to investigate system state when the instruction at a particular address is reached.
\param [in] value is ignored by the processor.
If required, a debugger can use it to store additional information about the breakpoint.
*/
#define __BKPT(value) __breakpoint(value)
/**
\brief Reverse bit order of value
\details Reverses the bit order of the given value.
\param [in] value Value to reverse
\return Reversed value
*/
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
#define __RBIT __rbit
#else
__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
{
uint32_t result;
uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
result = value; /* r will be reversed bits of v; first get LSB of v */
for (value >>= 1U; value != 0U; value >>= 1U)
{
result <<= 1U;
result |= value & 1U;
s--;
}
result <<= s; /* shift when v's highest bits are zero */
return result;
}
#endif
/**
\brief Count leading zeros
\details Counts the number of leading zeros of a data value.
\param [in] value Value to count the leading zeros
\return number of leading zeros in value
*/
#define __CLZ __clz
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
/**
\brief LDR Exclusive (8 bit)
\details Executes a exclusive LDR instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
#else
#define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop")
#endif
/**
\brief LDR Exclusive (16 bit)
\details Executes a exclusive LDR instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
#else
#define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop")
#endif
/**
\brief LDR Exclusive (32 bit)
\details Executes a exclusive LDR instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
#else
#define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop")
#endif
/**
\brief STR Exclusive (8 bit)
\details Executes a exclusive STR instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __STREXB(value, ptr) __strex(value, ptr)
#else
#define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
#endif
/**
\brief STR Exclusive (16 bit)
\details Executes a exclusive STR instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __STREXH(value, ptr) __strex(value, ptr)
#else
#define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
#endif
/**
\brief STR Exclusive (32 bit)
\details Executes a exclusive STR instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __STREXW(value, ptr) __strex(value, ptr)
#else
#define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
#endif
/**
\brief Remove the exclusive lock
\details Removes the exclusive lock which is created by LDREX.
*/
#define __CLREX __clrex
/**
\brief Signed Saturate
\details Saturates a signed value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (1..32)
\return Saturated value
*/
#define __SSAT __ssat
/**
\brief Unsigned Saturate
\details Saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
#define __USAT __usat
/**
\brief Rotate Right with Extend (32 bit)
\details Moves each bit of a bitstring right by one bit.
The carry input is shifted in at the left end of the bitstring.
\param [in] value Value to rotate
\return Rotated value
*/
#ifndef __NO_EMBEDDED_ASM
__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
{
rrx r0, r0
bx lr
}
#endif
/**
\brief LDRT Unprivileged (8 bit)
\details Executes a Unprivileged LDRT instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
#define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
/**
\brief LDRT Unprivileged (16 bit)
\details Executes a Unprivileged LDRT instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
#define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
/**
\brief LDRT Unprivileged (32 bit)
\details Executes a Unprivileged LDRT instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
#define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
/**
\brief STRT Unprivileged (8 bit)
\details Executes a Unprivileged STRT instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
#define __STRBT(value, ptr) __strt(value, ptr)
/**
\brief STRT Unprivileged (16 bit)
\details Executes a Unprivileged STRT instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
#define __STRHT(value, ptr) __strt(value, ptr)
/**
\brief STRT Unprivileged (32 bit)
\details Executes a Unprivileged STRT instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
#define __STRT(value, ptr) __strt(value, ptr)
#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
/**
\brief Signed Saturate
\details Saturates a signed value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (1..32)
\return Saturated value
*/
__attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
{
if ((sat >= 1U) && (sat <= 32U))
{
const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
const int32_t min = -1 - max ;
if (val > max)
{
return max;
}
else if (val < min)
{
return min;
}
}
return val;
}
/**
\brief Unsigned Saturate
\details Saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
{
if (sat <= 31U)
{
const uint32_t max = ((1U << sat) - 1U);
if (val > (int32_t)max)
{
return max;
}
else if (val < 0)
{
return 0U;
}
}
return (uint32_t)val;
}
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
/* ################### Compiler specific Intrinsics ########################### */
/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
Access to dedicated SIMD instructions
@{
*/
#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
#define __SADD8 __sadd8
#define __QADD8 __qadd8
#define __SHADD8 __shadd8
#define __UADD8 __uadd8
#define __UQADD8 __uqadd8
#define __UHADD8 __uhadd8
#define __SSUB8 __ssub8
#define __QSUB8 __qsub8
#define __SHSUB8 __shsub8
#define __USUB8 __usub8
#define __UQSUB8 __uqsub8
#define __UHSUB8 __uhsub8
#define __SADD16 __sadd16
#define __QADD16 __qadd16
#define __SHADD16 __shadd16
#define __UADD16 __uadd16
#define __UQADD16 __uqadd16
#define __UHADD16 __uhadd16
#define __SSUB16 __ssub16
#define __QSUB16 __qsub16
#define __SHSUB16 __shsub16
#define __USUB16 __usub16
#define __UQSUB16 __uqsub16
#define __UHSUB16 __uhsub16
#define __SASX __sasx
#define __QASX __qasx
#define __SHASX __shasx
#define __UASX __uasx
#define __UQASX __uqasx
#define __UHASX __uhasx
#define __SSAX __ssax
#define __QSAX __qsax
#define __SHSAX __shsax
#define __USAX __usax
#define __UQSAX __uqsax
#define __UHSAX __uhsax
#define __USAD8 __usad8
#define __USADA8 __usada8
#define __SSAT16 __ssat16
#define __USAT16 __usat16
#define __UXTB16 __uxtb16
#define __UXTAB16 __uxtab16
#define __SXTB16 __sxtb16
#define __SXTAB16 __sxtab16
#define __SMUAD __smuad
#define __SMUADX __smuadx
#define __SMLAD __smlad
#define __SMLADX __smladx
#define __SMLALD __smlald
#define __SMLALDX __smlaldx
#define __SMUSD __smusd
#define __SMUSDX __smusdx
#define __SMLSD __smlsd
#define __SMLSDX __smlsdx
#define __SMLSLD __smlsld
#define __SMLSLDX __smlsldx
#define __SEL __sel
#define __QADD __qadd
#define __QSUB __qsub
#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
#define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
((int64_t)(ARG3) << 32U) ) >> 32U))
#endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
/*@} end of group CMSIS_SIMD_intrinsics */
#endif /* __CMSIS_ARMCC_H */

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/**************************************************************************//**
* @file cmsis_compiler.h
* @brief CMSIS compiler generic header file
* @version V5.1.0
* @date 09. October 2018
******************************************************************************/
/*
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef __CMSIS_COMPILER_H
#define __CMSIS_COMPILER_H
#include <stdint.h>
/*
* Arm Compiler 4/5
*/
#if defined ( __CC_ARM )
#include "cmsis_armcc.h"
/*
* Arm Compiler 6.6 LTM (armclang)
*/
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
#include "cmsis_armclang_ltm.h"
/*
* Arm Compiler above 6.10.1 (armclang)
*/
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
#include "cmsis_armclang.h"
/*
* GNU Compiler
*/
#elif defined ( __GNUC__ )
#include "cmsis_gcc.h"
/*
* IAR Compiler
*/
#elif defined ( __ICCARM__ )
#include <cmsis_iccarm.h>
/*
* TI Arm Compiler
*/
#elif defined ( __TI_ARM__ )
#include <cmsis_ccs.h>
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __STATIC_INLINE
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __attribute__((noreturn))
#endif
#ifndef __USED
#define __USED __attribute__((used))
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak))
#endif
#ifndef __PACKED
#define __PACKED __attribute__((packed))
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT struct __attribute__((packed))
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION union __attribute__((packed))
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
struct __attribute__((packed)) T_UINT32 { uint32_t v; };
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
#endif
#ifndef __UNALIGNED_UINT16_WRITE
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
#ifndef __ALIGNED
#define __ALIGNED(x) __attribute__((aligned(x)))
#endif
#ifndef __RESTRICT
#define __RESTRICT __restrict
#endif
#ifndef __COMPILER_BARRIER
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
#define __COMPILER_BARRIER() (void)0
#endif
/*
* TASKING Compiler
*/
#elif defined ( __TASKING__ )
/*
* The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all intrinsics,
* Including the CMSIS ones.
*/
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __STATIC_INLINE
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __attribute__((noreturn))
#endif
#ifndef __USED
#define __USED __attribute__((used))
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak))
#endif
#ifndef __PACKED
#define __PACKED __packed__
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT struct __packed__
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION union __packed__
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
struct __packed__ T_UINT32 { uint32_t v; };
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
#endif
#ifndef __UNALIGNED_UINT16_WRITE
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
#ifndef __ALIGNED
#define __ALIGNED(x) __align(x)
#endif
#ifndef __RESTRICT
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
#define __RESTRICT
#endif
#ifndef __COMPILER_BARRIER
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
#define __COMPILER_BARRIER() (void)0
#endif
/*
* COSMIC Compiler
*/
#elif defined ( __CSMC__ )
#include <cmsis_csm.h>
#ifndef __ASM
#define __ASM _asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __STATIC_INLINE
#endif
#ifndef __NO_RETURN
// NO RETURN is automatically detected hence no warning here
#define __NO_RETURN
#endif
#ifndef __USED
#warning No compiler specific solution for __USED. __USED is ignored.
#define __USED
#endif
#ifndef __WEAK
#define __WEAK __weak
#endif
#ifndef __PACKED
#define __PACKED @packed
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT @packed struct
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION @packed union
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
@packed struct T_UINT32 { uint32_t v; };
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
#endif
#ifndef __UNALIGNED_UINT16_WRITE
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
#ifndef __ALIGNED
#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
#define __ALIGNED(x)
#endif
#ifndef __RESTRICT
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
#define __RESTRICT
#endif
#ifndef __COMPILER_BARRIER
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
#define __COMPILER_BARRIER() (void)0
#endif
#else
#error Unknown compiler.
#endif
#endif /* __CMSIS_COMPILER_H */

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/**************************************************************************//**
* @file cmsis_iccarm.h
* @brief CMSIS compiler ICCARM (IAR Compiler for Arm) header file
* @version V5.1.0
* @date 08. May 2019
******************************************************************************/
//------------------------------------------------------------------------------
//
// Copyright (c) 2017-2019 IAR Systems
// Copyright (c) 2017-2019 Arm Limited. All rights reserved.
//
// Licensed under the Apache License, Version 2.0 (the "License")
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
//
//------------------------------------------------------------------------------
#ifndef __CMSIS_ICCARM_H__
#define __CMSIS_ICCARM_H__
#ifndef __ICCARM__
#error This file should only be compiled by ICCARM
#endif
#pragma system_include
#define __IAR_FT _Pragma("inline=forced") __intrinsic
#if (__VER__ >= 8000000)
#define __ICCARM_V8 1
#else
#define __ICCARM_V8 0
#endif
#ifndef __ALIGNED
#if __ICCARM_V8
#define __ALIGNED(x) __attribute__((aligned(x)))
#elif (__VER__ >= 7080000)
/* Needs IAR language extensions */
#define __ALIGNED(x) __attribute__((aligned(x)))
#else
#warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.
#define __ALIGNED(x)
#endif
#endif
/* Define compiler macros for CPU architecture, used in CMSIS 5.
*/
#if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__
/* Macros already defined */
#else
#if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
#define __ARM_ARCH_8M_MAIN__ 1
#elif defined(__ARM8M_BASELINE__)
#define __ARM_ARCH_8M_BASE__ 1
#elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M'
#if __ARM_ARCH == 6
#define __ARM_ARCH_6M__ 1
#elif __ARM_ARCH == 7
#if __ARM_FEATURE_DSP
#define __ARM_ARCH_7EM__ 1
#else
#define __ARM_ARCH_7M__ 1
#endif
#endif /* __ARM_ARCH */
#endif /* __ARM_ARCH_PROFILE == 'M' */
#endif
/* Alternativ core deduction for older ICCARM's */
#if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \
!defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__)
#if defined(__ARM6M__) && (__CORE__ == __ARM6M__)
#define __ARM_ARCH_6M__ 1
#elif defined(__ARM7M__) && (__CORE__ == __ARM7M__)
#define __ARM_ARCH_7M__ 1
#elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__)
#define __ARM_ARCH_7EM__ 1
#elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__)
#define __ARM_ARCH_8M_BASE__ 1
#elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__)
#define __ARM_ARCH_8M_MAIN__ 1
#elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__)
#define __ARM_ARCH_8M_MAIN__ 1
#else
#error "Unknown target."
#endif
#endif
#if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1
#define __IAR_M0_FAMILY 1
#elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1
#define __IAR_M0_FAMILY 1
#else
#define __IAR_M0_FAMILY 0
#endif
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __COMPILER_BARRIER
#define __COMPILER_BARRIER() __ASM volatile("":::"memory")
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __NO_RETURN
#if __ICCARM_V8
#define __NO_RETURN __attribute__((__noreturn__))
#else
#define __NO_RETURN _Pragma("object_attribute=__noreturn")
#endif
#endif
#ifndef __PACKED
#if __ICCARM_V8
#define __PACKED __attribute__((packed, aligned(1)))
#else
/* Needs IAR language extensions */
#define __PACKED __packed
#endif
#endif
#ifndef __PACKED_STRUCT
#if __ICCARM_V8
#define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
#else
/* Needs IAR language extensions */
#define __PACKED_STRUCT __packed struct
#endif
#endif
#ifndef __PACKED_UNION
#if __ICCARM_V8
#define __PACKED_UNION union __attribute__((packed, aligned(1)))
#else
/* Needs IAR language extensions */
#define __PACKED_UNION __packed union
#endif
#endif
#ifndef __RESTRICT
#if __ICCARM_V8
#define __RESTRICT __restrict
#else
/* Needs IAR language extensions */
#define __RESTRICT restrict
#endif
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __FORCEINLINE
#define __FORCEINLINE _Pragma("inline=forced")
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __FORCEINLINE __STATIC_INLINE
#endif
#ifndef __UNALIGNED_UINT16_READ
#pragma language=save
#pragma language=extended
__IAR_FT uint16_t __iar_uint16_read(void const *ptr)
{
return *(__packed uint16_t*)(ptr);
}
#pragma language=restore
#define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR)
#endif
#ifndef __UNALIGNED_UINT16_WRITE
#pragma language=save
#pragma language=extended
__IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
{
*(__packed uint16_t*)(ptr) = val;;
}
#pragma language=restore
#define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
#endif
#ifndef __UNALIGNED_UINT32_READ
#pragma language=save
#pragma language=extended
__IAR_FT uint32_t __iar_uint32_read(void const *ptr)
{
return *(__packed uint32_t*)(ptr);
}
#pragma language=restore
#define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
#pragma language=save
#pragma language=extended
__IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
{
*(__packed uint32_t*)(ptr) = val;;
}
#pragma language=restore
#define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
#pragma language=save
#pragma language=extended
__packed struct __iar_u32 { uint32_t v; };
#pragma language=restore
#define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v)
#endif
#ifndef __USED
#if __ICCARM_V8
#define __USED __attribute__((used))
#else
#define __USED _Pragma("__root")
#endif
#endif
#ifndef __WEAK
#if __ICCARM_V8
#define __WEAK __attribute__((weak))
#else
#define __WEAK _Pragma("__weak")
#endif
#endif
#ifndef __PROGRAM_START
#define __PROGRAM_START __iar_program_start
#endif
#ifndef __INITIAL_SP
#define __INITIAL_SP CSTACK$$Limit
#endif
#ifndef __STACK_LIMIT
#define __STACK_LIMIT CSTACK$$Base
#endif
#ifndef __VECTOR_TABLE
#define __VECTOR_TABLE __vector_table
#endif
#ifndef __VECTOR_TABLE_ATTRIBUTE
#define __VECTOR_TABLE_ATTRIBUTE @".intvec"
#endif
#ifndef __ICCARM_INTRINSICS_VERSION__
#define __ICCARM_INTRINSICS_VERSION__ 0
#endif
#if __ICCARM_INTRINSICS_VERSION__ == 2
#if defined(__CLZ)
#undef __CLZ
#endif
#if defined(__REVSH)
#undef __REVSH
#endif
#if defined(__RBIT)
#undef __RBIT
#endif
#if defined(__SSAT)
#undef __SSAT
#endif
#if defined(__USAT)
#undef __USAT
#endif
#include "iccarm_builtin.h"
#define __disable_fault_irq __iar_builtin_disable_fiq
#define __disable_irq __iar_builtin_disable_interrupt
#define __enable_fault_irq __iar_builtin_enable_fiq
#define __enable_irq __iar_builtin_enable_interrupt
#define __arm_rsr __iar_builtin_rsr
#define __arm_wsr __iar_builtin_wsr
#define __get_APSR() (__arm_rsr("APSR"))
#define __get_BASEPRI() (__arm_rsr("BASEPRI"))
#define __get_CONTROL() (__arm_rsr("CONTROL"))
#define __get_FAULTMASK() (__arm_rsr("FAULTMASK"))
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
#define __get_FPSCR() (__arm_rsr("FPSCR"))
#define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
#else
#define __get_FPSCR() ( 0 )
#define __set_FPSCR(VALUE) ((void)VALUE)
#endif
#define __get_IPSR() (__arm_rsr("IPSR"))
#define __get_MSP() (__arm_rsr("MSP"))
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
#define __get_MSPLIM() (0U)
#else
#define __get_MSPLIM() (__arm_rsr("MSPLIM"))
#endif
#define __get_PRIMASK() (__arm_rsr("PRIMASK"))
#define __get_PSP() (__arm_rsr("PSP"))
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
#define __get_PSPLIM() (0U)
#else
#define __get_PSPLIM() (__arm_rsr("PSPLIM"))
#endif
#define __get_xPSR() (__arm_rsr("xPSR"))
#define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
#define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE)))
#define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
#define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE)))
#define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
#define __set_MSPLIM(VALUE) ((void)(VALUE))
#else
#define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
#endif
#define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE)))
#define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
#define __set_PSPLIM(VALUE) ((void)(VALUE))
#else
#define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
#endif
#define __TZ_get_CONTROL_NS() (__arm_rsr("CONTROL_NS"))
#define __TZ_set_CONTROL_NS(VALUE) (__arm_wsr("CONTROL_NS", (VALUE)))
#define __TZ_get_PSP_NS() (__arm_rsr("PSP_NS"))
#define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
#define __TZ_get_MSP_NS() (__arm_rsr("MSP_NS"))
#define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
#define __TZ_get_SP_NS() (__arm_rsr("SP_NS"))
#define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE)))
#define __TZ_get_PRIMASK_NS() (__arm_rsr("PRIMASK_NS"))
#define __TZ_set_PRIMASK_NS(VALUE) (__arm_wsr("PRIMASK_NS", (VALUE)))
#define __TZ_get_BASEPRI_NS() (__arm_rsr("BASEPRI_NS"))
#define __TZ_set_BASEPRI_NS(VALUE) (__arm_wsr("BASEPRI_NS", (VALUE)))
#define __TZ_get_FAULTMASK_NS() (__arm_rsr("FAULTMASK_NS"))
#define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE)))
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
#define __TZ_get_PSPLIM_NS() (0U)
#define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE))
#else
#define __TZ_get_PSPLIM_NS() (__arm_rsr("PSPLIM_NS"))
#define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr("PSPLIM_NS", (VALUE)))
#endif
#define __TZ_get_MSPLIM_NS() (__arm_rsr("MSPLIM_NS"))
#define __TZ_set_MSPLIM_NS(VALUE) (__arm_wsr("MSPLIM_NS", (VALUE)))
#define __NOP __iar_builtin_no_operation
#define __CLZ __iar_builtin_CLZ
#define __CLREX __iar_builtin_CLREX
#define __DMB __iar_builtin_DMB
#define __DSB __iar_builtin_DSB
#define __ISB __iar_builtin_ISB
#define __LDREXB __iar_builtin_LDREXB
#define __LDREXH __iar_builtin_LDREXH
#define __LDREXW __iar_builtin_LDREX
#define __RBIT __iar_builtin_RBIT
#define __REV __iar_builtin_REV
#define __REV16 __iar_builtin_REV16
__IAR_FT int16_t __REVSH(int16_t val)
{
return (int16_t) __iar_builtin_REVSH(val);
}
#define __ROR __iar_builtin_ROR
#define __RRX __iar_builtin_RRX
#define __SEV __iar_builtin_SEV
#if !__IAR_M0_FAMILY
#define __SSAT __iar_builtin_SSAT
#endif
#define __STREXB __iar_builtin_STREXB
#define __STREXH __iar_builtin_STREXH
#define __STREXW __iar_builtin_STREX
#if !__IAR_M0_FAMILY
#define __USAT __iar_builtin_USAT
#endif
#define __WFE __iar_builtin_WFE
#define __WFI __iar_builtin_WFI
#if __ARM_MEDIA__
#define __SADD8 __iar_builtin_SADD8
#define __QADD8 __iar_builtin_QADD8
#define __SHADD8 __iar_builtin_SHADD8
#define __UADD8 __iar_builtin_UADD8
#define __UQADD8 __iar_builtin_UQADD8
#define __UHADD8 __iar_builtin_UHADD8
#define __SSUB8 __iar_builtin_SSUB8
#define __QSUB8 __iar_builtin_QSUB8
#define __SHSUB8 __iar_builtin_SHSUB8
#define __USUB8 __iar_builtin_USUB8
#define __UQSUB8 __iar_builtin_UQSUB8
#define __UHSUB8 __iar_builtin_UHSUB8
#define __SADD16 __iar_builtin_SADD16
#define __QADD16 __iar_builtin_QADD16
#define __SHADD16 __iar_builtin_SHADD16
#define __UADD16 __iar_builtin_UADD16
#define __UQADD16 __iar_builtin_UQADD16
#define __UHADD16 __iar_builtin_UHADD16
#define __SSUB16 __iar_builtin_SSUB16
#define __QSUB16 __iar_builtin_QSUB16
#define __SHSUB16 __iar_builtin_SHSUB16
#define __USUB16 __iar_builtin_USUB16
#define __UQSUB16 __iar_builtin_UQSUB16
#define __UHSUB16 __iar_builtin_UHSUB16
#define __SASX __iar_builtin_SASX
#define __QASX __iar_builtin_QASX
#define __SHASX __iar_builtin_SHASX
#define __UASX __iar_builtin_UASX
#define __UQASX __iar_builtin_UQASX
#define __UHASX __iar_builtin_UHASX
#define __SSAX __iar_builtin_SSAX
#define __QSAX __iar_builtin_QSAX
#define __SHSAX __iar_builtin_SHSAX
#define __USAX __iar_builtin_USAX
#define __UQSAX __iar_builtin_UQSAX
#define __UHSAX __iar_builtin_UHSAX
#define __USAD8 __iar_builtin_USAD8
#define __USADA8 __iar_builtin_USADA8
#define __SSAT16 __iar_builtin_SSAT16
#define __USAT16 __iar_builtin_USAT16
#define __UXTB16 __iar_builtin_UXTB16
#define __UXTAB16 __iar_builtin_UXTAB16
#define __SXTB16 __iar_builtin_SXTB16
#define __SXTAB16 __iar_builtin_SXTAB16
#define __SMUAD __iar_builtin_SMUAD
#define __SMUADX __iar_builtin_SMUADX
#define __SMMLA __iar_builtin_SMMLA
#define __SMLAD __iar_builtin_SMLAD
#define __SMLADX __iar_builtin_SMLADX
#define __SMLALD __iar_builtin_SMLALD
#define __SMLALDX __iar_builtin_SMLALDX
#define __SMUSD __iar_builtin_SMUSD
#define __SMUSDX __iar_builtin_SMUSDX
#define __SMLSD __iar_builtin_SMLSD
#define __SMLSDX __iar_builtin_SMLSDX
#define __SMLSLD __iar_builtin_SMLSLD
#define __SMLSLDX __iar_builtin_SMLSLDX
#define __SEL __iar_builtin_SEL
#define __QADD __iar_builtin_QADD
#define __QSUB __iar_builtin_QSUB
#define __PKHBT __iar_builtin_PKHBT
#define __PKHTB __iar_builtin_PKHTB
#endif
#else /* __ICCARM_INTRINSICS_VERSION__ == 2 */
#if __IAR_M0_FAMILY
/* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
#define __CLZ __cmsis_iar_clz_not_active
#define __SSAT __cmsis_iar_ssat_not_active
#define __USAT __cmsis_iar_usat_not_active
#define __RBIT __cmsis_iar_rbit_not_active
#define __get_APSR __cmsis_iar_get_APSR_not_active
#endif
#if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) ))
#define __get_FPSCR __cmsis_iar_get_FPSR_not_active
#define __set_FPSCR __cmsis_iar_set_FPSR_not_active
#endif
#ifdef __INTRINSICS_INCLUDED
#error intrinsics.h is already included previously!
#endif
#include <intrinsics.h>
#if __IAR_M0_FAMILY
/* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
#undef __CLZ
#undef __SSAT
#undef __USAT
#undef __RBIT
#undef __get_APSR
__STATIC_INLINE uint8_t __CLZ(uint32_t data)
{
if (data == 0U) { return 32U; }
uint32_t count = 0U;
uint32_t mask = 0x80000000U;
while ((data & mask) == 0U)
{
count += 1U;
mask = mask >> 1U;
}
return count;
}
__STATIC_INLINE uint32_t __RBIT(uint32_t v)
{
uint8_t sc = 31U;
uint32_t r = v;
for (v >>= 1U; v; v >>= 1U)
{
r <<= 1U;
r |= v & 1U;
sc--;
}
return (r << sc);
}
__STATIC_INLINE uint32_t __get_APSR(void)
{
uint32_t res;
__asm("MRS %0,APSR" : "=r" (res));
return res;
}
#endif
#if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) ))
#undef __get_FPSCR
#undef __set_FPSCR
#define __get_FPSCR() (0)
#define __set_FPSCR(VALUE) ((void)VALUE)
#endif
#pragma diag_suppress=Pe940
#pragma diag_suppress=Pe177
#define __enable_irq __enable_interrupt
#define __disable_irq __disable_interrupt
#define __NOP __no_operation
#define __get_xPSR __get_PSR
#if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0)
__IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)
{
return __LDREX((unsigned long *)ptr);
}
__IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)
{
return __STREX(value, (unsigned long *)ptr);
}
#endif
/* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
#if (__CORTEX_M >= 0x03)
__IAR_FT uint32_t __RRX(uint32_t value)
{
uint32_t result;
__ASM("RRX %0, %1" : "=r"(result) : "r" (value) : "cc");
return(result);
}
__IAR_FT void __set_BASEPRI_MAX(uint32_t value)
{
__asm volatile("MSR BASEPRI_MAX,%0"::"r" (value));
}
#define __enable_fault_irq __enable_fiq
#define __disable_fault_irq __disable_fiq
#endif /* (__CORTEX_M >= 0x03) */
__IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)
{
return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2));
}
#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
__IAR_FT uint32_t __get_MSPLIM(void)
{
uint32_t res;
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
res = 0U;
#else
__asm volatile("MRS %0,MSPLIM" : "=r" (res));
#endif
return res;
}
__IAR_FT void __set_MSPLIM(uint32_t value)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
(void)value;
#else
__asm volatile("MSR MSPLIM,%0" :: "r" (value));
#endif
}
__IAR_FT uint32_t __get_PSPLIM(void)
{
uint32_t res;
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
res = 0U;
#else
__asm volatile("MRS %0,PSPLIM" : "=r" (res));
#endif
return res;
}
__IAR_FT void __set_PSPLIM(uint32_t value)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
(void)value;
#else
__asm volatile("MSR PSPLIM,%0" :: "r" (value));
#endif
}
__IAR_FT uint32_t __TZ_get_CONTROL_NS(void)
{
uint32_t res;
__asm volatile("MRS %0,CONTROL_NS" : "=r" (res));
return res;
}
__IAR_FT void __TZ_set_CONTROL_NS(uint32_t value)
{
__asm volatile("MSR CONTROL_NS,%0" :: "r" (value));
}
__IAR_FT uint32_t __TZ_get_PSP_NS(void)
{
uint32_t res;
__asm volatile("MRS %0,PSP_NS" : "=r" (res));
return res;
}
__IAR_FT void __TZ_set_PSP_NS(uint32_t value)
{
__asm volatile("MSR PSP_NS,%0" :: "r" (value));
}
__IAR_FT uint32_t __TZ_get_MSP_NS(void)
{
uint32_t res;
__asm volatile("MRS %0,MSP_NS" : "=r" (res));
return res;
}
__IAR_FT void __TZ_set_MSP_NS(uint32_t value)
{
__asm volatile("MSR MSP_NS,%0" :: "r" (value));
}
__IAR_FT uint32_t __TZ_get_SP_NS(void)
{
uint32_t res;
__asm volatile("MRS %0,SP_NS" : "=r" (res));
return res;
}
__IAR_FT void __TZ_set_SP_NS(uint32_t value)
{
__asm volatile("MSR SP_NS,%0" :: "r" (value));
}
__IAR_FT uint32_t __TZ_get_PRIMASK_NS(void)
{
uint32_t res;
__asm volatile("MRS %0,PRIMASK_NS" : "=r" (res));
return res;
}
__IAR_FT void __TZ_set_PRIMASK_NS(uint32_t value)
{
__asm volatile("MSR PRIMASK_NS,%0" :: "r" (value));
}
__IAR_FT uint32_t __TZ_get_BASEPRI_NS(void)
{
uint32_t res;
__asm volatile("MRS %0,BASEPRI_NS" : "=r" (res));
return res;
}
__IAR_FT void __TZ_set_BASEPRI_NS(uint32_t value)
{
__asm volatile("MSR BASEPRI_NS,%0" :: "r" (value));
}
__IAR_FT uint32_t __TZ_get_FAULTMASK_NS(void)
{
uint32_t res;
__asm volatile("MRS %0,FAULTMASK_NS" : "=r" (res));
return res;
}
__IAR_FT void __TZ_set_FAULTMASK_NS(uint32_t value)
{
__asm volatile("MSR FAULTMASK_NS,%0" :: "r" (value));
}
__IAR_FT uint32_t __TZ_get_PSPLIM_NS(void)
{
uint32_t res;
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
res = 0U;
#else
__asm volatile("MRS %0,PSPLIM_NS" : "=r" (res));
#endif
return res;
}
__IAR_FT void __TZ_set_PSPLIM_NS(uint32_t value)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
(void)value;
#else
__asm volatile("MSR PSPLIM_NS,%0" :: "r" (value));
#endif
}
__IAR_FT uint32_t __TZ_get_MSPLIM_NS(void)
{
uint32_t res;
__asm volatile("MRS %0,MSPLIM_NS" : "=r" (res));
return res;
}
__IAR_FT void __TZ_set_MSPLIM_NS(uint32_t value)
{
__asm volatile("MSR MSPLIM_NS,%0" :: "r" (value));
}
#endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
#endif /* __ICCARM_INTRINSICS_VERSION__ == 2 */
#define __BKPT(value) __asm volatile ("BKPT %0" : : "i"(value))
#if __IAR_M0_FAMILY
__STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
{
if ((sat >= 1U) && (sat <= 32U))
{
const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
const int32_t min = -1 - max ;
if (val > max)
{
return max;
}
else if (val < min)
{
return min;
}
}
return val;
}
__STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
{
if (sat <= 31U)
{
const uint32_t max = ((1U << sat) - 1U);
if (val > (int32_t)max)
{
return max;
}
else if (val < 0)
{
return 0U;
}
}
return (uint32_t)val;
}
#endif
#if (__CORTEX_M >= 0x03) /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
__IAR_FT uint8_t __LDRBT(volatile uint8_t *addr)
{
uint32_t res;
__ASM("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
return ((uint8_t)res);
}
__IAR_FT uint16_t __LDRHT(volatile uint16_t *addr)
{
uint32_t res;
__ASM("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
return ((uint16_t)res);
}
__IAR_FT uint32_t __LDRT(volatile uint32_t *addr)
{
uint32_t res;
__ASM("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
return res;
}
__IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr)
{
__ASM("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
}
__IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr)
{
__ASM("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
}
__IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr)
{
__ASM("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory");
}
#endif /* (__CORTEX_M >= 0x03) */
#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
__IAR_FT uint8_t __LDAB(volatile uint8_t *ptr)
{
uint32_t res;
__ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
return ((uint8_t)res);
}
__IAR_FT uint16_t __LDAH(volatile uint16_t *ptr)
{
uint32_t res;
__ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
return ((uint16_t)res);
}
__IAR_FT uint32_t __LDA(volatile uint32_t *ptr)
{
uint32_t res;
__ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
return res;
}
__IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr)
{
__ASM volatile ("STLB %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
}
__IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr)
{
__ASM volatile ("STLH %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
}
__IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr)
{
__ASM volatile ("STL %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
}
__IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr)
{
uint32_t res;
__ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
return ((uint8_t)res);
}
__IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr)
{
uint32_t res;
__ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
return ((uint16_t)res);
}
__IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr)
{
uint32_t res;
__ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
return res;
}
__IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
{
uint32_t res;
__ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
return res;
}
__IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
{
uint32_t res;
__ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
return res;
}
__IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
{
uint32_t res;
__ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
return res;
}
#endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
#undef __IAR_FT
#undef __IAR_M0_FAMILY
#undef __ICCARM_V8
#pragma diag_default=Pe940
#pragma diag_default=Pe177
#endif /* __CMSIS_ICCARM_H__ */

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@ -0,0 +1,39 @@
/**************************************************************************//**
* @file cmsis_version.h
* @brief CMSIS Core(M) Version definitions
* @version V5.0.3
* @date 24. June 2019
******************************************************************************/
/*
* Copyright (c) 2009-2019 ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef __CMSIS_VERSION_H
#define __CMSIS_VERSION_H
/* CMSIS Version definitions */
#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
#define __CM_CMSIS_VERSION_SUB ( 3U) /*!< [15:0] CMSIS Core(M) sub version */
#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
__CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
#endif

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@ -0,0 +1,952 @@
/**************************************************************************//**
* @file core_cm0.h
* @brief CMSIS Cortex-M0 Core Peripheral Access Layer Header File
* @version V5.0.6
* @date 13. March 2019
******************************************************************************/
/*
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef __CORE_CM0_H_GENERIC
#define __CORE_CM0_H_GENERIC
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
\page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
CMSIS violates the following MISRA-C:2004 rules:
\li Required Rule 8.5, object/function definition in header file.<br>
Function definitions in header files are used to allow 'inlining'.
\li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
Unions are used for effective representation of core registers.
\li Advisory Rule 19.7, Function-like macro defined.<br>
Function-like macros are used to allow more efficient code.
*/
/*******************************************************************************
* CMSIS definitions
******************************************************************************/
/**
\ingroup Cortex_M0
@{
*/
#include "cmsis_version.h"
/* CMSIS CM0 definitions */
#define __CM0_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
#define __CM0_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */
#define __CM0_CMSIS_VERSION ((__CM0_CMSIS_VERSION_MAIN << 16U) | \
__CM0_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */
#define __CORTEX_M (0U) /*!< Cortex-M Core */
/** __FPU_USED indicates whether an FPU is used or not.
This core does not support an FPU at all
*/
#define __FPU_USED 0U
#if defined ( __CC_ARM )
#if defined __TARGET_FPU_VFP
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#if defined __ARM_FP
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
#elif defined ( __GNUC__ )
#if defined (__VFP_FP__) && !defined(__SOFTFP__)
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
#elif defined ( __ICCARM__ )
#if defined __ARMVFP__
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
#elif defined ( __TI_ARM__ )
#if defined __TI_VFP_SUPPORT__
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
#elif defined ( __TASKING__ )
#if defined __FPU_VFP__
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
#elif defined ( __CSMC__ )
#if ( __CSMC__ & 0x400U)
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
#endif
#include "cmsis_compiler.h" /* CMSIS compiler specific defines */
#ifdef __cplusplus
}
#endif
#endif /* __CORE_CM0_H_GENERIC */
#ifndef __CMSIS_GENERIC
#ifndef __CORE_CM0_H_DEPENDANT
#define __CORE_CM0_H_DEPENDANT
#ifdef __cplusplus
extern "C" {
#endif
/* check device defines and use defaults */
#if defined __CHECK_DEVICE_DEFINES
#ifndef __CM0_REV
#define __CM0_REV 0x0000U
#warning "__CM0_REV not defined in device header file; using default!"
#endif
#ifndef __NVIC_PRIO_BITS
#define __NVIC_PRIO_BITS 2U
#warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
#endif
#ifndef __Vendor_SysTickConfig
#define __Vendor_SysTickConfig 0U
#warning "__Vendor_SysTickConfig not defined in device header file; using default!"
#endif
#endif
/* IO definitions (access restrictions to peripheral registers) */
/**
\defgroup CMSIS_glob_defs CMSIS Global Defines
<strong>IO Type Qualifiers</strong> are used
\li to specify the access to peripheral variables.
\li for automatic generation of peripheral register debug information.
*/
#ifdef __cplusplus
#define __I volatile /*!< Defines 'read only' permissions */
#else
#define __I volatile const /*!< Defines 'read only' permissions */
#endif
#define __O volatile /*!< Defines 'write only' permissions */
#define __IO volatile /*!< Defines 'read / write' permissions */
/* following defines should be used for structure members */
#define __IM volatile const /*! Defines 'read only' structure member permissions */
#define __OM volatile /*! Defines 'write only' structure member permissions */
#define __IOM volatile /*! Defines 'read / write' structure member permissions */
/*@} end of group Cortex_M0 */
/*******************************************************************************
* Register Abstraction
Core Register contain:
- Core Register
- Core NVIC Register
- Core SCB Register
- Core SysTick Register
******************************************************************************/
/**
\defgroup CMSIS_core_register Defines and Type Definitions
\brief Type definitions and defines for Cortex-M processor based devices.
*/
/**
\ingroup CMSIS_core_register
\defgroup CMSIS_CORE Status and Control Registers
\brief Core Register type definitions.
@{
*/
/**
\brief Union type to access the Application Program Status Register (APSR).
*/
typedef union
{
struct
{
uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */
uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
uint32_t C:1; /*!< bit: 29 Carry condition code flag */
uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
uint32_t N:1; /*!< bit: 31 Negative condition code flag */
} b; /*!< Structure used for bit access */
uint32_t w; /*!< Type used for word access */
} APSR_Type;
/* APSR Register Definitions */
#define APSR_N_Pos 31U /*!< APSR: N Position */
#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
#define APSR_Z_Pos 30U /*!< APSR: Z Position */
#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
#define APSR_C_Pos 29U /*!< APSR: C Position */
#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
#define APSR_V_Pos 28U /*!< APSR: V Position */
#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
/**
\brief Union type to access the Interrupt Program Status Register (IPSR).
*/
typedef union
{
struct
{
uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
} b; /*!< Structure used for bit access */
uint32_t w; /*!< Type used for word access */
} IPSR_Type;
/* IPSR Register Definitions */
#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */
#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
/**
\brief Union type to access the Special-Purpose Program Status Registers (xPSR).
*/
typedef union
{
struct
{
uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */
uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
uint32_t C:1; /*!< bit: 29 Carry condition code flag */
uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
uint32_t N:1; /*!< bit: 31 Negative condition code flag */
} b; /*!< Structure used for bit access */
uint32_t w; /*!< Type used for word access */
} xPSR_Type;
/* xPSR Register Definitions */
#define xPSR_N_Pos 31U /*!< xPSR: N Position */
#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */
#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
#define xPSR_C_Pos 29U /*!< xPSR: C Position */
#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
#define xPSR_V_Pos 28U /*!< xPSR: V Position */
#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
#define xPSR_T_Pos 24U /*!< xPSR: T Position */
#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
/**
\brief Union type to access the Control Registers (CONTROL).
*/
typedef union
{
struct
{
uint32_t _reserved0:1; /*!< bit: 0 Reserved */
uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */
} b; /*!< Structure used for bit access */
uint32_t w; /*!< Type used for word access */
} CONTROL_Type;
/* CONTROL Register Definitions */
#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */
#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
/*@} end of group CMSIS_CORE */
/**
\ingroup CMSIS_core_register
\defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
\brief Type definitions for the NVIC Registers
@{
*/
/**
\brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
*/
typedef struct
{
__IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
uint32_t RESERVED0[31U];
__IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
uint32_t RESERVED1[31U];
__IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
uint32_t RESERVED2[31U];
__IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
uint32_t RESERVED3[31U];
uint32_t RESERVED4[64U];
__IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */
} NVIC_Type;
/*@} end of group CMSIS_NVIC */
/**
\ingroup CMSIS_core_register
\defgroup CMSIS_SCB System Control Block (SCB)
\brief Type definitions for the System Control Block Registers
@{
*/
/**
\brief Structure type to access the System Control Block (SCB).
*/
typedef struct
{
__IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
uint32_t RESERVED0;
__IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
__IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
__IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
uint32_t RESERVED1;
__IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */
__IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
} SCB_Type;
/* SCB CPUID Register Definitions */
#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */
#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */
#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */
#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */
#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */
#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
/* SCB Interrupt Control State Register Definitions */
#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */
#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */
#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */
#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */
#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */
#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */
#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */
#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
/* SCB Application Interrupt and Reset Control Register Definitions */
#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */
#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */
#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */
#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */
#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */
#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
/* SCB System Control Register Definitions */
#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */
#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */
#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */
#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
/* SCB Configuration Control Register Definitions */
#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */
#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */
#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
/* SCB System Handler Control and State Register Definitions */
#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */
#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
/*@} end of group CMSIS_SCB */
/**
\ingroup CMSIS_core_register
\defgroup CMSIS_SysTick System Tick Timer (SysTick)
\brief Type definitions for the System Timer Registers.
@{
*/
/**
\brief Structure type to access the System Timer (SysTick).
*/
typedef struct
{
__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
__IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
__IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
__IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
} SysTick_Type;
/* SysTick Control / Status Register Definitions */
#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
/* SysTick Reload Register Definitions */
#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
/* SysTick Current Register Definitions */
#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
/* SysTick Calibration Register Definitions */
#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
/*@} end of group CMSIS_SysTick */
/**
\ingroup CMSIS_core_register
\defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
\brief Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
Therefore they are not covered by the Cortex-M0 header file.
@{
*/
/*@} end of group CMSIS_CoreDebug */
/**
\ingroup CMSIS_core_register
\defgroup CMSIS_core_bitfield Core register bit field macros
\brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
@{
*/
/**
\brief Mask and shift a bit field value for use in a register bit range.
\param[in] field Name of the register bit field.
\param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type.
\return Masked and shifted value.
*/
#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
/**
\brief Mask and shift a register value to extract a bit filed value.
\param[in] field Name of the register bit field.
\param[in] value Value of register. This parameter is interpreted as an uint32_t type.
\return Masked and shifted bit field value.
*/
#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
/*@} end of group CMSIS_core_bitfield */
/**
\ingroup CMSIS_core_register
\defgroup CMSIS_core_base Core Definitions
\brief Definitions for base addresses, unions, and structures.
@{
*/
/* Memory mapping of Core Hardware */
#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
/*@} */
/*******************************************************************************
* Hardware Abstraction Layer
Core Function Interface contains:
- Core NVIC Functions
- Core SysTick Functions
- Core Register Access Functions
******************************************************************************/
/**
\defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
*/
/* ########################## NVIC functions #################################### */
/**
\ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_NVICFunctions NVIC Functions
\brief Functions that manage interrupts and exceptions via the NVIC.
@{
*/
#ifdef CMSIS_NVIC_VIRTUAL
#ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
#define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
#endif
#include CMSIS_NVIC_VIRTUAL_HEADER_FILE
#else
#define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping
#define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping
#define NVIC_EnableIRQ __NVIC_EnableIRQ
#define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ
#define NVIC_DisableIRQ __NVIC_DisableIRQ
#define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ
#define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ
#define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ
/*#define NVIC_GetActive __NVIC_GetActive not available for Cortex-M0 */
#define NVIC_SetPriority __NVIC_SetPriority
#define NVIC_GetPriority __NVIC_GetPriority
#define NVIC_SystemReset __NVIC_SystemReset
#endif /* CMSIS_NVIC_VIRTUAL */
#ifdef CMSIS_VECTAB_VIRTUAL
#ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
#define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
#endif
#include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
#else
#define NVIC_SetVector __NVIC_SetVector
#define NVIC_GetVector __NVIC_GetVector
#endif /* (CMSIS_VECTAB_VIRTUAL) */
#define NVIC_USER_IRQ_OFFSET 16
/* The following EXC_RETURN values are saved the LR on exception entry */
#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */
#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */
#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */
/* Interrupt Priorities are WORD accessible only under Armv6-M */
/* The following MACROS handle generation of the register offset and byte masks */
#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)
#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )
#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )
#define __NVIC_SetPriorityGrouping(X) (void)(X)
#define __NVIC_GetPriorityGrouping() (0U)
/**
\brief Enable Interrupt
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
if ((int32_t)(IRQn) >= 0)
{
__COMPILER_BARRIER();
NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
__COMPILER_BARRIER();
}
}
/**
\brief Get Interrupt Enable status
\details Returns a device specific interrupt enable status from the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\return 0 Interrupt is not enabled.
\return 1 Interrupt is enabled.
\note IRQn must not be negative.
*/
__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
{
if ((int32_t)(IRQn) >= 0)
{
return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
}
else
{
return(0U);
}
}
/**
\brief Disable Interrupt
\details Disables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
{
if ((int32_t)(IRQn) >= 0)
{
NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
__DSB();
__ISB();
}
}
/**
\brief Get Pending Interrupt
\details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
\param [in] IRQn Device specific interrupt number.
\return 0 Interrupt status is not pending.
\return 1 Interrupt status is pending.
\note IRQn must not be negative.
*/
__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
{
if ((int32_t)(IRQn) >= 0)
{
return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
}
else
{
return(0U);
}
}
/**
\brief Set Pending Interrupt
\details Sets the pending bit of a device specific interrupt in the NVIC pending register.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
{
if ((int32_t)(IRQn) >= 0)
{
NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
}
}
/**
\brief Clear Pending Interrupt
\details Clears the pending bit of a device specific interrupt in the NVIC pending register.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
{
if ((int32_t)(IRQn) >= 0)
{
NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
}
}
/**
\brief Set Interrupt Priority
\details Sets the priority of a device specific interrupt or a processor exception.
The interrupt number can be positive to specify a device specific interrupt,
or negative to specify a processor exception.
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
if ((int32_t)(IRQn) >= 0)
{
NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
}
else
{
SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
}
}
/**
\brief Get Interrupt Priority
\details Reads the priority of a device specific interrupt or a processor exception.
The interrupt number can be positive to specify a device specific interrupt,
or negative to specify a processor exception.
\param [in] IRQn Interrupt number.
\return Interrupt Priority.
Value is aligned automatically to the implemented priority bits of the microcontroller.
*/
__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
{
if ((int32_t)(IRQn) >= 0)
{
return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
}
else
{
return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
}
}
/**
\brief Encode Priority
\details Encodes the priority for an interrupt with the given priority group,
preemptive priority value, and subpriority value.
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Used priority group.
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
);
}
/**
\brief Decode Priority
\details Decodes an interrupt priority value with a given priority group to
preemptive priority value and subpriority value.
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
\param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
\param [in] PriorityGroup Used priority group.
\param [out] pPreemptPriority Preemptive priority value (starting from 0).
\param [out] pSubPriority Subpriority value (starting from 0).
*/
__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
{
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
*pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
*pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL);
}
/**
\brief Set Interrupt Vector
\details Sets an interrupt vector in SRAM based interrupt vector table.
The interrupt number can be positive to specify a device specific interrupt,
or negative to specify a processor exception.
Address 0 must be mapped to SRAM.
\param [in] IRQn Interrupt number
\param [in] vector Address of interrupt handler function
*/
__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
{
uint32_t vectors = 0x0U;
(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
/* ARM Application Note 321 states that the M0 does not require the architectural barrier */
}
/**
\brief Get Interrupt Vector
\details Reads an interrupt vector from interrupt vector table.
The interrupt number can be positive to specify a device specific interrupt,
or negative to specify a processor exception.
\param [in] IRQn Interrupt number.
\return Address of interrupt handler function
*/
__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
{
uint32_t vectors = 0x0U;
return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
}
/**
\brief System Reset
\details Initiates a system reset request to reset the MCU.
*/
__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
{
__DSB(); /* Ensure all outstanding memory accesses included
buffered write are completed before reset */
SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
SCB_AIRCR_SYSRESETREQ_Msk);
__DSB(); /* Ensure completion of memory access */
for(;;) /* wait until reset */
{
__NOP();
}
}
/*@} end of CMSIS_Core_NVICFunctions */
/* ########################## FPU functions #################################### */
/**
\ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_FpuFunctions FPU Functions
\brief Function that provides FPU type.
@{
*/
/**
\brief get FPU type
\details returns the FPU type
\returns
- \b 0: No FPU
- \b 1: Single precision FPU
- \b 2: Double + Single precision FPU
*/
__STATIC_INLINE uint32_t SCB_GetFPUType(void)
{
return 0U; /* No FPU */
}
/*@} end of CMSIS_Core_FpuFunctions */
/* ################################## SysTick function ############################################ */
/**
\ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_SysTickFunctions SysTick Functions
\brief Functions that configure the System.
@{
*/
#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
/**
\brief System Tick Configuration
\details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
Counter is in free running mode to generate periodic interrupts.
\param [in] ticks Number of ticks between two interrupts.
\return 0 Function succeeded.
\return 1 Function failed.
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
{
return (1UL); /* Reload value impossible */
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
}
#endif
/*@} end of CMSIS_Core_SysTickFunctions */
#ifdef __cplusplus
}
#endif
#endif /* __CORE_CM0_H_DEPENDANT */
#endif /* __CMSIS_GENERIC */

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/**************************************************************************//**
* @file core_cm1.h
* @brief CMSIS Cortex-M1 Core Peripheral Access Layer Header File
* @version V1.0.1
* @date 12. November 2018
******************************************************************************/
/*
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef __CORE_CM1_H_GENERIC
#define __CORE_CM1_H_GENERIC
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
\page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
CMSIS violates the following MISRA-C:2004 rules:
\li Required Rule 8.5, object/function definition in header file.<br>
Function definitions in header files are used to allow 'inlining'.
\li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
Unions are used for effective representation of core registers.
\li Advisory Rule 19.7, Function-like macro defined.<br>
Function-like macros are used to allow more efficient code.
*/
/*******************************************************************************
* CMSIS definitions
******************************************************************************/
/**
\ingroup Cortex_M1
@{
*/
#include "cmsis_version.h"
/* CMSIS CM1 definitions */
#define __CM1_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
#define __CM1_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */
#define __CM1_CMSIS_VERSION ((__CM1_CMSIS_VERSION_MAIN << 16U) | \
__CM1_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */
#define __CORTEX_M (1U) /*!< Cortex-M Core */
/** __FPU_USED indicates whether an FPU is used or not.
This core does not support an FPU at all
*/
#define __FPU_USED 0U
#if defined ( __CC_ARM )
#if defined __TARGET_FPU_VFP
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#if defined __ARM_FP
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
#elif defined ( __GNUC__ )
#if defined (__VFP_FP__) && !defined(__SOFTFP__)
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
#elif defined ( __ICCARM__ )
#if defined __ARMVFP__
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
#elif defined ( __TI_ARM__ )
#if defined __TI_VFP_SUPPORT__
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
#elif defined ( __TASKING__ )
#if defined __FPU_VFP__
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
#elif defined ( __CSMC__ )
#if ( __CSMC__ & 0x400U)
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
#endif
#endif
#include "cmsis_compiler.h" /* CMSIS compiler specific defines */
#ifdef __cplusplus
}
#endif
#endif /* __CORE_CM1_H_GENERIC */
#ifndef __CMSIS_GENERIC
#ifndef __CORE_CM1_H_DEPENDANT
#define __CORE_CM1_H_DEPENDANT
#ifdef __cplusplus
extern "C" {
#endif
/* check device defines and use defaults */
#if defined __CHECK_DEVICE_DEFINES
#ifndef __CM1_REV
#define __CM1_REV 0x0100U
#warning "__CM1_REV not defined in device header file; using default!"
#endif
#ifndef __NVIC_PRIO_BITS
#define __NVIC_PRIO_BITS 2U
#warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
#endif
#ifndef __Vendor_SysTickConfig
#define __Vendor_SysTickConfig 0U
#warning "__Vendor_SysTickConfig not defined in device header file; using default!"
#endif
#endif
/* IO definitions (access restrictions to peripheral registers) */
/**
\defgroup CMSIS_glob_defs CMSIS Global Defines
<strong>IO Type Qualifiers</strong> are used
\li to specify the access to peripheral variables.
\li for automatic generation of peripheral register debug information.
*/
#ifdef __cplusplus
#define __I volatile /*!< Defines 'read only' permissions */
#else
#define __I volatile const /*!< Defines 'read only' permissions */
#endif
#define __O volatile /*!< Defines 'write only' permissions */
#define __IO volatile /*!< Defines 'read / write' permissions */
/* following defines should be used for structure members */
#define __IM volatile const /*! Defines 'read only' structure member permissions */
#define __OM volatile /*! Defines 'write only' structure member permissions */
#define __IOM volatile /*! Defines 'read / write' structure member permissions */
/*@} end of group Cortex_M1 */
/*******************************************************************************
* Register Abstraction
Core Register contain:
- Core Register
- Core NVIC Register
- Core SCB Register
- Core SysTick Register
******************************************************************************/
/**
\defgroup CMSIS_core_register Defines and Type Definitions
\brief Type definitions and defines for Cortex-M processor based devices.
*/
/**
\ingroup CMSIS_core_register
\defgroup CMSIS_CORE Status and Control Registers
\brief Core Register type definitions.
@{
*/
/**
\brief Union type to access the Application Program Status Register (APSR).
*/
typedef union
{
struct
{
uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */
uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
uint32_t C:1; /*!< bit: 29 Carry condition code flag */
uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
uint32_t N:1; /*!< bit: 31 Negative condition code flag */
} b; /*!< Structure used for bit access */
uint32_t w; /*!< Type used for word access */
} APSR_Type;
/* APSR Register Definitions */
#define APSR_N_Pos 31U /*!< APSR: N Position */
#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
#define APSR_Z_Pos 30U /*!< APSR: Z Position */
#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
#define APSR_C_Pos 29U /*!< APSR: C Position */
#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
#define APSR_V_Pos 28U /*!< APSR: V Position */
#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
/**
\brief Union type to access the Interrupt Program Status Register (IPSR).
*/
typedef union
{
struct
{
uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
} b; /*!< Structure used for bit access */
uint32_t w; /*!< Type used for word access */
} IPSR_Type;
/* IPSR Register Definitions */
#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */
#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
/**
\brief Union type to access the Special-Purpose Program Status Registers (xPSR).
*/
typedef union
{
struct
{
uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */
uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
uint32_t C:1; /*!< bit: 29 Carry condition code flag */
uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
uint32_t N:1; /*!< bit: 31 Negative condition code flag */
} b; /*!< Structure used for bit access */
uint32_t w; /*!< Type used for word access */
} xPSR_Type;
/* xPSR Register Definitions */
#define xPSR_N_Pos 31U /*!< xPSR: N Position */
#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */
#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
#define xPSR_C_Pos 29U /*!< xPSR: C Position */
#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
#define xPSR_V_Pos 28U /*!< xPSR: V Position */
#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
#define xPSR_T_Pos 24U /*!< xPSR: T Position */
#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
/**
\brief Union type to access the Control Registers (CONTROL).
*/
typedef union
{
struct
{
uint32_t _reserved0:1; /*!< bit: 0 Reserved */
uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */
} b; /*!< Structure used for bit access */
uint32_t w; /*!< Type used for word access */
} CONTROL_Type;
/* CONTROL Register Definitions */
#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */
#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
/*@} end of group CMSIS_CORE */
/**
\ingroup CMSIS_core_register
\defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
\brief Type definitions for the NVIC Registers
@{
*/
/**
\brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
*/
typedef struct
{
__IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
uint32_t RESERVED0[31U];
__IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
uint32_t RSERVED1[31U];
__IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
uint32_t RESERVED2[31U];
__IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
uint32_t RESERVED3[31U];
uint32_t RESERVED4[64U];
__IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */
} NVIC_Type;
/*@} end of group CMSIS_NVIC */
/**
\ingroup CMSIS_core_register
\defgroup CMSIS_SCB System Control Block (SCB)
\brief Type definitions for the System Control Block Registers
@{
*/
/**
\brief Structure type to access the System Control Block (SCB).
*/
typedef struct
{
__IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
uint32_t RESERVED0;
__IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
__IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
__IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
uint32_t RESERVED1;
__IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */
__IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
} SCB_Type;
/* SCB CPUID Register Definitions */
#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */
#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */
#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */
#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */
#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */
#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
/* SCB Interrupt Control State Register Definitions */
#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */
#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */
#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */
#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */
#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */
#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */
#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */
#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
/* SCB Application Interrupt and Reset Control Register Definitions */
#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */
#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */
#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */
#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */
#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */
#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
/* SCB System Control Register Definitions */
#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */
#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */
#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */
#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
/* SCB Configuration Control Register Definitions */
#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */
#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */
#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
/* SCB System Handler Control and State Register Definitions */
#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */
#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
/*@} end of group CMSIS_SCB */
/**
\ingroup CMSIS_core_register
\defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
\brief Type definitions for the System Control and ID Register not in the SCB
@{
*/
/**
\brief Structure type to access the System Control and ID Register not in the SCB.
*/
typedef struct
{
uint32_t RESERVED0[2U];
__IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */
} SCnSCB_Type;
/* Auxiliary Control Register Definitions */
#define SCnSCB_ACTLR_ITCMUAEN_Pos 4U /*!< ACTLR: Instruction TCM Upper Alias Enable Position */
#define SCnSCB_ACTLR_ITCMUAEN_Msk (1UL << SCnSCB_ACTLR_ITCMUAEN_Pos) /*!< ACTLR: Instruction TCM Upper Alias Enable Mask */
#define SCnSCB_ACTLR_ITCMLAEN_Pos 3U /*!< ACTLR: Instruction TCM Lower Alias Enable Position */
#define SCnSCB_ACTLR_ITCMLAEN_Msk (1UL << SCnSCB_ACTLR_ITCMLAEN_Pos) /*!< ACTLR: Instruction TCM Lower Alias Enable Mask */
/*@} end of group CMSIS_SCnotSCB */
/**
\ingroup CMSIS_core_register
\defgroup CMSIS_SysTick System Tick Timer (SysTick)
\brief Type definitions for the System Timer Registers.
@{
*/
/**
\brief Structure type to access the System Timer (SysTick).
*/
typedef struct
{
__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
__IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
__IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
__IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
} SysTick_Type;
/* SysTick Control / Status Register Definitions */
#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
/* SysTick Reload Register Definitions */
#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
/* SysTick Current Register Definitions */
#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
/* SysTick Calibration Register Definitions */
#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
/*@} end of group CMSIS_SysTick */
/**
\ingroup CMSIS_core_register
\defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
\brief Cortex-M1 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
Therefore they are not covered by the Cortex-M1 header file.
@{
*/
/*@} end of group CMSIS_CoreDebug */
/**
\ingroup CMSIS_core_register
\defgroup CMSIS_core_bitfield Core register bit field macros
\brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
@{
*/
/**
\brief Mask and shift a bit field value for use in a register bit range.
\param[in] field Name of the register bit field.
\param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type.
\return Masked and shifted value.
*/
#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
/**
\brief Mask and shift a register value to extract a bit filed value.
\param[in] field Name of the register bit field.
\param[in] value Value of register. This parameter is interpreted as an uint32_t type.
\return Masked and shifted bit field value.
*/
#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
/*@} end of group CMSIS_core_bitfield */
/**
\ingroup CMSIS_core_register
\defgroup CMSIS_core_base Core Definitions
\brief Definitions for base addresses, unions, and structures.
@{
*/
/* Memory mapping of Core Hardware */
#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */
#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
/*@} */
/*******************************************************************************
* Hardware Abstraction Layer
Core Function Interface contains:
- Core NVIC Functions
- Core SysTick Functions
- Core Register Access Functions
******************************************************************************/
/**
\defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
*/
/* ########################## NVIC functions #################################### */
/**
\ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_NVICFunctions NVIC Functions
\brief Functions that manage interrupts and exceptions via the NVIC.
@{
*/
#ifdef CMSIS_NVIC_VIRTUAL
#ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
#define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
#endif
#include CMSIS_NVIC_VIRTUAL_HEADER_FILE
#else
#define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping
#define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping
#define NVIC_EnableIRQ __NVIC_EnableIRQ
#define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ
#define NVIC_DisableIRQ __NVIC_DisableIRQ
#define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ
#define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ
#define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ
/*#define NVIC_GetActive __NVIC_GetActive not available for Cortex-M1 */
#define NVIC_SetPriority __NVIC_SetPriority
#define NVIC_GetPriority __NVIC_GetPriority
#define NVIC_SystemReset __NVIC_SystemReset
#endif /* CMSIS_NVIC_VIRTUAL */
#ifdef CMSIS_VECTAB_VIRTUAL
#ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
#define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
#endif
#include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
#else
#define NVIC_SetVector __NVIC_SetVector
#define NVIC_GetVector __NVIC_GetVector
#endif /* (CMSIS_VECTAB_VIRTUAL) */
#define NVIC_USER_IRQ_OFFSET 16
/* The following EXC_RETURN values are saved the LR on exception entry */
#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */
#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */
#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */
/* Interrupt Priorities are WORD accessible only under Armv6-M */
/* The following MACROS handle generation of the register offset and byte masks */
#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)
#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )
#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )
#define __NVIC_SetPriorityGrouping(X) (void)(X)
#define __NVIC_GetPriorityGrouping() (0U)
/**
\brief Enable Interrupt
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
if ((int32_t)(IRQn) >= 0)
{
__COMPILER_BARRIER();
NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
__COMPILER_BARRIER();
}
}
/**
\brief Get Interrupt Enable status
\details Returns a device specific interrupt enable status from the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\return 0 Interrupt is not enabled.
\return 1 Interrupt is enabled.
\note IRQn must not be negative.
*/
__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
{
if ((int32_t)(IRQn) >= 0)
{
return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
}
else
{
return(0U);
}
}
/**
\brief Disable Interrupt
\details Disables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
{
if ((int32_t)(IRQn) >= 0)
{
NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
__DSB();
__ISB();
}
}
/**
\brief Get Pending Interrupt
\details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
\param [in] IRQn Device specific interrupt number.
\return 0 Interrupt status is not pending.
\return 1 Interrupt status is pending.
\note IRQn must not be negative.
*/
__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
{
if ((int32_t)(IRQn) >= 0)
{
return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
}
else
{
return(0U);
}
}
/**
\brief Set Pending Interrupt
\details Sets the pending bit of a device specific interrupt in the NVIC pending register.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
{
if ((int32_t)(IRQn) >= 0)
{
NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
}
}
/**
\brief Clear Pending Interrupt
\details Clears the pending bit of a device specific interrupt in the NVIC pending register.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
{
if ((int32_t)(IRQn) >= 0)
{
NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
}
}
/**
\brief Set Interrupt Priority
\details Sets the priority of a device specific interrupt or a processor exception.
The interrupt number can be positive to specify a device specific interrupt,
or negative to specify a processor exception.
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
if ((int32_t)(IRQn) >= 0)
{
NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
}
else
{
SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
}
}
/**
\brief Get Interrupt Priority
\details Reads the priority of a device specific interrupt or a processor exception.
The interrupt number can be positive to specify a device specific interrupt,
or negative to specify a processor exception.
\param [in] IRQn Interrupt number.
\return Interrupt Priority.
Value is aligned automatically to the implemented priority bits of the microcontroller.
*/
__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
{
if ((int32_t)(IRQn) >= 0)
{
return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
}
else
{
return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
}
}
/**
\brief Encode Priority
\details Encodes the priority for an interrupt with the given priority group,
preemptive priority value, and subpriority value.
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Used priority group.
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
);
}
/**
\brief Decode Priority
\details Decodes an interrupt priority value with a given priority group to
preemptive priority value and subpriority value.
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
\param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
\param [in] PriorityGroup Used priority group.
\param [out] pPreemptPriority Preemptive priority value (starting from 0).
\param [out] pSubPriority Subpriority value (starting from 0).
*/
__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
{
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
*pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
*pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL);
}
/**
\brief Set Interrupt Vector
\details Sets an interrupt vector in SRAM based interrupt vector table.
The interrupt number can be positive to specify a device specific interrupt,
or negative to specify a processor exception.
Address 0 must be mapped to SRAM.
\param [in] IRQn Interrupt number
\param [in] vector Address of interrupt handler function
*/
__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
{
uint32_t *vectors = (uint32_t *)0x0U;
vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
/* ARM Application Note 321 states that the M1 does not require the architectural barrier */
}
/**
\brief Get Interrupt Vector
\details Reads an interrupt vector from interrupt vector table.
The interrupt number can be positive to specify a device specific interrupt,
or negative to specify a processor exception.
\param [in] IRQn Interrupt number.
\return Address of interrupt handler function
*/
__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
{
uint32_t *vectors = (uint32_t *)0x0U;
return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
}
/**
\brief System Reset
\details Initiates a system reset request to reset the MCU.
*/
__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
{
__DSB(); /* Ensure all outstanding memory accesses included
buffered write are completed before reset */
SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
SCB_AIRCR_SYSRESETREQ_Msk);
__DSB(); /* Ensure completion of memory access */
for(;;) /* wait until reset */
{
__NOP();
}
}
/*@} end of CMSIS_Core_NVICFunctions */
/* ########################## FPU functions #################################### */
/**
\ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_FpuFunctions FPU Functions
\brief Function that provides FPU type.
@{
*/
/**
\brief get FPU type
\details returns the FPU type
\returns
- \b 0: No FPU
- \b 1: Single precision FPU
- \b 2: Double + Single precision FPU
*/
__STATIC_INLINE uint32_t SCB_GetFPUType(void)
{
return 0U; /* No FPU */
}
/*@} end of CMSIS_Core_FpuFunctions */
/* ################################## SysTick function ############################################ */
/**
\ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_SysTickFunctions SysTick Functions
\brief Functions that configure the System.
@{
*/
#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
/**
\brief System Tick Configuration
\details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
Counter is in free running mode to generate periodic interrupts.
\param [in] ticks Number of ticks between two interrupts.
\return 0 Function succeeded.
\return 1 Function failed.
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
{
return (1UL); /* Reload value impossible */
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
}
#endif
/*@} end of CMSIS_Core_SysTickFunctions */
#ifdef __cplusplus
}
#endif
#endif /* __CORE_CM1_H_DEPENDANT */
#endif /* __CMSIS_GENERIC */

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/******************************************************************************
* @file mpu_armv7.h
* @brief CMSIS MPU API for Armv7-M MPU
* @version V5.1.0
* @date 08. March 2019
******************************************************************************/
/*
* Copyright (c) 2017-2019 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef ARM_MPU_ARMV7_H
#define ARM_MPU_ARMV7_H
#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes
#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes
#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes
#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes
#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes
#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte
#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes
#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes
#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes
#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes
#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes
#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes
#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes
#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes
#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes
#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte
#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes
#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes
#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes
#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes
#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes
#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes
#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes
#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes
#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes
#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte
#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes
#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes
#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access
#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only
#define ARM_MPU_AP_URO 2U ///!< MPU Access Permission unprivileged access read-only
#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access
#define ARM_MPU_AP_PRO 5U ///!< MPU Access Permission privileged access read-only
#define ARM_MPU_AP_RO 6U ///!< MPU Access Permission read-only access
/** MPU Region Base Address Register Value
*
* \param Region The region to be configured, number 0 to 15.
* \param BaseAddress The base address for the region.
*/
#define ARM_MPU_RBAR(Region, BaseAddress) \
(((BaseAddress) & MPU_RBAR_ADDR_Msk) | \
((Region) & MPU_RBAR_REGION_Msk) | \
(MPU_RBAR_VALID_Msk))
/**
* MPU Memory Access Attributes
*
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
* \param IsShareable Region is shareable between multiple bus masters.
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
*/
#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \
((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \
(((IsShareable) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \
(((IsCacheable) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \
(((IsBufferable) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk))
/**
* MPU Region Attribute and Size Register Value
*
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
* \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_.
* \param SubRegionDisable Sub-region disable field.
* \param Size Region size of the region to be configured, for example 4K, 8K.
*/
#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size) \
((((DisableExec) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \
(((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \
(((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \
(((SubRegionDisable) << MPU_RASR_SRD_Pos) & MPU_RASR_SRD_Msk) | \
(((Size) << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk) | \
(((MPU_RASR_ENABLE_Msk))))
/**
* MPU Region Attribute and Size Register Value
*
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
* \param IsShareable Region is shareable between multiple bus masters.
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
* \param SubRegionDisable Sub-region disable field.
* \param Size Region size of the region to be configured, for example 4K, 8K.
*/
#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)
/**
* MPU Memory Access Attribute for strongly ordered memory.
* - TEX: 000b
* - Shareable
* - Non-cacheable
* - Non-bufferable
*/
#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)
/**
* MPU Memory Access Attribute for device memory.
* - TEX: 000b (if shareable) or 010b (if non-shareable)
* - Shareable or non-shareable
* - Non-cacheable
* - Bufferable (if shareable) or non-bufferable (if non-shareable)
*
* \param IsShareable Configures the device memory as shareable or non-shareable.
*/
#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))
/**
* MPU Memory Access Attribute for normal memory.
* - TEX: 1BBb (reflecting outer cacheability rules)
* - Shareable or non-shareable
* - Cacheable or non-cacheable (reflecting inner cacheability rules)
* - Bufferable or non-bufferable (reflecting inner cacheability rules)
*
* \param OuterCp Configures the outer cache policy.
* \param InnerCp Configures the inner cache policy.
* \param IsShareable Configures the memory as shareable or non-shareable.
*/
#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) & 2U), ((InnerCp) & 1U))
/**
* MPU Memory Access Attribute non-cacheable policy.
*/
#define ARM_MPU_CACHEP_NOCACHE 0U
/**
* MPU Memory Access Attribute write-back, write and read allocate policy.
*/
#define ARM_MPU_CACHEP_WB_WRA 1U
/**
* MPU Memory Access Attribute write-through, no write allocate policy.
*/
#define ARM_MPU_CACHEP_WT_NWA 2U
/**
* MPU Memory Access Attribute write-back, no write allocate policy.
*/
#define ARM_MPU_CACHEP_WB_NWA 3U
/**
* Struct for a single MPU Region
*/
typedef struct {
uint32_t RBAR; //!< The region base address register value (RBAR)
uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
} ARM_MPU_Region_t;
/** Enable the MPU.
* \param MPU_Control Default access permissions for unconfigured regions.
*/
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
{
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
#endif
__DSB();
__ISB();
}
/** Disable the MPU.
*/
__STATIC_INLINE void ARM_MPU_Disable(void)
{
__DMB();
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
#endif
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
}
/** Clear and disable the given MPU region.
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
{
MPU->RNR = rnr;
MPU->RASR = 0U;
}
/** Configure an MPU region.
* \param rbar Value for RBAR register.
* \param rsar Value for RSAR register.
*/
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
{
MPU->RBAR = rbar;
MPU->RASR = rasr;
}
/** Configure the given MPU region.
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rsar Value for RSAR register.
*/
__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
{
MPU->RNR = rnr;
MPU->RBAR = rbar;
MPU->RASR = rasr;
}
/** Memcopy with strictly ordered memory access, e.g. for register targets.
* \param dst Destination data is copied to.
* \param src Source data is copied from.
* \param len Amount of data words to be copied.
*/
__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
{
uint32_t i;
for (i = 0U; i < len; ++i)
{
dst[i] = src[i];
}
}
/** Load the given number of MPU regions from a table.
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)
{
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
while (cnt > MPU_TYPE_RALIASES) {
ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
table += MPU_TYPE_RALIASES;
cnt -= MPU_TYPE_RALIASES;
}
ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
}
#endif

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/******************************************************************************
* @file mpu_armv8.h
* @brief CMSIS MPU API for Armv8-M and Armv8.1-M MPU
* @version V5.1.0
* @date 08. March 2019
******************************************************************************/
/*
* Copyright (c) 2017-2019 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef ARM_MPU_ARMV8_H
#define ARM_MPU_ARMV8_H
/** \brief Attribute for device memory (outer only) */
#define ARM_MPU_ATTR_DEVICE ( 0U )
/** \brief Attribute for non-cacheable, normal memory */
#define ARM_MPU_ATTR_NON_CACHEABLE ( 4U )
/** \brief Attribute for normal memory (outer and inner)
* \param NT Non-Transient: Set to 1 for non-transient data.
* \param WB Write-Back: Set to 1 to use write-back update policy.
* \param RA Read Allocation: Set to 1 to use cache allocation on read miss.
* \param WA Write Allocation: Set to 1 to use cache allocation on write miss.
*/
#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \
(((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U))
/** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U)
/** \brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_nGnRE (1U)
/** \brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_nGRE (2U)
/** \brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_GRE (3U)
/** \brief Memory Attribute
* \param O Outer memory attributes
* \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes
*/
#define ARM_MPU_ATTR(O, I) (((O & 0xFU) << 4U) | (((O & 0xFU) != 0U) ? (I & 0xFU) : ((I & 0x3U) << 2U)))
/** \brief Normal memory non-shareable */
#define ARM_MPU_SH_NON (0U)
/** \brief Normal memory outer shareable */
#define ARM_MPU_SH_OUTER (2U)
/** \brief Normal memory inner shareable */
#define ARM_MPU_SH_INNER (3U)
/** \brief Memory access permissions
* \param RO Read-Only: Set to 1 for read-only memory.
* \param NP Non-Privileged: Set to 1 for non-privileged memory.
*/
#define ARM_MPU_AP_(RO, NP) (((RO & 1U) << 1U) | (NP & 1U))
/** \brief Region Base Address Register value
* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
* \param SH Defines the Shareability domain for this memory region.
* \param RO Read-Only: Set to 1 for a read-only memory region.
* \param NP Non-Privileged: Set to 1 for a non-privileged memory region.
* \oaram XN eXecute Never: Set to 1 for a non-executable memory region.
*/
#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
((BASE & MPU_RBAR_BASE_Msk) | \
((SH << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
((XN << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
/** \brief Region Limit Address Register value
* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
* \param IDX The attribute index to be associated with this memory region.
*/
#define ARM_MPU_RLAR(LIMIT, IDX) \
((LIMIT & MPU_RLAR_LIMIT_Msk) | \
((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
(MPU_RLAR_EN_Msk))
#if defined(MPU_RLAR_PXN_Pos)
/** \brief Region Limit Address Register with PXN value
* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
* \param PXN Privileged execute never. Defines whether code can be executed from this privileged region.
* \param IDX The attribute index to be associated with this memory region.
*/
#define ARM_MPU_RLAR_PXN(LIMIT, PXN, IDX) \
((LIMIT & MPU_RLAR_LIMIT_Msk) | \
((PXN << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \
((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
(MPU_RLAR_EN_Msk))
#endif
/**
* Struct for a single MPU Region
*/
typedef struct {
uint32_t RBAR; /*!< Region Base Address Register value */
uint32_t RLAR; /*!< Region Limit Address Register value */
} ARM_MPU_Region_t;
/** Enable the MPU.
* \param MPU_Control Default access permissions for unconfigured regions.
*/
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
{
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
#endif
__DSB();
__ISB();
}
/** Disable the MPU.
*/
__STATIC_INLINE void ARM_MPU_Disable(void)
{
__DMB();
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
#endif
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
}
#ifdef MPU_NS
/** Enable the Non-secure MPU.
* \param MPU_Control Default access permissions for unconfigured regions.
*/
__STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
{
MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
#endif
__DSB();
__ISB();
}
/** Disable the Non-secure MPU.
*/
__STATIC_INLINE void ARM_MPU_Disable_NS(void)
{
__DMB();
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
#endif
MPU_NS->CTRL &= ~MPU_CTRL_ENABLE_Msk;
}
#endif
/** Set the memory attribute encoding to the given MPU.
* \param mpu Pointer to the MPU to be configured.
* \param idx The attribute index to be set [0-7]
* \param attr The attribute value to be set.
*/
__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr)
{
const uint8_t reg = idx / 4U;
const uint32_t pos = ((idx % 4U) * 8U);
const uint32_t mask = 0xFFU << pos;
if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
return; // invalid index
}
mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
}
/** Set the memory attribute encoding.
* \param idx The attribute index to be set [0-7]
* \param attr The attribute value to be set.
*/
__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)
{
ARM_MPU_SetMemAttrEx(MPU, idx, attr);
}
#ifdef MPU_NS
/** Set the memory attribute encoding to the Non-secure MPU.
* \param idx The attribute index to be set [0-7]
* \param attr The attribute value to be set.
*/
__STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr)
{
ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr);
}
#endif
/** Clear and disable the given MPU region of the given MPU.
* \param mpu Pointer to MPU to be used.
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr)
{
mpu->RNR = rnr;
mpu->RLAR = 0U;
}
/** Clear and disable the given MPU region.
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
{
ARM_MPU_ClrRegionEx(MPU, rnr);
}
#ifdef MPU_NS
/** Clear and disable the given Non-secure MPU region.
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
{
ARM_MPU_ClrRegionEx(MPU_NS, rnr);
}
#endif
/** Configure the given MPU region of the given MPU.
* \param mpu Pointer to MPU to be used.
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rlar Value for RLAR register.
*/
__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
{
mpu->RNR = rnr;
mpu->RBAR = rbar;
mpu->RLAR = rlar;
}
/** Configure the given MPU region.
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rlar Value for RLAR register.
*/
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
{
ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
}
#ifdef MPU_NS
/** Configure the given Non-secure MPU region.
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rlar Value for RLAR register.
*/
__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
{
ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);
}
#endif
/** Memcopy with strictly ordered memory access, e.g. for register targets.
* \param dst Destination data is copied to.
* \param src Source data is copied from.
* \param len Amount of data words to be copied.
*/
__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
{
uint32_t i;
for (i = 0U; i < len; ++i)
{
dst[i] = src[i];
}
}
/** Load the given number of MPU regions from a table to the given MPU.
* \param mpu Pointer to the MPU registers to be used.
* \param rnr First region number to be configured.
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
if (cnt == 1U) {
mpu->RNR = rnr;
ARM_MPU_OrderedMemcpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
} else {
uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U);
uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
mpu->RNR = rnrBase;
while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);
table += c;
cnt -= c;
rnrOffset = 0U;
rnrBase += MPU_TYPE_RALIASES;
mpu->RNR = rnrBase;
}
ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
}
}
/** Load the given number of MPU regions from a table.
* \param rnr First region number to be configured.
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{
ARM_MPU_LoadEx(MPU, rnr, table, cnt);
}
#ifdef MPU_NS
/** Load the given number of MPU regions from a table to the Non-secure MPU.
* \param rnr First region number to be configured.
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{
ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
}
#endif
#endif

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/******************************************************************************
* @file tz_context.h
* @brief Context Management for Armv8-M TrustZone
* @version V1.0.1
* @date 10. January 2018
******************************************************************************/
/*
* Copyright (c) 2017-2018 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef TZ_CONTEXT_H
#define TZ_CONTEXT_H
#include <stdint.h>
#ifndef TZ_MODULEID_T
#define TZ_MODULEID_T
/// \details Data type that identifies secure software modules called by a process.
typedef uint32_t TZ_ModuleId_t;
#endif
/// \details TZ Memory ID identifies an allocated memory slot.
typedef uint32_t TZ_MemoryId_t;
/// Initialize secure context memory system
/// \return execution status (1: success, 0: error)
uint32_t TZ_InitContextSystem_S (void);
/// Allocate context memory for calling secure software modules in TrustZone
/// \param[in] module identifies software modules called from non-secure mode
/// \return value != 0 id TrustZone memory slot identifier
/// \return value 0 no memory available or internal error
TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
/// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error)
uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
/// Load secure context (called on RTOS thread context switch)
/// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error)
uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
/// Store secure context (called on RTOS thread context switch)
/// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error)
uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
#endif // TZ_CONTEXT_H

42217
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/******************************************************************************
* Copyright (C) 2017, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file adc.h
**
** Header file for AD Converter functions
** @link ADC Group Some description @endlink
**
** - 2017-06-28 Alex First Version
**
******************************************************************************/
#ifndef __ADC_H__
#define __ADC_H__
/******************************************************************************/
/* Include files */
/******************************************************************************/
#include "ddl.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup AdcGroup AD Converter (ADC)
**
******************************************************************************/
//@{
/******************************************************************************
* Global definitions
******************************************************************************/
#define ADC_SCAN_CH0_EN (0x1u) /*!< SCAN模式使用ADC CH0 */
#define ADC_SCAN_CH1_EN (0x1u<<1) /*!< SCAN模式使用ADC CH1 */
#define ADC_SCAN_CH2_EN (0x1u<<2) /*!< SCAN模式使用ADC CH2 */
#define ADC_SCAN_CH3_EN (0x1u<<3) /*!< SCAN模式使用ADC CH3 */
#define ADC_SCAN_CH4_EN (0x1u<<4) /*!< SCAN模式使用ADC CH4 */
#define ADC_SCAN_CH5_EN (0x1u<<5) /*!< SCAN模式使用ADC CH5 */
#define ADC_SCAN_CH6_EN (0x1u<<6) /*!< SCAN模式使用ADC CH6 */
#define ADC_SCAN_CH7_EN (0x1u<<7) /*!< SCAN模式使用ADC CH7 */
/******************************************************************************
** Global type definitions
*****************************************************************************/
/**
******************************************************************************
** \brief ADC
*****************************************************************************/
typedef enum en_adc_mode
{
AdcSglMode = 0u, /*!< 单输入通道单次转换模式 */
AdcScanMode = 1u, /*!< 多输入通道顺序/插队扫描转换模式*/
}en_adc_mode_t;
/**
******************************************************************************
** \brief ADC
*****************************************************************************/
typedef enum en_adc_clk_sel
{
AdcMskClkDiv1 = 0u<<2, /*!< PCLK */
AdcMskClkDiv2 = 1u<<2, /*!< 1/2 PCLK */
AdcMskClkDiv4 = 2u<<2, /*!< 1/4 PCLK */
AdcMskClkDiv8 = 3u<<2, /*!< 1/8 PCLK */
} en_adc_clk_div_t;
/**
******************************************************************************
** \brief ADC
*****************************************************************************/
typedef enum en_adc_ref_vol_sel
{
AdcMskRefVolSelInBgr1p5 = 0u<<9, /*!<内部参考电压1.5V(SPS<=200kHz)*/
AdcMskRefVolSelInBgr2p5 = 1u<<9, /*!<内部参考电压2.5V(avdd>3V,SPS<=200kHz)*/
AdcMskRefVolSelExtern1 = 2u<<9, /*!<外部输入(max avdd) PB01*/
AdcMskRefVolSelAVDD = 3u<<9, /*!<AVDD*/
}en_adc_ref_vol_sel_t;
/**
******************************************************************************
** \brief ADC
*****************************************************************************/
typedef enum en_adc_samp_ch_sel
{ /*!<CHMAP = 0*/ /*!<CHMAP = 1*/
AdcExInputCH0 = 0u, /*!<使用PA00*/ /*!<使用PD08*/
AdcExInputCH1 = 1u, /*!<使用PA01*/ /*!<使用PD09*/
AdcExInputCH2 = 2u, /*!<使用PA02*/ /*!<使用PD10*/
AdcExInputCH3 = 3u, /*!<使用PA03*/ /*!<使用PD11*/
AdcExInputCH4 = 4u, /*!<使用PA04*/ /*!<使用PA04*/
AdcExInputCH5 = 5u, /*!<使用PA05*/ /*!<使用PA05*/
AdcExInputCH6 = 6u, /*!<使用PA06*/ /*!<使用PE08*/
AdcExInputCH7 = 7u, /*!<使用PA07*/ /*!<使用PE09*/
AdcExInputCH8 = 8u, /*!<使用PB00*/ /*!<使用PE10*/
AdcExInputCH9 = 9u, /*!<使用PB01*/ /*!<使用PB01*/
AdcExInputCH10 = 10u, /*!<使用PC00*/ /*!<使用PE11*/
AdcExInputCH11 = 11u, /*!<使用PC01*/ /*!<使用PE12*/
AdcExInputCH12 = 12u, /*!<使用PC02*/ /*!<使用PE13*/
AdcExInputCH13 = 13u, /*!<使用PC03*/ /*!<使用PE14*/
AdcExInputCH14 = 14u, /*!<使用PC04*/ /*!<使用PC04*/
AdcExInputCH15 = 15u, /*!<使用PC05*/ /*!<使用PC05*/
AdcExInputCH16 = 16u, /*!<使用PB02*/ /*!<使用PB02*/
AdcExInputCH17 = 17u, /*!<使用PB10*/ /*!<使用PB10*/
AdcExInputCH18 = 18u, /*!<使用PB11*/ /*!<使用PB11*/
AdcExInputCH19 = 19u, /*!<使用PB12*/ /*!<使用PB12*/
AdcExInputCH20 = 20u, /*!<使用PB13*/ /*!<使用PB13*/
AdcExInputCH21 = 21u, /*!<使用PB14*/ /*!<使用PB14*/
AdcExInputCH22 = 22u, /*!<使用PB15*/ /*!<使用PB15*/
AdcExInputCH23 = 23u, /*!<使用PE15*/ /*!<使用PE15*/
AdcExInputCH24 = 24u, /*!<使用PC07*/ /*!<使用PC07*/
AdcDac0Input = 25u, /*!<使用DAC1输出(必须使用输入增益)*/
AdcDac1Input = 26u, /*!<使用DAC1输出(必须使用输入增益)*/
AdcAVccdiv3Input = 27u, /*!<使用1/3 AVCC(必须使用输入增益)*/
AdcAiTsInput = 28u, /*!<使用内置温度传感器BGR_TS(必须使用输入增益)*/
AdcVref1_2Input = 29u, /*!<使用内部基准1.2V(必须使用输入增益)*/
}en_adc_samp_ch_sel_t;
/**
******************************************************************************
** \brief ADC
*****************************************************************************/
typedef enum en_adc_op_buf
{
AdcMskBufEnable = 1u<<11, /*!< 打开放大器BUF */
AdcMskBufDisable = 0u, /*!< 关闭放大器BUF */
} en_adc_op_buf_t;
/**
******************************************************************************
** \brief ADC
*****************************************************************************/
typedef enum en_adc_samp_cycle_sel
{
AdcMskSampCycle4Clk = 0u<<12, /*!<4个采样时钟*/
AdcMskSampCycle6Clk = 1u<<12, /*!<6个采样时钟*/
AdcMskSampCycle8Clk = 2u<<12, /*!<8个采样时钟*/
AdcMskSampCycle12Clk = 3u<<12, /*!<12个采样时钟*/
}en_adc_samp_cycle_sel_t;
/**
******************************************************************************
** \brief ADC使
*****************************************************************************/
typedef enum en_adc_in_ref
{
AdcMskInRefEnable = 1u<<14, /*!< 内部参考电压使能 */
AdcMskInRefDisable = 0u, /*!< 内部参考电压关闭 */
}en_adc_in_ref_t;
/**
******************************************************************************
** \brief ADC
*****************************************************************************/
typedef enum en_adc_trig_sel
{
AdcMskTrigTimer0 = 1u<<0, /*!<选择timer0中断源自动触发ADC采样*/
AdcMskTrigTimer1 = 1u<<1, /*!<选择timer1中断源自动触发ADC采样*/
AdcMskTrigTimer2 = 1u<<2, /*!<选择timer2中断源自动触发ADC采样*/
AdcMskTrigTimer3 = 1u<<3, /*!<选择timer3中断源自动触发ADC采样*/
AdcMskTrigTimer4 = 1u<<4, /*!<选择timer4中断源自动触发ADC采样*/
AdcMskTrigTimer5 = 1u<<5, /*!<选择timer5中断源自动触发ADC采样*/
AdcMskTrigTimer6 = 1u<<6, /*!<选择timer6中断源自动触发ADC采样*/
AdcMskTrigUart0 = 1u<<7, /*!<选择uart0中断源自动触发ADC采样*/
AdcMskTrigUart1 = 1u<<8, /*!<选择uart1中断源自动触发ADC采样*/
AdcMskTrigLpuart0 = 1u<<9, /*!<选择lpuart0中断源自动触发ADC采样*/
AdcMskTrigLpuart1 = 1u<<10, /*!<选择lpuart1中断源自动触发ADC采样*/
AdcMskTrigVC0 = 1u<<11, /*!<选择VC0中断源自动触发ADC采样*/
AdcMskTrigVC1 = 1u<<12, /*!<选择VC1中断源自动触发ADC采样*/
AdcMskTrigRTC = 1u<<13, /*!<选择RTC中断源自动触发ADC采样*/
AdcMskTrigPCA = 1u<<14, /*!<选择PCA中断源自动触发ADC采样*/
AdcMskTrigSPI0 = 1u<<15, /*!<选择SPI0中断源自动触发ADC采样*/
AdcMskTrigSPI1 = 1u<<16, /*!<选择SPI1中断源自动触发ADC采样*/
AdcMskTrigDMA = 1u<<17, /*!<选择DMA中断源自动触发ADC采样*/
AdcMskTrigPA03 = 1u<<18, /*!<选择PA03中断源自动触发ADC采样*/
AdcMskTrigPB03 = 1u<<19, /*!<选择PB03中断源自动触发ADC采样*/
AdcMskTrigPC03 = 1u<<20, /*!<选择PC03中断源自动触发ADC采样*/
AdcMskTrigPD03 = 1u<<21, /*!<选择PD03中断源自动触发ADC采样*/
AdcMskTrigPA07 = 1u<<22, /*!<选择PA07中断源自动触发ADC采样*/
AdcMskTrigPB07 = 1u<<23, /*!<选择PB07中断源自动触发ADC采样*/
AdcMskTrigPC07 = 1u<<24, /*!<选择PC07中断源自动触发ADC采样*/
AdcMskTrigPD07 = 1u<<25, /*!<选择PD07中断源自动触发ADC采样*/
AdcMskTrigPA11 = 1u<<26, /*!<选择PA11中断源自动触发ADC采样*/
AdcMskTrigPB11 = 1u<<27, /*!<选择PB11中断源自动触发ADC采样*/
AdcMskTrigPC11 = 1u<<28, /*!<选择PC11中断源自动触发ADC采样*/
AdcMskTrigPA15 = 1u<<29, /*!<选择PA15中断源自动触发ADC采样*/
AdcMskTrigPB15 = 1u<<30, /*!<选择PB15中断源自动触发ADC采样*/
AdcMskTrigPC15 = 1u<<31, /*!<选择PC15中断源自动触发ADC采样*/
}en_adc_trig_sel_t;
/**
******************************************************************************
** \brief ADC
*****************************************************************************/
typedef enum en_adc_ext_trig_sel
{
AdcExtTrig0 = 0u, /*!<单次及顺序扫描转换 外部触发源选择寄存器*/
AdcExtTrig1 = 1u, /*!<插队扫描转换 外部触发源选择寄存器*/
}en_adc_ext_trig_sel_t;
/**
******************************************************************************
** \brief ADC
*****************************************************************************/
typedef enum en_adc_sqr_chmux
{
AdcSQRCH0MUX = 0u, /*!<顺序扫描模式转换通道0*/
AdcSQRCH1MUX = 1u, /*!<顺序扫描模式转换通道1*/
AdcSQRCH2MUX = 2u, /*!<顺序扫描模式转换通道2*/
AdcSQRCH3MUX = 3u, /*!<顺序扫描模式转换通道3*/
AdcSQRCH4MUX = 4u, /*!<顺序扫描模式转换通道4*/
AdcSQRCH5MUX = 5u, /*!<顺序扫描模式转换通道5*/
AdcSQRCH6MUX = 6u, /*!<顺序扫描模式转换通道6*/
AdcSQRCH7MUX = 7u, /*!<顺序扫描模式转换通道7*/
AdcSQRCH8MUX = 8u, /*!<顺序扫描模式转换通道8*/
AdcSQRCH9MUX = 9u, /*!<顺序扫描模式转换通道9*/
AdcSQRCH10MUX = 10u, /*!<顺序扫描模式转换通道10*/
AdcSQRCH11MUX = 11u, /*!<顺序扫描模式转换通道11*/
AdcSQRCH12MUX = 12u, /*!<顺序扫描模式转换通道12*/
AdcSQRCH13MUX = 13u, /*!<顺序扫描模式转换通道13*/
AdcSQRCH14MUX = 14u, /*!<顺序扫描模式转换通道14*/
AdcSQRCH15MUX = 15u, /*!<顺序扫描模式转换通道15*/
}en_adc_sqr_chmux_t;
/**
******************************************************************************
** \brief ADC
*****************************************************************************/
typedef enum en_adc_jqr_chmux
{
AdcJQRCH0MUX = 0u, /*!<转换通道0*/
AdcJQRCH1MUX = 1u, /*!<转换通道1*/
AdcJQRCH2MUX = 2u, /*!<转换通道2*/
AdcJQRCH3MUX = 3u, /*!<转换通道3*/
}en_adc_jqr_chmux_t;
/**
******************************************************************************
** \brief ADC
*****************************************************************************/
typedef enum en_adc_align
{
AdcAlignRight = 0u,
AdcAlignLeft = 1u,
}en_adc_align_t;
/**
******************************************************************************
** \brief ADC
*****************************************************************************/
typedef enum en_adc_result_acc
{
AdcResultAccEnable = 1u,
AdcResultAccDisable = 0u,
}en_adc_result_acc_t;
/**
******************************************************************************
** \brief ADC
*****************************************************************************/
typedef enum en_adc_irq_type
{
AdcMskIrqJqr = 1u<<5, /*!<ADC插队扫描转换完成*/
AdcMskIrqSqr = 1u<<4, /*!<ADC顺序扫描转换完成*/
AdcMskIrqReg = 1u<<3, /*!<ADC转换结果比较区间内*/
AdcMskIrqHt = 1u<<2, /*!<ADC转换结果高于HT*/
AdcMskIrqLt = 1u<<1, /*!<ADC转换结果低于LT*/
AdcMskIrqSgl = 1u<<0, /*!<ADC单次转换完成*/
}en_adc_irq_type_t;
/**
******************************************************************************
** \brief OPAADC
*****************************************************************************/
typedef enum en_adc_channel_remap_type
{
AdcMskMuxMap = 0u, /*!<ADC使用SGLMUX选择的端口通道*/
AdcMskOpaMap = 1u, /*!<ADC部分通道映射到OPA输出*/
}en_adc_channel_remap_type_t;
/******************************************************************************
** Extern type definitions ('typedef')
******************************************************************************/
/**
******************************************************************************
** \brief ADC
*****************************************************************************/
typedef struct stc_adc_cfg
{
en_adc_mode_t enAdcMode; /*! ADC转换模式*/
en_adc_clk_div_t enAdcClkDiv; /*! ADC时钟选择*/
en_adc_samp_cycle_sel_t enAdcSampCycleSel; /*! ADC采样周期选择*/
en_adc_ref_vol_sel_t enAdcRefVolSel; /*! ADC参考电压选择*/
en_adc_op_buf_t enAdcOpBuf; /*! ADC输入信号放大器控制使能*/
en_adc_in_ref_t enInRef; /*! ADC内部参考电压使能*/
en_adc_align_t enAdcAlign; /*! ADC转换结果对齐控制*/
}stc_adc_cfg_t;
/**
******************************************************************************
** \brief ADC
*****************************************************************************/
typedef struct stc_adc_sqr_cfg
{
uint8_t u8SqrCnt; /*! ADC顺序扫描转换次数*/
en_adc_result_acc_t enResultAcc; /*! ADC转换结果自动累加功能*/
boolean_t bSqrDmaTrig; /*! ADC顺序扫描转换完成DMA触发使能*/
}stc_adc_sqr_cfg_t;
/**
******************************************************************************
** \brief ADC
*****************************************************************************/
typedef struct stc_adc_jqr_cfg
{
uint8_t u8JqrCnt; /*! ADC顺序扫描转换次数*/
boolean_t bJqrDmaTrig; /*! ADC插队扫描转换完成DMA触发使能*/
}stc_adc_jqr_cfg_t;
/**
******************************************************************************
** \brief ADC
*****************************************************************************/
typedef struct stc_adc_threshold_cfg
{
boolean_t bAdcRegCmp ; /*!ADC区间使能*/
boolean_t bAdcHtCmp ; /*!ADC上超出区间使能*/
boolean_t bAdcLtCmp ; /*!ADC下超出区间使能*/
uint32_t u32AdcHighThd; /*!ADC比较上阈值*/
uint32_t u32AdcLowThd; /*!ADC比较下阈值*/
en_adc_samp_ch_sel_t enSampChSel; /*!ADC采样通道选择*/
}stc_adc_threshold_cfg_t;
/******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
//ADC 初始化
en_result_t Adc_Init(stc_adc_cfg_t* pstcAdcCfg);
//ADC 中断使能
void Adc_EnableIrq(void);
//ADC 中断禁止
void Adc_DisableIrq(void);
//ADC 中断/采样完成状态获取
boolean_t Adc_GetIrqStatus(en_adc_irq_type_t enAdcIrq);
//ADC 中断/采样完成状态清除
void Adc_ClrIrqStatus(en_adc_irq_type_t enAdcIrq);
//ADC 使能
void Adc_Enable(void);
//ADC 禁止
void Adc_Disable(void);
//ADC 顺序扫描模式配置
en_result_t Adc_SqrModeCfg(stc_adc_sqr_cfg_t* pstcAdcSqrCfg);
//ADC 插队扫描模式配置
en_result_t Adc_JqrModeCfg(stc_adc_jqr_cfg_t* pstcAdcJqrCfg);
//ADC Sgl 单次转换模式通道选择配置
en_result_t Adc_CfgSglChannel( en_adc_samp_ch_sel_t enstcAdcSampCh);
//ADC SQR 顺序扫描转换模式通道选择配置
en_result_t Adc_CfgSqrChannel(en_adc_sqr_chmux_t enstcAdcSqrChMux, en_adc_samp_ch_sel_t enstcAdcSampCh);
//ADC JQR 插队扫描转换模式通道选择配置
en_result_t Adc_CfgJqrChannel(en_adc_jqr_chmux_t enstcAdcJqrChMux, en_adc_samp_ch_sel_t enstcAdcSampCh);
///<ADC 单次转换外部触发源配置
void Adc_SglExtTrigCfg(en_adc_trig_sel_t enAdcTrigSel, boolean_t bValue);
///<ADC 顺序扫描转换外部触发源配置
void Adc_SqrExtTrigCfg(en_adc_trig_sel_t enAdcTrigSel, boolean_t bValue);
///<ADC 插队扫描转换外部触发源配置
void Adc_JqrExtTrigCfg(en_adc_trig_sel_t enAdcTrigSel, boolean_t bValue);
//ADC 阈值比较功能配置
void Adc_ThresholdCfg(stc_adc_threshold_cfg_t* pstcAdcThrCfg);
//ADC 单次转换模式启动
void Adc_SGL_Start(void);
//ADC 单次转换模式停止
void Adc_SGL_Stop(void);
//ADC 单次转换模式一直转换模式启动
void Adc_SGL_Always_Start(void);
//ADC 单次转换模式一直转换模式停止
void Adc_SGL_Always_Stop(void);
//ADC 顺序扫描转换模式启动
void Adc_SQR_Start(void);
//ADC 顺序扫描转换模式停止
void Adc_SQR_Stop(void);
//ADC 插队扫描转换模式启动
void Adc_JQR_Start(void);
//ADC 插队扫描转换模式停止
void Adc_JQR_Stop(void);
//获取单次转换采样值
uint32_t Adc_GetSglResult(void);
//获取顺序扫描采样值
uint32_t Adc_GetSqrResult(en_adc_sqr_chmux_t enstcAdcSqrChMux);
//获取插队扫描采样值
uint32_t Adc_GetJqrResult(en_adc_jqr_chmux_t enstcAdcJqrChMux);
//获取累加采样值
uint32_t Adc_GetAccResult(void);
//clear ADC 累加寄存器结果清除
void Adc_ClrAccResult(void);
///< ADC 通道重映射
void Adc_ChannelRemap(en_adc_channel_remap_type_t enChMap);
//@}
#ifdef __cplusplus
}
#endif
#endif /* __ADC_H__ */
/******************************************************************************/
/* EOF (not truncated) */
/******************************************************************************/

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@ -0,0 +1,878 @@
/*******************************************************************************
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file adt.h
**
** Headerfile for Advance Timer functions
** @link ADT Group Some description @endlink
**
** - 2018-04-19 Husj First Version
**
******************************************************************************/
#ifndef __ADT_H__
#define __ADT_H__
/******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup AdtGroup Advance Timer (ADT)
**
******************************************************************************/
//@{
/******************************************************************************
* Global type definitions
******************************************************************************/
/**
******************************************************************************
** \brief ADT CHx
*****************************************************************************/
typedef enum en_adt_CHxX_port
{
AdtCHxA = 0u, ///< CHx A通道
AdtCHxB = 1u, ///< CHx B通道
}en_adt_CHxX_port_t;
/**
******************************************************************************
** \brief ADT TRIG
*****************************************************************************/
typedef enum en_adt_trig_port
{
AdtTrigA = 0u, ///< TIMx 触发A端口
AdtTrigB = 1u, ///< TIMx 触发B端口
AdtTrigC = 2u, ///< TIMx 触发C端口
AdtTrigD = 3u, ///< TIMx 触发D端口
}en_adt_trig_port_t;
/**
******************************************************************************
** \brief ADT - Z
**
** \note
******************************************************************************/
typedef enum en_adt_gconr_zmsk
{
AdtZMaskDis = 0u, ///< Z相输入屏蔽功能无效
AdtZMask4Cyl = 1u, ///< 位置计数上溢后或下溢后的4个计数周期内的Z相输入被屏蔽
AdtZMask8Cyl = 2u, ///< 位置计数上溢后或下溢后的8个计数周期内的Z相输入被屏蔽
AdtZMask16Cyl = 3u, ///< 位置计数上溢后或下溢后的16个计数周期内的Z相输入被屏蔽
}en_adt_gconr_zmsk_t;
/**
******************************************************************************
** \brief ADT -
**
** \note
******************************************************************************/
typedef enum en_adt_cnt_ckdiv
{
AdtClkPClk0 = 0u, ///< PCLK0
AdtClkPClk0Div2 = 1u, ///< PCLK0/2
AdtClkPClk0Div4 = 2u, ///< PCLK0/4
AdtClkPClk0Div8 = 3u, ///< PCLK0/8
AdtClkPClk0Div16 = 4u, ///< PCLK0/16
AdtClkPClk0Div64 = 5u, ///< PCLK0/64
AdtClkPClk0Div256 = 6u, ///< PCLK0/256
AdtClkPClk0Div1024 = 7u, ///< PCLK0/1024
}en_adt_cnt_ckdiv_t;
/**
******************************************************************************
** \brief ADT
**
** \note
******************************************************************************/
typedef enum en_adt_cnt_mode
{
AdtSawtoothMode = 0u, ///< 锯齿波模式
AdtTriangleModeA = 4u, ///< 三角波A模式
AdtTriangleModeB = 5u, ///< 三角波B模式
}en_adt_cnt_mode_t;
/**
******************************************************************************
** \brief ADT
**
** \note
******************************************************************************/
typedef enum en_adt_cnt_dir
{
AdtCntDown = 0u, ///< 递减计数
AdtCntUp = 1u, ///< 递加计数
}en_adt_cnt_dir_t;
/**
******************************************************************************
** \brief ADT
**
** \note
******************************************************************************/
typedef enum en_adt_compare
{
AdtCompareA = 0u, ///< 通用比较基准A
AdtCompareB = 1u, ///< 通用比较基准B
AdtCompareC = 2u, ///< 通用比较基准C
AdtCompareD = 3u, ///< 通用比较基准D
}en_adt_compare_t;
/**
******************************************************************************
** \brief ADT
**
** \note
******************************************************************************/
typedef enum en_adt_special_compare
{
AdtSpclCompA = 0u, ///< 专用比较基准A
AdtSpclCompB = 1u, ///< 专用比较基准B
}en_adt_special_compare_t;
/**
******************************************************************************
** \brief ADT - TIMx
**
** \note
******************************************************************************/
typedef enum en_adt_pconr_disval
{
AdtTIMxDisValNorm = 0u, ///< 强制输出无效条件0~3中被选择的条件成立时CHx端口正常输出
AdtTIMxDisValHiZ = 1u, ///< 强制输出无效条件0~3中被选择的条件成立时CHx端口输出高阻态
AdtTIMxDisValLow = 2u, ///< 强制输出无效条件0~3中被选择的条件成立时CHx端口输出低电平
AdtTIMxDisValHigh = 3u, ///< 强制输出无效条件0~3中被选择的条件成立时CHx端口输出高电平
}en_adt_pconr_disval_t;
/**
******************************************************************************
** \brief ADT - CHx
**
** \note
******************************************************************************/
typedef enum en_adt_pconr_dissel
{
AdtCHxDisSel0 = 0u, ///< 选择强制输出无效条件0
AdtCHxDisSel1 = 1u, ///< 选择强制输出无效条件1
AdtCHxDisSel2 = 2u, ///< 选择强制输出无效条件2
AdtCHxDisSel3 = 3u, ///< 选择强制输出无效条件3
}en_adt_pconr_dissel_t;
/**
******************************************************************************
** \brief ADT - CHx
**
** \note
******************************************************************************/
typedef enum en_adt_pconr_perc
{
AdtCHxPeriodLow = 0u, ///< 计数器计数值与周期值相等时CHx端口输出保持为低电平
AdtCHxPeriodHigh = 1u, ///< 计数器计数值与周期值相等时CHx端口输出设定为高电平
AdtCHxPeriodKeep = 2u, ///< 计数器计数值与周期值相等时CHx端口输出设定为先前状态
AdtCHxPeriodInv = 3u, ///< 计数器计数值与周期值相等时CHx端口输出设定为反转电平
}en_adt_pconr_perc_t;
/**
******************************************************************************
** \brief ADT - CHx
**
** \note
******************************************************************************/
typedef enum en_adt_pconr_cmpc
{
AdtCHxCompareLow = 0u, ///< 计数器计数值与GCMxR相等时CHx端口输出保持为低电平
AdtCHxCompareHigh = 1u, ///< 计数器计数值与GCMxR相等时CHx端口输出设定为高电平
AdtCHxCompareKeep = 2u, ///< 计数器计数值与GCMxR相等时CHx端口输出设定为先前状态
AdtCHxCompareInv = 3u, ///< 计数器计数值与GCMxR相等时CHx端口输出设定为反转电平
}en_adt_pconr_cmpc_t;
/**
******************************************************************************
** \brief ADT - CHx
**
** \note
******************************************************************************/
typedef enum en_adt_pconr_port_out
{
AdtCHxPortOutLow = 0u, ///< CHx端口输出设定为低电平
AdtCHxPortOutHigh = 1u, ///< CHx端口输出设定为高电平
}en_adt_pconr_port_out_t;
/**
******************************************************************************
** \brief ADT - CHx
**
** \note
******************************************************************************/
typedef enum en_adt_pconr_capc
{
AdtCHxCompareOutput = 0u, ///< CHx端口设定为比较输出功能
AdtCHxCompareInput = 1u, ///< CHx端口设定为捕获输入功能
}en_adt_pconr_capc_t;
/**
******************************************************************************
** \brief ADT - CHx
**
** \note
******************************************************************************/
typedef enum en_adt_pconr_stastps
{
AdtCHxStateSelSS = 0u, ///< 计数开始或停止时CHx端口输出由STACB、STPCB决定
AdtCHxStateSelKeep = 1u, ///< 计数开始或停止时CHx端口输出设定为先前状态
}en_adt_pconr_stastps_t;
/**
******************************************************************************
** \brief ADT - CHx
**
** \note
******************************************************************************/
typedef enum en_adt_dconr_sepa
{
AdtCHxDtSeperate = 0u, ///< DTUAR和DTDAR分别设定
AdtCHxDtEqual = 1u, ///< DTDAR的值和DTUAR的值自动相等
}en_adt_dconr_sepa_t;
/**
******************************************************************************
** \brief ADT - TRIx/TIMxIx
**
** \note
******************************************************************************/
typedef enum en_adt_fconr_nofick
{
AdtFltClkPclk0 = 0u, ///< PCLK0
AdtFltClkPclk0Div4 = 1u, ///< PCLK0/4
AdtFltClkPclk0Div16 = 2u, ///< PCLK0/16
AdtFltClkPclk0Div64 = 3u, ///< PCLK0/64
}en_adt_fconr_nofick_t;
/**
******************************************************************************
** \brief ADT - TIMx
**
** \note
******************************************************************************/
typedef enum en_adt_vperr_pcnts
{
AdtPeriodCnts0 = 0u, ///< 有效周期选择功能无效
AdtPeriodCnts1 = 1u, ///< 每隔1个周期有效一次
AdtPeriodCnts2 = 2u, ///< 每隔2个周期有效一次
AdtPeriodCnts3 = 3u, ///< 每隔3个周期有效一次
AdtPeriodCnts4 = 4u, ///< 每隔4个周期有效一次
AdtPeriodCnts5 = 5u, ///< 每隔5个周期有效一次
AdtPeriodCnts6 = 6u, ///< 每隔6个周期有效一次
AdtPeriodCnts7 = 7u, ///< 每隔7个周期有效一次
}en_adt_vperr_pcnts_t;
/**
******************************************************************************
** \brief ADT -
**
** \note
******************************************************************************/
typedef enum en_adt_vperr_pcnte
{
AdtPeriodCnteDisable = 0u, ///< 有效周期选择功能无效
AdtPeriodCnteMin = 1u, ///< 锯齿波计数上、下溢点或三角波波谷做为计数条件
AdtPeriodCnteMax = 2u, ///< 锯齿波计数上、下溢点或三角波波峰做为计数条件
AdtPeriodCnteBoth = 3u, ///< 锯齿波计数上、下溢点或三角波波峰,波谷做为计数条件
}en_adt_vperr_pcnte_t;
/**
******************************************************************************
** \brief ADT -
**
** \note
******************************************************************************/
typedef enum en_adt_ttrig_trigxs
{
AdtTrigxSelPA3 = 0u, ///< PA3
AdtTrigxSelPB3 = 1u, ///< PB3
AdtTrigxSelPC3 = 2u, ///< PC3
AdtTrigxSelPD3 = 3u, ///< PD3
AdtTrigxSelPA7 = 4u, ///< PA7
AdtTrigxSelPB7 = 5u, ///< PB7
AdtTrigxSelPC7 = 6u, ///< PC7
AdtTrigxSelPD7 = 7u, ///< PD7
AdtTrigxSelPA11 = 8u, ///< PA11
AdtTrigxSelPB11 = 9u, ///< PB11
AdtTrigxSelPC11 = 10u, ///< PC11
AdtTrigxSelPD1 = 11u, ///< PD1
AdtTrigxSelPA15 = 12u, ///< PA15
AdtTrigxSelPB15 = 13u, ///< PB15
AdtTrigxSelPC5 = 14u, ///< PC5
AdtTrigxSelPD5 = 15u, ///< PD5
}en_adt_ttrig_trigxs_t;
/**
******************************************************************************
** \brief ADT AOS - AOSx
**
** \note
******************************************************************************/
typedef enum en_adt_itrig_iaosxs
{
AdtAosxTrigSelTim0Int = 0u, ///< TIM0_INT
AdtAosxTrigSelTim1Int = 1u, ///< TIM1_INT
AdtAosxTrigSelTim2Int = 2u, ///< TIM2_INT
AdtAosxTrigSelLpTimInt = 3u, ///< LPTIMER_INT
AdtAosxTrigSelTim4Int = 4u, ///< TIM4_INT
AdtAosxTrigSelTim5Int = 5u, ///< TIM5_INT
AdtAosxTrigSelTim6Int = 6u, ///< TIM6_INT
AdtAosxTrigSelUart0Int = 7u, ///< UART0_INT
AdtAosxTrigSelUart1Int = 8u, ///< UART1_INT
AdtAosxTrigSelLpUartInt = 9u, ///< LPUART_INT
AdtAosxTrigSelVc0Int = 10u, ///< VC0_INT
AdtAosxTrigSelVc1Int = 11u, ///< VC1_INT
AdtAosxTrigSelRtcInt = 12u, ///< RTC_INT
AdtAosxTrigSelPcaInt = 13u, ///< PCA_INT
AdtAosxTrigSelSpiInt = 14u, ///< SPI_INT
AdtAosxTrigSelAdcInt = 15u, ///< ADC_INT
}en_adt_itrig_iaosxs_t;
/**
******************************************************************************
** \brief ADT(///)
**
** \note
******************************************************************************/
typedef enum en_adt_hw_trig
{
AdtHwTrigAos0 = 0u, ///< 从AOS来的事件触发0有效
AdtHwTrigAos1 = 1u, ///< 从AOS来的事件触发1有效
AdtHwTrigAos2 = 2u, ///< 从AOS来的事件触发2有效
AdtHwTrigAos3 = 3u, ///< 从AOS来的事件触发3有效
AdtHwTrigCHxARise = 4u, ///< CHxA端口上采样到上升沿
AdtHwTrigCHxAFall = 5u, ///< CHxA端口上采样到下降沿
AdtHwTrigCHxBRise = 6u, ///< CHxB端口上采样到上升沿
AdtHwTrigCHxBFall = 7u, ///< CHxB端口上采样到下降沿
AdtHwTrigTimTriARise = 8u, ///< TIMTRIA端口上采样到上升沿
AdtHwTrigTimTriAFall = 9u, ///< TIMTRIA端口上采样到下降沿
AdtHwTrigTimTriBRise = 10u, ///< TIMTRIB端口上采样到上升沿
AdtHwTrigTimTriBFall = 11u, ///< TIMTRIB端口上采样到下降沿
AdtHwTrigTimTriCRise = 12u, ///< TIMTRIC端口上采样到上升沿
AdtHwTrigTimTriCFall = 13u, ///< TIMTRIC端口上采样到下降沿
AdtHwTrigTimTriDRise = 14u, ///< TIMTRID端口上采样到上升沿
AdtHwTrigTimTriDFall = 15u, ///< TIMTRID端口上采样到下降沿
AdtHwTrigEnd = 16u,
}en_adt_hw_trig_t;
/**
******************************************************************************
** \brief ADT(/)
**
** \note
******************************************************************************/
typedef enum en_adt_hw_cnt
{
AdtHwCntCHxALowCHxBRise = 0u, ///< CHxA端口为低电平时CHxB端口上采样到上升沿
AdtHwCntCHxALowCHxBFall = 1u, ///< CHxA端口为低电平时CHxB端口上采样到下降沿
AdtHwCntCHxAHighCHxBRise = 2u, ///< CHxA端口为高电平时CHxB端口上采样到上升沿
AdtHwCntCHxAHighCHxBFall = 3u, ///< CHxA端口为高电平时CHxB端口上采样到下降沿
AdtHwCntCHxBLowCHxARise = 4u, ///< CHxB端口为低电平时CHxA端口上采样到上升沿
AdtHwCntCHxBLowCHxAFall = 5u, ///< CHxB端口为低电平时CHxA端口上采样到下降沿
AdtHwCntCHxBHighChxARise = 6u, ///< CHxB端口为高电平时CHxA端口上采样到上升沿
AdtHwCntCHxBHighCHxAFall = 7u, ///< CHxB端口为高电平时CHxA端口上采样到下降沿
AdtHwCntTimTriARise = 8u, ///< TIMTRIA端口上采样到上升沿
AdtHwCntTimTriAFall = 9u, ///< TIMTRIA端口上采样到下降沿
AdtHwCntTimTriBRise = 10u, ///< TIMTRIB端口上采样到上升沿
AdtHwCntTimTriBFall = 11u, ///< TIMTRIB端口上采样到下降沿
AdtHwCntTimTriCRise = 12u, ///< TIMTRIC端口上采样到上升沿
AdtHwCntTimTriCFall = 13u, ///< TIMTRIC端口上采样到下降沿
AdtHwCntTimTriDRise = 14u, ///< TIMTRID端口上采样到上升沿
AdtHwCntTimTriDFall = 15u, ///< TIMTRID端口上采样到下降沿
AdtHwCntAos0 = 16u, ///< 从AOS来的事件触发0有效
AdtHwCntAos1 = 17u, ///< 从AOS来的事件触发1有效
AdtHwCntAos2 = 18u, ///< 从AOS来的事件触发2有效
AdtHwCntAos3 = 19u, ///< 从AOS来的事件触发3有效
AdtHwCntMax = 20u,
}en_adt_hw_cnt_t;
/**
******************************************************************************
** \brief ADT
**
** \note
******************************************************************************/
typedef enum en_adt_ptbrk_polarity
{
AdtPtBrkHigh = 0u, ///< 端口刹车极性高电平有效
AdtPtBrkLow = 1u, ///< 端口刹车极性低电平有效
}en_adt_ptbrk_polarity_t;
/**
******************************************************************************
** \brief ADT PWM
**
** \note
******************************************************************************/
typedef enum en_adt_pwm_dither_type
{
AdtPwmDitherUnderFlow = 0u, ///< PWM展频计数下溢出
AdtPwmDitherOverFlow = 1u, ///< PWM展频计数上溢出
}en_adt_pwm_dither_type_t;
/**
******************************************************************************
** \brief ADT
**
** \note
******************************************************************************/
typedef enum en_adt_irq_type
{
AdtCMAIrq = 0u, ///< 计数匹配A或捕获输入中断
AdtCMBIrq = 1u, ///< 计数匹配B或捕获输入中断
AdtCMCIrq = 2u, ///< 计数匹配C中断
AdtCMDIrq = 3u, ///< 计数匹配D中断
AdtOVFIrq = 6u, ///< 上溢匹配中断
AdtUDFIrq = 7u, ///< 下溢匹配中断
AdtDTEIrq = 8u, ///< 死区时间错误中断
AdtSAMLIrq = 14u, ///< 同低中断
AdtSAMHIrq = 15u, ///< 同高中断
}en_adt_irq_type_t;
typedef enum en_adt_state_type
{
AdtCMAF = 0, ///< 计数匹配A标志
AdtCMBF = 1, ///< 计数匹配B标志
AdtCMCF = 2, ///< 计数匹配C标志
AdtCMDF = 3, ///< 计数匹配D标志
AdtOVFF = 6, ///< 上溢匹配标志
AdtUDFF = 7, ///< 下溢匹配标志
AdtDTEF = 8, ///< 死区时间错误标志
AdtCMSAUF = 9, ///< 向上计数专用比较基准值匹配A标志
AdtCMSADF = 10, ///< 向下计数专用比较基准值匹配B标志
AdtCMSBUF = 11, ///< 向上计数专用比较基准值匹配A标志
AdtCMSBDF = 12, ///< 向下计数专用比较基准值匹配B标志
AdtCntDir = 31, ///< 计数方向
}en_adt_state_type_t;
/**
******************************************************************************
** \brief ADT
** \note
******************************************************************************/
typedef struct stc_adt_sw_sync
{
boolean_t bAdTim4; ///< Timer 4
boolean_t bAdTim5; ///< Timer 5
boolean_t bAdTim6; ///< Timer 6
}stc_adt_sw_sync_t;
/**
******************************************************************************
** \brief ADT AOS
** \note
******************************************************************************/
typedef struct stc_adt_aos_trig_cfg
{
en_adt_itrig_iaosxs_t enAos0TrigSrc; ///< AOS0触发源选择
en_adt_itrig_iaosxs_t enAos1TrigSrc; ///< AOS1触发源选择
en_adt_itrig_iaosxs_t enAos2TrigSrc; ///< AOS2触发源选择
en_adt_itrig_iaosxs_t enAos3TrigSrc; ///< AOS3触发源选择
}stc_adt_aos_trig_cfg_t;
/**
******************************************************************************
** \brief ADT
** \note
******************************************************************************/
typedef struct stc_adt_irq_trig_cfg
{
boolean_t bAdtSpecilMatchBTrigDmaEn; ///< 专用比较基准值匹配B使能触发DMA
boolean_t bAdtSpecilMatchATrigDmaEn; ///< 专用比较基准值匹配A使能触发DMA
boolean_t bAdtUnderFlowTrigDmaEn; ///< 下溢匹配使能触发DMA
boolean_t bAdtOverFlowTrigDmaEn; ///< 上溢匹配使能触发DMA
boolean_t bAdtCntMatchDTrigDmaEn; ///< 计数匹配D使能触发DMA
boolean_t bAdtCntMatchCTrigDmaEn; ///< 计数匹配C使能触发DMA
boolean_t bAdtCntMatchBTrigDmaEn; ///< 计数匹配B使能触发DMA
boolean_t bAdtCntMatchATrigDmaEn; ///< 计数匹配A使能触发DMA
boolean_t bAdtSpecilMatchBTrigEn; ///< 专用比较基准值匹配B使能触发ADC
boolean_t bAdtSpecilMatchATrigEn; ///< 专用比较基准值匹配A使能触发ADC
boolean_t bAdtUnderFlowTrigEn; ///< 下溢匹配使能触发ADC
boolean_t bAdtOverFlowTrigEn; ///< 上溢匹配使能触发ADC
boolean_t bAdtCntMatchDTrigEn; ///< 计数匹配D使能触发ADC
boolean_t bAdtCntMatchCTrigEn; ///< 计数匹配C使能触发ADC
boolean_t bAdtCntMatchBTrigEn; ///< 计数匹配B使能触发ADC
boolean_t bAdtCntMatchATrigEn; ///< 计数匹配A使能触发ADC
}stc_adt_irq_trig_cfg_t;
/**
******************************************************************************
** \brief ADT Trig
** \note
******************************************************************************/
typedef struct stc_adt_port_trig_cfg
{
en_adt_ttrig_trigxs_t enTrigSrc; ///< 触发源选择
boolean_t bFltEn; ///< 触发源捕获输入滤波使能
en_adt_fconr_nofick_t enFltClk; ///< 滤波采样基准时钟
}stc_adt_port_trig_cfg_t;
/**
******************************************************************************
** \brief ADT Z
** \note
******************************************************************************/
typedef struct stc_adt_zmask_cfg
{
en_adt_gconr_zmsk_t enZMaskCycle; ///< Z相输入屏蔽计数周期选择
boolean_t bFltPosCntMaksEn; ///< Z相输入时的屏蔽周期内位置计数器的清零功能不屏蔽FALSE或屏蔽(TRUE)
boolean_t bFltRevCntMaksEn; ///< Z相输入时的屏蔽周期内公转计数器的计数功能不屏蔽FALSE或屏蔽(TRUE)
}stc_adt_zmask_cfg_t;
/**
******************************************************************************
** \brief ADT TIMxX
** \note
******************************************************************************/
typedef struct stc_adt_TIMxX_port_cfg
{
en_adt_pconr_capc_t enCap; ///< 端口功能模式
boolean_t bOutEn; ///< 输出使能
en_adt_pconr_perc_t enPerc; ///< 周期值匹配时端口状态
en_adt_pconr_cmpc_t enCmpc; ///< 比较值匹配时端口状态
en_adt_pconr_stastps_t enStaStp; ///< 计数开始停止端口状态选择
en_adt_pconr_port_out_t enStaOut; ///< 计数开始端口输出状态
en_adt_pconr_port_out_t enStpOut; ///< 计数停止端口输出状态
en_adt_pconr_disval_t enDisVal; ///< 强制输出无效时输出状态控制
en_adt_pconr_dissel_t enDisSel; ///< 强制输出无效条件选择
boolean_t bFltEn; ///< 端口捕获输入滤波使能
en_adt_fconr_nofick_t enFltClk; ///< 端口滤波采样基准时钟
}stc_adt_CHxX_port_cfg_t;
/**
******************************************************************************
** \brief ADT
** \note
******************************************************************************/
typedef struct stc_adt_break_port_cfg
{
boolean_t bPortEn; ///< 端口使能
en_adt_ptbrk_polarity_t enPol; ///< 极性选择
}stc_adt_break_port_cfg_t;
/**
******************************************************************************
** \brief ADT3
** \note
******************************************************************************/
typedef struct stc_adt_disable_3_cfg
{
stc_adt_break_port_cfg_t stcBrkPtCfg[16]; ///< 刹车端口配置
boolean_t bFltEn; ///< 刹车端口滤波使能
en_adt_fconr_nofick_t enFltClk; ///< 滤波采样基准时钟
}stc_adt_disable_3_cfg_t;
/**
******************************************************************************
** \brief ADT1
** \note
******************************************************************************/
typedef struct stc_adt_disable_1_cfg
{
boolean_t bTim6OutSH; ///< TIM6输出同高
boolean_t bTim5OutSH; ///< TIM5输出同高
boolean_t bTim4OutSH; ///< TIM4输出同高
boolean_t bTim6OutSL; ///< TIM6输出同低
boolean_t bTim5OutSL; ///< TIM5输出同低
boolean_t bTim4OutSL; ///< TIM4输出同低
}stc_adt_disable_1_cfg_t;
/**
******************************************************************************
** \brief ADT PWM
** \note
******************************************************************************/
typedef struct stc_adt_pwm_dither_cfg
{
en_adt_pwm_dither_type_t enAdtPDType; ///< PWM展频计数选择
boolean_t bTimxBPDEn; ///< PWM通道B展频使能
boolean_t bTimxAPDEn; ///< PWM通道A展频使能
}stc_adt_pwm_dither_cfg_t;
/**
******************************************************************************
** \brief ADT
** \note
******************************************************************************/
typedef struct stc_adt_basecnt_cfg
{
en_adt_cnt_mode_t enCntMode; ///< 计数模式
en_adt_cnt_dir_t enCntDir; ///< 计数方向
en_adt_cnt_ckdiv_t enCntClkDiv; ///< 计数时钟选择
}stc_adt_basecnt_cfg_t;
/**
******************************************************************************
** \brief ADT
** \note
******************************************************************************/
typedef struct stc_adt_cntstate_cfg
{
uint16_t u16Counter; ///< 当前计数器的计数值
boolean_t enCntDir; ///< 计数方向
uint8_t u8ValidPeriod; ///< 有效周期计数
boolean_t bCMSBDF; ///< 向下计数专用比较基准值匹配B标志
boolean_t bCMSBUF; ///< 向上计数专用比较基准值匹配A标志
boolean_t bCMSADF; ///< 向下计数专用比较基准值匹配B标志
boolean_t bCMSAUF; ///< 向上计数专用比较基准值匹配A标志
boolean_t bDTEF; ///< 死区时间错误标志
boolean_t bUDFF; ///< 下溢匹配标志
boolean_t bOVFF; ///< 上溢匹配标志
boolean_t bCMDF; ///< 计数匹配D标志
boolean_t bCMCF; ///< 计数匹配C标志
boolean_t bCMBF; ///< 计数匹配B标志
boolean_t bCMAF; ///< 计数匹配A标志
}stc_adt_cntstate_cfg_t;
/**
******************************************************************************
** \brief ADT
** \note
******************************************************************************/
typedef struct stc_adt_validper_cfg
{
en_adt_vperr_pcnts_t enValidCnt; ///< 有效周期选择
en_adt_vperr_pcnte_t enValidCdt; ///< 有效周期计数条件
boolean_t bPeriodD; ///< 通用信号有效周期选择D
boolean_t bPeriodC; ///< 通用信号有效周期选择C
boolean_t bPeriodB; ///< 通用信号有效周期选择B
boolean_t bPeriodA; ///< 通用信号有效周期选择A
}stc_adt_validper_cfg_t;
/******************************************************************************
* Global definitions
******************************************************************************/
/******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
//配置硬件递加事件
en_result_t Adt_CfgHwCntUp(M0P_ADTIM_TypeDef *ADTx, en_adt_hw_cnt_t enAdtHwCntUp);
//清除硬件递加事件
en_result_t Adt_ClearHwCntUp(M0P_ADTIM_TypeDef *ADTx);
//配置硬件递减事件
en_result_t Adt_CfgHwCntDwn(M0P_ADTIM_TypeDef *ADTx, en_adt_hw_cnt_t enAdtHwCntDwn);
//清除硬件递减事件
en_result_t Adt_ClearHwCntDwn(M0P_ADTIM_TypeDef *ADTx);
//配置硬件启动事件
en_result_t Adt_CfgHwStart(M0P_ADTIM_TypeDef *ADTx, en_adt_hw_trig_t enAdtHwStart);
//清除硬件启动事件
en_result_t Adt_ClearHwStart(M0P_ADTIM_TypeDef *ADTx);
//使能硬件启动事件
en_result_t Adt_EnableHwStart(M0P_ADTIM_TypeDef *ADTx);
//禁止硬件启动事件
en_result_t Adt_DisableHwStart(M0P_ADTIM_TypeDef *ADTx);
//配置硬件停止事件
en_result_t Adt_CfgHwStop(M0P_ADTIM_TypeDef *ADTx, en_adt_hw_trig_t enAdtHwStop);
//清除硬件停止事件
en_result_t Adt_ClearHwStop(M0P_ADTIM_TypeDef *ADTx);
//使能硬件停止事件
en_result_t Adt_EnableHwStop(M0P_ADTIM_TypeDef *ADTx);
//禁止硬件停止事件
en_result_t Adt_DisableHwStop(M0P_ADTIM_TypeDef *ADTx);
//配置硬件清零事件
en_result_t Adt_CfgHwClear(M0P_ADTIM_TypeDef *ADTx, en_adt_hw_trig_t enAdtHwClear);
//清除硬件清零事件
en_result_t Adt_ClearHwClear(M0P_ADTIM_TypeDef *ADTx);
//使能硬件清零事件
en_result_t Adt_EnableHwClear(M0P_ADTIM_TypeDef *ADTx);
//禁止硬件清零事件
en_result_t Adt_DisableHwClear(M0P_ADTIM_TypeDef *ADTx);
//配置A通道硬件捕获事件
en_result_t Adt_CfgHwCaptureA(M0P_ADTIM_TypeDef *ADTx, en_adt_hw_trig_t enAdtHwCaptureA);
//清除A通道硬件捕获事件
en_result_t Adt_ClearHwCaptureA(M0P_ADTIM_TypeDef *ADTx);
//配置B通道硬件捕获事件
en_result_t Adt_CfgHwCaptureB(M0P_ADTIM_TypeDef *ADTx, en_adt_hw_trig_t enAdtHwCaptureB);
//清除B通道硬件捕获事件
en_result_t Adt_ClearHwCaptureB(M0P_ADTIM_TypeDef *ADTx);
//软件同步启动
en_result_t Adt_SwSyncStart(stc_adt_sw_sync_t* pstcAdtSwSyncStart);
//软件同步停止
en_result_t Adt_SwSyncStop(stc_adt_sw_sync_t* pstcAdtSwSyncStop);
//软件同步清零
en_result_t Adt_SwSyncClear(stc_adt_sw_sync_t* pstcAdtSwSyncClear);
//获取软件同步状态
en_result_t Adt_GetSwSyncState(stc_adt_sw_sync_t* pstcAdtSwSyncState);
//AOS触发配置
en_result_t Adt_AosTrigCfg(stc_adt_aos_trig_cfg_t* pstcAdtAosTrigCfg);
//中断触发配置
en_result_t Adt_IrqTrigCfg(M0P_ADTIM_TypeDef *ADTx,
stc_adt_irq_trig_cfg_t* pstcAdtIrqTrigCfg);
//端口触发配置
en_result_t Adt_PortTrigCfg(en_adt_trig_port_t enAdtTrigPort,
stc_adt_port_trig_cfg_t* pstcAdtPortTrigCfg);
//CHxX端口配置
en_result_t Adt_CHxXPortCfg(M0P_ADTIM_TypeDef *ADTx,
en_adt_CHxX_port_t enAdtCHxXPort,
stc_adt_CHxX_port_cfg_t* pstcAdtCHxXCfg);
//使能端口刹车
en_result_t Adt_EnableBrakePort(uint8_t port, stc_adt_break_port_cfg_t* pstcAdtBrkPtCfg);
//清除端口刹车
void Adt_ClearBrakePort(void);
//无效条件3配置(端口刹车)
en_result_t Adt_Disable3Cfg(stc_adt_disable_3_cfg_t* pstcAdtDisable3);
//软件刹车 Enable/Disable(仅适用于无效条件3使能的情况下)
en_result_t Adt_SwBrake(boolean_t bSwBrk);
//获取端口刹车标志
boolean_t Adt_GetPortBrakeFlag(void);
//清除端口刹车标志
void Adt_ClearPortBrakeFlag(void);
//无效条件1配置(同高同低刹车)
en_result_t Adt_Disable1Cfg(stc_adt_disable_1_cfg_t* pstcAdtDisable1);
//获取同高同低刹车标志
boolean_t Adt_GetSameBrakeFlag(void);
//清除同高同低刹车标志
void Adt_ClearSameBrakeFlag(void);
//PWM展频配置
en_result_t Adt_PwmDitherCfg(M0P_ADTIM_TypeDef *ADTx, stc_adt_pwm_dither_cfg_t* pstcAdtPwmDitherCfg);
//AdvTimer初始化
en_result_t Adt_Init(M0P_ADTIM_TypeDef *ADTx, stc_adt_basecnt_cfg_t* pstcAdtBaseCntCfg);
//AdvTimer去初始化
en_result_t Adt_DeInit(M0P_ADTIM_TypeDef *ADTx);
//AdvTimert启动
en_result_t Adt_StartCount(M0P_ADTIM_TypeDef *ADTx);
//AdvTimert停止
en_result_t Adt_StopCount(M0P_ADTIM_TypeDef *ADTx);
//设置计数值
en_result_t Adt_SetCount(M0P_ADTIM_TypeDef *ADTx, uint16_t u16Value);
//获取计数值
uint16_t Adt_GetCount(M0P_ADTIM_TypeDef *ADTx);
//清除计数值
en_result_t Adt_ClearCount(M0P_ADTIM_TypeDef *ADTx);
//获取有效周期计数值
uint8_t Adt_GetVperNum(M0P_ADTIM_TypeDef *ADTx);
//获取状态标志
boolean_t Adt_GetState(M0P_ADTIM_TypeDef *ADTx, en_adt_state_type_t enstate);
//配置计数周期
en_result_t Adt_SetPeriod(M0P_ADTIM_TypeDef *ADTx, uint16_t u16Period);
//配置计数周期缓冲
en_result_t Adt_SetPeriodBuf(M0P_ADTIM_TypeDef *ADTx, uint16_t u16PeriodBuf);
//清除计数周期缓冲
en_result_t Adt_ClearPeriodBuf(M0P_ADTIM_TypeDef *ADTx);
//配置有效计数周期
en_result_t Adt_SetValidPeriod(M0P_ADTIM_TypeDef *ADTx,
stc_adt_validper_cfg_t* pstcAdtValidPerCfg);
//配置比较输出计数基准值
en_result_t Adt_SetCompareValue(M0P_ADTIM_TypeDef *ADTx,
en_adt_compare_t enAdtCompare,
uint16_t u16Compare);
//配置通用比较值/捕获值的缓存传送
en_result_t Adt_EnableValueBuf(M0P_ADTIM_TypeDef *ADTx,
en_adt_CHxX_port_t enAdtCHxXPort,
boolean_t bCompareBufEn);
//清除比较输出计数值/捕获值缓存
en_result_t Adt_ClearValueBuf(M0P_ADTIM_TypeDef *ADTx,
en_adt_CHxX_port_t enAdtCHxXPort);
//获取捕获值
en_result_t Adt_GetCaptureValue(M0P_ADTIM_TypeDef *ADTx,
en_adt_CHxX_port_t enAdtCHxXPort,
uint16_t* pu16Capture);
//获取捕获缓存值
en_result_t Adt_GetCaptureBuf(M0P_ADTIM_TypeDef *ADTx,
en_adt_CHxX_port_t enAdtCHxXPort,
uint16_t* pu16CaptureBuf);
//设置死区时间上基准值
en_result_t Adt_SetDTUA(M0P_ADTIM_TypeDef *ADTx,
uint16_t u16Value);
//设置死区时间下基准值
en_result_t Adt_SetDTDA(M0P_ADTIM_TypeDef *ADTx,
uint16_t u16Value);
//配置死区时间功能
en_result_t Adt_CfgDT(M0P_ADTIM_TypeDef *ADTx,
boolean_t bDTEn,
boolean_t bEqual);
//配置中断
en_result_t Adt_CfgIrq(M0P_ADTIM_TypeDef *ADTx,
en_adt_irq_type_t enAdtIrq,
boolean_t bEn);
//获取中断标志
boolean_t Adt_GetIrqFlag(M0P_ADTIM_TypeDef *ADTx,
en_adt_irq_type_t enAdtIrq);
//清除中断标志
en_result_t Adt_ClearIrqFlag(M0P_ADTIM_TypeDef *ADTx,
en_adt_irq_type_t enAdtIrq);
//清除所有中断标志
en_result_t Adt_ClearAllIrqFlag(M0P_ADTIM_TypeDef *ADTx);
//Z相输入屏蔽设置
en_result_t Adt_CfgZMask(M0P_ADTIM_TypeDef *ADTx,
stc_adt_zmask_cfg_t* pstcAdtZMaskCfg);
//@} // ADT Group
#ifdef __cplusplus
}
#endif
#endif /* __ADT_H__ */
/******************************************************************************
* EOF (not truncated)
******************************************************************************/

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@ -0,0 +1,132 @@
/******************************************************************************
* Copyright (C) 2016, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file aes.h
**
** AES API.
**
** - 2016-05-04 LuX V1.0.
**
******************************************************************************/
#ifndef __AES_H__
#define __AES_H__
/******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup AESGroup AES
**
******************************************************************************/
//@{
/******************************************************************************
* Global type definitions
******************************************************************************/
/**
*******************************************************************************
** \brief AES
** \note
******************************************************************************/
typedef enum en_aes_key_type
{
AesKey128 = 0u, ///< 128 bits
AesKey192 = 1u, ///< 192 bits
AesKey256 = 2u, ///< 256 bits
}en_aes_key_type_t;
/**
*******************************************************************************
** \brief AES
** \note
******************************************************************************/
typedef struct
{
uint32_t* pu32Cipher; ///< AES 密文指针
uint32_t* pu32Plaintext; ///< AES 明文指针
uint32_t* pu32Key; ///< AES 密钥指针
en_aes_key_type_t enKeyLen; ///< AES 密钥长度类型
}stc_aes_cfg_t;
/******************************************************************************
* Global definitions
******************************************************************************/
/******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
//AES 加密
en_result_t AES_Encrypt(stc_aes_cfg_t* pstcAesCfg);
//AES 解密
en_result_t AES_Decrypt(stc_aes_cfg_t* pstcAesCfg);
//@} // AES Group
#ifdef __cplusplus
}
#endif
#endif /* __AES_H__ */
/******************************************************************************
* EOF (not truncated)
******************************************************************************/

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@ -0,0 +1,109 @@
/******************************************************************************
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file bgr.h
**
** BGR API.
**
** - 2018-04-21 LuX V1.0.
**
******************************************************************************/
#ifndef __CRC_H__
#define __CRC_H__
/******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup BGR
**
******************************************************************************/
//@{
/******************************************************************************
* Global type definitions
******************************************************************************/
/******************************************************************************
* Global definitions
******************************************************************************/
/******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
///<内部温度传感器使能/关闭
void Bgr_TempSensorEnable(void);
void Bgr_TempSensorDisable(void);
///<BGR使能/关闭
void Bgr_BgrEnable(void);
void Bgr_BgrDisable(void);
//@} // BGR Group
#ifdef __cplusplus
}
#endif
#endif /* __BGR_H__ */
/******************************************************************************
* EOF (not truncated)
******************************************************************************/

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@ -0,0 +1,771 @@
/*******************************************************************************
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file bt.h
**
** API
** @link BT Group Some description @endlink
**
** History:
** - 2018-04-18 Husj First Version
**
*****************************************************************************/
#ifndef __BT_H__
#define __BT_H__
/*****************************************************************************
* Include files
*****************************************************************************/
#include "ddl.h"
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup BtGroup Base Timer (BT)
**
******************************************************************************/
//@{
/******************************************************************************/
/* Global pre-processor symbols/macros ('#define') */
/******************************************************************************/
/******************************************************************************
* Global type definitions
******************************************************************************/
/**
******************************************************************************
** \brief
*****************************************************************************/
typedef enum en_bt_unit
{
TIM0 = 0u, ///< Timer 0
TIM1 = 1u, ///< Timer 1
TIM2 = 2u, ///< Timer 2
}en_bt_unit_t;
/**
******************************************************************************
** \brief (MODE)(0/1/23)
*****************************************************************************/
typedef enum en_bt_work_mode
{
BtWorkMode0 = 0u, ///< 定时器模式
BtWorkMode1 = 1u, ///< PWC模式
BtWorkMode2 = 2u, ///< 锯齿波模式
BtWorkMode3 = 3u, ///< 三角波模式
}en_bt_work_mode_t;
/**
******************************************************************************
** \brief (GATE_P)(0)
*****************************************************************************/
typedef enum en_bt_m0_gatep
{
BtGatePositive = 0u, ///< 高电平有效
BtGateOpposite = 1u, ///< 低电平有效
}en_bt_m0_gatep_t;
/**
******************************************************************************
** \brief TIM (PRS)(0/1/23)
*****************************************************************************/
typedef enum en_bt_cr_timclkdiv
{
BtPCLKDiv1 = 0u, ///< Div 1
BtPCLKDiv2 = 1u, ///< Div 2
BtPCLKDiv4 = 2u, ///< Div 4
BtPCLKDiv8 = 3u, ///< Div 8
BtPCLKDiv16 = 4u, ///< Div 16
BtPCLKDiv32 = 5u, ///< Div 32
BtPCLKDiv64 = 6u, ///< Div 64
BtPCLKDiv256 = 7u, ///< Div 256
}en_bt_cr_timclkdiv_t;
/**
******************************************************************************
** \brief / (CT)(0/1/23)
*****************************************************************************/
typedef enum en_bt_cr_ct
{
BtTimer = 0u, ///< 定时器功能计数时钟为内部PCLK
BtCounter = 1u, ///< 计数器功能计数时钟为外部ETR
}en_bt_cr_ct_t;
/**
******************************************************************************
** \brief (MD)(0)
*****************************************************************************/
typedef enum en_bt_m0cr_md
{
Bt32bitFreeMode = 0u, ///< 32位计数器/定时器
Bt16bitArrMode = 1u, ///< 自动重载16位计数器/定时器
}en_bt_m0cr_md_t;
/**
******************************************************************************
** \brief BT0/BT1/BT2(0/1/23)
*****************************************************************************/
typedef enum en_bt_irq_type
{
BtUevIrq = 0u, ///< 溢出/事件更新中断
BtCA0Irq = 2u, ///< 捕获/比较中断A(仅模式1/23存在)
BtCB0Irq = 5u, ///< 捕获/比较中断B(仅模式23存在)
BtCA0E = 8u, ///< CH0A捕获数据丢失标志(仅模式23存在),不是中断
BtCB0E = 11u, ///< CH0B捕获数据丢失标志(仅模式23存在),不是中断
BtBkIrq = 14u, ///< 刹车中断(仅模式23存在)
BtTrigIrq = 15u, ///< 触发中断(仅模式23存在)
}en_bt_irq_type_t;
/**
******************************************************************************
** \brief (Edg1stEdg2nd)(1)
*****************************************************************************/
typedef enum en_bt_m1cr_Edge
{
BtPwcRiseToRise = 0u, ///< 上升沿到上升沿(周期)
BtPwcFallToRise = 1u, ///< 下降沿到上升沿(低电平)
BtPwcRiseToFall = 2u, ///< 上升沿到下降沿(高电平)
BtPwcFallToFall = 3u, ///< 下降沿到下降沿(周期)
}en_bt_m1cr_Edge_t;
/**
******************************************************************************
** \brief PWC (Oneshot)(1)
*****************************************************************************/
typedef enum en_bt_m1cr_oneshot
{
BtPwcCycleDetect = 0u, ///< PWC循环测量
BtPwcOneShotDetect = 1u, ///< PWC单次测量
}en_bt_m1cr_oneshot_t;
/**
******************************************************************************
** \brief PWC IA0 (IA0S)(1)
*****************************************************************************/
typedef enum en_bt_m1_mscr_ia0s
{
BtIA0Input = 0u, ///< IAO输入
BtXORInput = 1u, ///< IA0 ETR GATE XOR(TIM0/1/2)/IA0 IA1 IA2 XOR(TIM3)
}en_bt_m1_mscr_ia0s_t;
/**
******************************************************************************
** \brief PWC IB0 (IA0S)(1)
*****************************************************************************/
typedef enum en_bt_m1_mscr_ib0s
{
BtIB0Input = 0u, ///< IBO输入
BtTsInput = 1u, ///< 内部触发TS选择信号
}en_bt_m1_mscr_ib0s_t;
/**
******************************************************************************
** \brief (CCPA0/CCPB0/ETP/BKP)(1/23)
*****************************************************************************/
typedef enum en_bt_port_polarity
{
BtPortPositive = 0u, ///< 正常输入输出
BtPortOpposite = 1u, ///< 反向输入输出
}en_bt_port_polarity_t;
/**
******************************************************************************
** \brief (FLTET/FLTA0/FLAB0)(1/23)
*****************************************************************************/
typedef enum en_bt_flt
{
BtFltNone = 0u, ///< 无滤波
BtFltPCLKCnt3 = 4u, ///< PCLK 3个连续有效
BtFltPCLKDiv4Cnt3 = 5u, ///< PCLK/4 3个连续有效
BtFltPCLKDiv16Cnt3 = 6u, ///< PCLK/16 3个连续有效
BtFltPCLKDiv64Cnt3 = 7u, ///< PCLK/64 3个连续有效
}en_bt_flt_t;
/**
******************************************************************************
** \brief (OCMA/OCMB)(23)
*****************************************************************************/
typedef enum en_bt_m23_fltr_ocm
{
BtForceLow = 0u, ///< 强制为0
BtForceHigh = 1u, ///< 强制为1
BtCMPForceLow = 2u, ///< 比较匹配时强制为0
BtCMPForceHigh = 3u, ///< 比较匹配时强制为1
BtCMPInverse = 4u, ///< 比较匹配时翻转电平
BtCMPOnePrdHigh = 5u, ///< 比较匹配时输出一个计数周期的高电平
BtPWMMode1 = 6u, ///< 通道控制为PWM mode 1
BtPWMMode2 = 7u, ///< 通道控制为PWM mode 2
}en_bt_m23_fltr_ocm_t;
/**
******************************************************************************
** \brief TS (TS)(1/23)
*****************************************************************************/
typedef enum en_bt_mscr_ts
{
BtTs0ETR = 0u, ///< ETR外部输入滤波后的相位选择信号
BtTs1TIM0TRGO = 1u, ///< Timer0的TRGO输出信号
BtTs2TIM1TRGO = 2u, ///< Timer1的TRGO输出信号
BtTs3TIM2TRGO = 3u, ///< Timer2的TRGO输出信号
BtTs4TIM3TRGO = 4u, ///< Timer3的TRGO输出信号
//BtTs5IA0ED = 5u, ///< 无效
BtTs6IAFP = 6u, ///< CH0A 外部输输入滤波后的相位选择信号
BtTs7IBFP = 7u, ///< CH0B 外部输输入滤波后的相位选择信
}en_bt_mscr_ts_t;
/**
******************************************************************************
** \brief PWM (COMP)(23)
*****************************************************************************/
typedef enum en_bt_m23cr_comp
{
BtIndependentPWM = 0u, ///< 独立PWM输出
BtComplementaryPWM = 1u, ///< 互补PWM输出
}en_bt_m23cr_comp_t;
/**
******************************************************************************
** \brief (DIR)(23)
*****************************************************************************/
typedef enum en_bt_m23cr_dir
{
BtCntUp = 0u, ///< 向上计数
BtCntDown = 1u, ///< 向下计数
}en_bt_m23cr_dir_t;
/**
******************************************************************************
** \brief (PWM2S)(23)
*****************************************************************************/
typedef enum en_bt_m23cr_pwm2s
{
BtDoublePointCmp = 0u, ///< 双点比较使能使用CCRA,CCRB比较控制OCREFA输出
BtSinglePointCmp = 1u, ///< 单点比较使能使用CCRA比较控制OCREFA输出
}en_bt_m23cr_pwm2s_t;
/**
******************************************************************************
** \brief GATEPWM (CSG)(23)
*****************************************************************************/
typedef enum en_bt_m23cr_csg
{
BtPWMCompGateCmpOut = 0u, ///< 在PWM互补模式下Gate作为比较输出
BtPWMCompGateCapIn = 1u, ///< 在PWM互补模式下Gate作为捕获输入
}en_bt_m23cr_csg_t;
/**
******************************************************************************
** \brief (CCR0A,CCR0B)(23)
*****************************************************************************/
typedef enum en_bt_m23_ccrx
{
BtCCR0A = 0u, ///< CCR0A比较捕获寄存器
BtCCR0B = 1u, ///< CCR0B比较捕获寄存器
}en_bt_m23_ccrx_t;
/**
******************************************************************************
** \brief OCREF (OCCS)(23)
*****************************************************************************/
typedef enum en_bt_m23ce_occs
{
BtOC_Ref_Clr = 0u, ///< 来自VC的OC_Ref_Clr
BtETRf = 1u, ///< 外部ETRf
}en_bt_m23ce_occs_t;
/**
******************************************************************************
** \brief (CIS/CISB)(23)
*****************************************************************************/
typedef enum en_bt_m23_cisa_cisb
{
BtCmpIntNone = 0u, ///< 无比较匹配中断
BtCmpIntRise = 1u, ///< 比较匹配上升沿中断
BtCmpIntFall = 2u, ///< 比较匹配下降沿中断
BtCmpIntRiseFall = 3u, ///< 比较匹配上升沿下降沿中断
}en_bt_m23_cisa_cisb_t;
/**
******************************************************************************
** \brief BT - CHx(BKSA/BKSB)(23)
**
** \note
******************************************************************************/
typedef enum en_bt_m23_crch0_bks
{
BtCHxBksHiZ = 0u, ///< 刹车使能时CHx端口输出高阻态
BtCHxBksNorm = 1u, ///< 刹车使能时CHx端口正常输出
BtCHxBksLow = 2u, ///< 刹车使能时CHx端口输出低电平
BtCHxBksHigh = 3u, ///< 刹车使能时CHx端口输出高电平
}en_bt_m23_crch0_bks_t;
/**
******************************************************************************
** \brief BT - CHx沿沿(CRx/CFx)(23)
**
** \note
******************************************************************************/
typedef enum en_bt_m23_crch0_cfx_crx
{
BtCHxCapNone = 0u, ///< CHx通道捕获禁止
BtCHxCapRise = 1u, ///< CHx通道上升沿捕获使能
BtCHxCapFall = 2u, ///< CHx通道下降沿捕获使能
BtCHxCapFallRise = 3u, ///< CHx通道上升沿下降沿捕获都使能
}en_bt_m23_crch0_cfx_crx_t;
/**
******************************************************************************
** \brief BT - CHx(CSA/CSB)(23)
**
** \note
******************************************************************************/
typedef enum en_bt_m23_crch0_csa_csb
{
BtCHxCmpMode = 0u, ///< CHx通道设置为比较模式
BtCHxCapMode = 1u, ///< CHx通道设置为捕获模式
}en_bt_m23_crch0_csa_csb_t;
/**
******************************************************************************
** \brief DMA (CCDS)(23)
*****************************************************************************/
typedef enum en_bt_m23_mscr_ccds
{
BtCmpTrigDMA = 0u, ///< 比较匹配触发DMA
BtUEVTrigDMA = 1u, ///< 事件更新代替比较匹配触发DMA
}en_bt_m23_mscr_ccds_t;
/**
******************************************************************************
** \brief (MSM)(23)
*****************************************************************************/
typedef enum en_bt_m23_mscr_msm
{
BtSlaveMode = 0u, ///< 从模式
BtMasterMode = 1u, ///< 主模式
}en_bt_m23_mscr_msm_t;
/**
******************************************************************************
** \brief (MMS)(23)
*****************************************************************************/
typedef enum en_bt_m23_mscr_mms
{
BtMasterUG = 0u, ///< UG(软件更新)源
BtMasterCTEN = 1u, ///< CTEN源
BtMasterUEV = 2u, ///< UEV更新源
BtMasterCMPSO = 3u, ///< 比较匹配选择输出源
BtMasterOCA0Ref = 4u, ///< OCA0_Ref源
BtMasterOCB0Ref = 5u, ///< OCB0_Ref源
//BtMasterOCB0Ref = 6u,
//BtMasterOCB0Ref = 7u,
}en_bt_m23_mscr_mms_t;
/**
******************************************************************************
** \brief (SMS)(23)
*****************************************************************************/
typedef enum en_bt_m23_mscr_sms
{
BtSlaveIClk = 0u, ///< 使用内部时钟
BtSlaveResetTIM = 1u, ///< 复位功能
BtSlaveTrigMode = 2u, ///< 触发模式
BtSlaveEClk = 3u, ///< 外部时钟模式
BtSlaveCodeCnt1 = 4u, ///< 正交编码计数模式1
BtSlaveCodeCnt2 = 5u, ///< 正交编码计数模式2
BtSlaveCodeCnt3 = 6u, ///< 正交编码计数模式3
BtSlaveGateCtrl = 7u, ///< 门控功能
}en_bt_m23_mscr_sms_t;
/**
******************************************************************************
** \brief (CTEN)
*****************************************************************************/
typedef enum en_bt_start
{
BtCTENDisable = 0u, ///< 停止
BtCTENEnable = 1u, ///< 运行
}en_bt_start_t;
/**
******************************************************************************
** \brief BaseTimer mode0 (0)
*****************************************************************************/
typedef struct stc_bt_mode0_cfg
{
en_bt_work_mode_t enWorkMode; ///< 工作模式设置
en_bt_m0_gatep_t enGateP; ///< 门控极性控制
boolean_t bEnGate; ///< 门控使能
en_bt_cr_timclkdiv_t enPRS; ///< 预除频配置
boolean_t bEnTog; ///< 翻转输出使能
en_bt_cr_ct_t enCT; ///< 定时/计数功能选择
en_bt_m0cr_md_t enCntMode; ///< 计数模式配置
func_ptr_t pfnTim0Cb; ///< Timer0中断服务回调函数[void function(void)]
func_ptr_t pfnTim1Cb; ///< Timer1中断服务回调函数[void function(void)]
func_ptr_t pfnTim2Cb; ///< Timer2中断服务回调函数[void function(void)]
}stc_bt_mode0_cfg_t;
/**
******************************************************************************
** \brief BaseTimer mode1 (1)
*****************************************************************************/
typedef struct stc_bt_mode1_cfg
{
en_bt_work_mode_t enWorkMode; ///< 工作模式设置
en_bt_cr_timclkdiv_t enPRS; ///< 预除频配置
en_bt_cr_ct_t enCT; ///< 定时/计数功能选择
en_bt_m1cr_oneshot_t enOneShot; ///< 单次测量/循环测量选择
func_ptr_t pfnTim0Cb; ///< Timer0中断服务回调函数[void function(void)]
func_ptr_t pfnTim1Cb; ///< Timer1中断服务回调函数[void function(void)]
func_ptr_t pfnTim2Cb; ///< Timer2中断服务回调函数[void function(void)]
}stc_bt_mode1_cfg_t;
/**
******************************************************************************
** \brief PWC(1)
*****************************************************************************/
typedef struct stc_bt_pwc_input_cfg
{
en_bt_mscr_ts_t enTsSel; ///< 触发输入源选择
en_bt_m1_mscr_ia0s_t enIA0Sel; ///< CHA0输入选择
en_bt_m1_mscr_ib0s_t enIB0Sel; ///< CHB0输入选择
en_bt_port_polarity_t enETRPhase; ///< ETR相位选择
en_bt_flt_t enFltETR; ///< ETR滤波设置
en_bt_flt_t enFltIA0; ///< CHA0滤波设置
en_bt_flt_t enFltIB0; ///< CHB0滤波设置
}stc_bt_pwc_input_cfg_t;
/**
******************************************************************************
** \brief BaseTimer mode23 (23)
*****************************************************************************/
typedef struct stc_bt_mode23_cfg
{
en_bt_work_mode_t enWorkMode; ///< 工作模式设置
en_bt_m23cr_dir_t enCntDir; ///< 计数方向
en_bt_cr_timclkdiv_t enPRS; ///< 时钟预除频配置
en_bt_cr_ct_t enCT; ///< 定时/计数功能选择
en_bt_m23cr_comp_t enPWMTypeSel; ///< PWM模式选择独立/互补)
en_bt_m23cr_pwm2s_t enPWM2sSel; ///< OCREFA双点比较功能选择
boolean_t bOneShot; ///< 单次触发模式使能/禁止
boolean_t bURSSel; ///< 更新源选择
func_ptr_t pfnTim0Cb; ///< Timer0中断服务回调函数[void function(void)]
func_ptr_t pfnTim1Cb; ///< Timer1中断服务回调函数[void function(void)]
func_ptr_t pfnTim2Cb; ///< Timer2中断服务回调函数[void function(void)]
}stc_bt_mode23_cfg_t;
/**
******************************************************************************
** \brief GATEPWM (23)
*****************************************************************************/
typedef struct stc_bt_m23_gate_cfg
{
en_bt_m23cr_csg_t enGateFuncSel; ///< Gate比较、捕获功能选择
boolean_t bGateRiseCap; ///< GATE作为捕获功能时上沿捕获有效控制
boolean_t bGateFallCap; ///< GATE作为捕获功能时下沿捕获有效控制
}stc_bt_m23_gate_cfg_t;
/**
******************************************************************************
** \brief CHA/CHB (23)
*****************************************************************************/
typedef struct stc_bt_m23_compare_cfg
{
en_bt_m23_crch0_csa_csb_t enCh0ACmpCap; ///< CH0A比较/捕获功能选择
en_bt_m23_fltr_ocm_t enCH0ACmpCtrl; ///< CH0A通道比较控制
en_bt_port_polarity_t enCH0APolarity; ///< CH0A输出极性控制
boolean_t bCh0ACmpBufEn; ///< 比较A缓存功能 使能/禁止
en_bt_m23_cisa_cisb_t enCh0ACmpIntSel; ///< CHA比较匹配中断选择
en_bt_m23_crch0_csa_csb_t enCh0BCmpCap; ///< CH0B比较/捕获功能选择
en_bt_m23_fltr_ocm_t enCH0BCmpCtrl; ///< CH0B通道比较控制
en_bt_port_polarity_t enCH0BPolarity; ///< CH0B输出极性控制
boolean_t bCH0BCmpBufEn; ///< 比较B缓存功能 使能/禁止
en_bt_m23_cisa_cisb_t enCH0BCmpIntSel; ///< CHB0比较匹配中断选择
}stc_bt_m23_compare_cfg_t;
/**
******************************************************************************
** \brief CHA/CHB (23)
*****************************************************************************/
typedef struct stc_bt_m23_input_cfg
{
en_bt_m23_crch0_csa_csb_t enCh0ACmpCap; ///< CH0A比较/捕获功能选择
en_bt_m23_crch0_cfx_crx_t enCH0ACapSel; ///< CH0A捕获边沿选择
en_bt_flt_t enCH0AInFlt; ///< CH0A通道捕获滤波控制
en_bt_port_polarity_t enCH0APolarity; ///< CH0A输入相位
en_bt_m23_crch0_csa_csb_t enCh0BCmpCap; ///< CH0B比较/捕获功能选择
en_bt_m23_crch0_cfx_crx_t enCH0BCapSel; ///< HC0B捕获边沿选择
en_bt_flt_t enCH0BInFlt; ///< CH0B通道捕获滤波控制
en_bt_port_polarity_t enCH0BPolarity; ///< CH0B输入相位
}stc_bt_m23_input_cfg_t;
/**
******************************************************************************
** \brief ETR(23)
*****************************************************************************/
typedef struct stc_bt_m23_etr_input_cfg
{
en_bt_port_polarity_t enETRPolarity; ///< ETR输入极性设置
en_bt_flt_t enETRFlt; ///< ETR滤波设置
}stc_bt_m23_etr_input_cfg_t;
/**
******************************************************************************
** \brief BK(23)
*****************************************************************************/
typedef struct stc_bt_m23_bk_input_cfg
{
boolean_t bEnBrake; ///< 刹车使能
boolean_t bEnVCBrake; ///< 使能VC0刹车
boolean_t bEnSafetyBk; ///< 使能safety刹车
boolean_t bEnBKSync; ///< TIM0/TIM1/TIM2刹车同步使能
en_bt_m23_crch0_bks_t enBkCH0AStat; ///< 刹车时CHA端口状态设置
en_bt_m23_crch0_bks_t enBkCH0BStat; ///< 刹车时CHB端口状态设置
en_bt_port_polarity_t enBrakePolarity; ///< 刹车BK输入极性设置
en_bt_flt_t enBrakeFlt; ///< 刹车BK滤波设置
}stc_bt_m23_bk_input_cfg_t;
/**
******************************************************************************
** \brief (23)
*****************************************************************************/
typedef struct stc_bt_m23_dt_cfg
{
boolean_t bEnDeadTime; ///< 刹车时CHA端口状态设置
uint8_t u8DeadTimeValue; ///< 刹车时CHA端口状态设置
}stc_bt_m23_dt_cfg_t;
/**
******************************************************************************
** \brief ADC(23)
*****************************************************************************/
typedef struct stc_bt_m23_adc_trig_cfg
{
boolean_t bEnTrigADC; ///< 触发ADC全局控制
boolean_t bEnUevTrigADC; ///< 事件更新触发ADC
boolean_t bEnCH0ACmpTrigADC; ///< CH0A比较匹配触发ADC
boolean_t bEnCH0BCmpTrigADC; ///< CH0B比较匹配触发ADC
}stc_bt_m23_adc_trig_cfg_t;
/**
******************************************************************************
** \brief DMA (23)
*****************************************************************************/
typedef struct stc_bt_m23_trig_dma_cfg
{
boolean_t bUevTrigDMA; ///< 更新 触发DMA使能
boolean_t bTITrigDMA; ///< Trig 触发DMA功能
boolean_t bCmpATrigDMA; ///< A捕获比较触发DMA使能
boolean_t bCmpBTrigDMA; ///< B捕获比较触发DMA使能
en_bt_m23_mscr_ccds_t enCmpUevTrigDMA; ///< 比较模式下DMA比较触发选择
}stc_bt_m23_trig_dma_cfg_t;
/**
******************************************************************************
** \brief (23)
*****************************************************************************/
typedef struct stc_bt_m23_master_slave_cfg
{
en_bt_m23_mscr_msm_t enMasterSlaveSel; ///< 主从模式选择
en_bt_m23_mscr_mms_t enMasterSrc; ///< 主模式触发源选择
en_bt_m23_mscr_sms_t enSlaveModeSel; ///< 从模式选择
en_bt_mscr_ts_t enTsSel; ///< 触发输入源选择
}stc_bt_m23_master_slave_cfg_t;
/**
******************************************************************************
** \brief OCREF (23)
*****************************************************************************/
typedef struct stc_bt_m23_OCREF_Clr_cfg
{
en_bt_m23ce_occs_t enOCRefClrSrcSel; ///< OCREF清除源选择
boolean_t bVCClrEn; ///< 是否使能来自VC的OCREF_Clr
}stc_bt_m23_OCREF_Clr_cfg_t;
/******************************************************************************
* Global variable declarations ('extern', definition in C source)
*****************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
*****************************************************************************/
//中断相关函数
//中断标志获取
boolean_t Bt_GetIntFlag(en_bt_unit_t enUnit, en_bt_irq_type_t enBtIrq);
//中断标志清除
en_result_t Bt_ClearIntFlag(en_bt_unit_t enUnit, en_bt_irq_type_t enBtIrq);
//所有中断标志清除
en_result_t Bt_ClearAllIntFlag(en_bt_unit_t enUnit);
//模式0中断使能
en_result_t Bt_Mode0_EnableIrq(en_bt_unit_t enUnit);
//模式1中断使能
en_result_t Bt_Mode1_EnableIrq (en_bt_unit_t enUnit, en_bt_irq_type_t enBtIrq);
//模式2中断使能
en_result_t Bt_Mode23_EnableIrq (en_bt_unit_t enUnit, en_bt_irq_type_t enBtIrq);
//模式0中断禁止
en_result_t Bt_Mode0_DisableIrq(en_bt_unit_t enUnit);
//模式1中断禁止
en_result_t Bt_Mode1_DisableIrq (en_bt_unit_t enUnit, en_bt_irq_type_t enBtIrq);
//模式2中断禁止
en_result_t Bt_Mode23_DisableIrq (en_bt_unit_t enUnit, en_bt_irq_type_t enBtIrq);
//模式0初始化及相关功能操作
//timer配置及初始化
en_result_t Bt_Mode0_Init(en_bt_unit_t enUnit, stc_bt_mode0_cfg_t* pstcCfg);
//timer 启动/停止
en_result_t Bt_M0_Run(en_bt_unit_t enUnit);
en_result_t Bt_M0_Stop(en_bt_unit_t enUnit);
//重载值设置
en_result_t Bt_M0_ARRSet(en_bt_unit_t enUnit, uint16_t u16Data);
//16位计数值设置/获取
en_result_t Bt_M0_Cnt16Set(en_bt_unit_t enUnit, uint16_t u16Data);
uint16_t Bt_M0_Cnt16Get(en_bt_unit_t enUnit);
//32位计数值设置/获取
en_result_t Bt_M0_Cnt32Set(en_bt_unit_t enUnit, uint32_t u32Data);
uint32_t Bt_M0_Cnt32Get(en_bt_unit_t enUnit);
//翻转输出使能/禁止(低电平)设定
en_result_t Bt_M0_EnTOG_Output(en_bt_unit_t enUnit, boolean_t bEnTOG);
//端口输出使能/禁止设定
en_result_t Bt_M0_Enable_Output(en_bt_unit_t enUnit, boolean_t bEnOutput);
//模式1初始化及相关功能操作
//timer配置及初始化
en_result_t Bt_Mode1_Init(en_bt_unit_t enUnit, stc_bt_mode1_cfg_t* pstcCfg);
//PWC 输入配置
en_result_t Bt_M1_Input_Cfg(en_bt_unit_t enUnit, stc_bt_pwc_input_cfg_t* pstcCfg);
//PWC测量边沿起始结束选择
en_result_t Bt_M1_PWC_Edge_Sel(en_bt_unit_t enUnit,en_bt_m1cr_Edge_t enEdgeSel);
//timer 启动/停止
en_result_t Bt_M1_Run(en_bt_unit_t enUnit);
en_result_t Bt_M1_Stop(en_bt_unit_t enUnit);
//16位计数值设置/获取
en_result_t Bt_M1_Cnt16Set(en_bt_unit_t enUnit, uint16_t u16Data);
uint16_t Bt_M1_Cnt16Get(en_bt_unit_t enUnit);
//脉冲宽度测量结果数值获取
uint16_t Bt_M1_PWC_CapValueGet(en_bt_unit_t enUnit);
//模式23初始化及相关功能操作
//timer配置及初始化
en_result_t Bt_Mode23_Init(en_bt_unit_t enUnit, stc_bt_mode23_cfg_t* pstcCfg);
//timer 启动/停止
en_result_t Bt_M23_Run(en_bt_unit_t enUnit);
en_result_t Bt_M23_Stop(en_bt_unit_t enUnit);
//PWM输出使能
en_result_t Bt_M23_EnPWM_Output(en_bt_unit_t enUnit, boolean_t bEnOutput, boolean_t bEnAutoOutput);
//重载值设置
en_result_t Bt_M23_ARRSet(en_bt_unit_t enUnit, uint16_t u16Data, boolean_t bArrBufEn);
//16位计数值设置/获取
en_result_t Bt_M23_Cnt16Set(en_bt_unit_t enUnit, uint16_t u16Data);
uint16_t Bt_M23_Cnt16Get(en_bt_unit_t enUnit);
//比较捕获寄存器CCR0A/CCR0B设置/读取
en_result_t Bt_M23_CCR_Set(en_bt_unit_t enUnit, en_bt_m23_ccrx_t enCCRSel, uint16_t u16Data);
uint16_t Bt_M23_CCR_Get(en_bt_unit_t enUnit, en_bt_m23_ccrx_t enCCRSel);
//PWM互补输出模式下GATE功能选择
en_result_t Bt_M23_GateFuncSel(en_bt_unit_t enUnit,stc_bt_m23_gate_cfg_t* pstcCfg);
//主从模式配置
en_result_t Bt_M23_MasterSlave_Set(en_bt_unit_t enUnit, stc_bt_m23_master_slave_cfg_t* pstcCfg);
//CH0A/CH0B比较通道控制
en_result_t Bt_M23_PortOutput_Cfg(en_bt_unit_t enUnit, stc_bt_m23_compare_cfg_t* pstcCfg);
//CH0A/CH0B输入控制
en_result_t Bt_M23_PortInput_Cfg(en_bt_unit_t enUnit, stc_bt_m23_input_cfg_t* pstcCfg);
//ERT输入控制
en_result_t Bt_M23_ETRInput_Cfg(en_bt_unit_t enUnit, stc_bt_m23_etr_input_cfg_t* pstcCfg);
//刹车BK输入控制
en_result_t Bt_M23_BrakeInput_Cfg(en_bt_unit_t enUnit, stc_bt_m23_bk_input_cfg_t* pstcCfg);
//触发ADC控制
en_result_t Bt_M23_TrigADC_Cfg(en_bt_unit_t enUnit, stc_bt_m23_adc_trig_cfg_t* pstcCfg);
//死区功能
en_result_t Bt_M23_DT_Cfg(en_bt_unit_t enUnit, stc_bt_m23_dt_cfg_t* pstcCfg);
//重复周期设置
en_result_t Bt_M23_SetValidPeriod(en_bt_unit_t enUnit, uint8_t u8ValidPeriod);
//OCREF清除功能
en_result_t Bt_M23_OCRefClr(en_bt_unit_t enUnit, stc_bt_m23_OCREF_Clr_cfg_t* pstcCfg);
//使能DMA传输
en_result_t Bt_M23_EnDMA(en_bt_unit_t enUnit, stc_bt_m23_trig_dma_cfg_t* pstcCfg);
//捕获比较A软件触发
en_result_t Bt_M23_EnSwTrigCapCmpA(en_bt_unit_t enUnit);
//捕获比较B软件触发
en_result_t Bt_M23_EnSwTrigCapCmpB(en_bt_unit_t enUnit);
//软件更新使能
en_result_t Bt_M23_EnSwUev(en_bt_unit_t enUnit);
//软件触发使能
en_result_t Bt_M23_EnSwTrig(en_bt_unit_t enUnit);
//软件刹车使能
en_result_t Bt_M23_EnSwBk(en_bt_unit_t enUnit);
//@} // BtGroup
#ifdef __cplusplus
#endif
#endif /* __BT_H__ */
/******************************************************************************
* EOF (not truncated)
*****************************************************************************/

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@ -0,0 +1,561 @@
/*****************************************************************************
* Copyright (C) 2016, Huada Semiconductor Co., Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACCOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file can.h
**
** A detailed description is available at
** @link CanGroup CAN description @endlink
**
** - 2018-11-27 1.0 Lux First version for Device Driver Library of CAN
**
******************************************************************************/
#ifndef __CAN_H__
#define __CAN_H__
/*******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
*******************************************************************************
** \defgroup CanGroup Controller Area Network(CAN)
**
******************************************************************************/
//@{
/*******************************************************************************
* Global type definitions ('typedef')
******************************************************************************/
/**
*******************************************************************************
** \brief CAN .
******************************************************************************/
typedef enum
{
NO_ERROR = 0U, ///< 无错误
BIT_ERROR = 1U, ///< 位错误
FORM_ERROR = 2U, ///< 形式错误
STUFF_ERROR = 3U, ///< 填充错误
ACK_ERROR = 4U, ///< 应答错误
CRC_ERROR = 5U, ///< CRC错误
UNKOWN_ERROR = 6U, ///< 未知错误
}en_can_error_t;
/**
*******************************************************************************
** \brief CAN. (TCMD)
******************************************************************************/
typedef enum
{
CanPTBSel = 0U, ///< 主缓冲器选择
CanSTBSel = 1U, ///< 副缓冲器选择
}en_can_buffer_sel_t;
/**
*******************************************************************************
** \brief CAN .(AFWL)
******************************************************************************/
typedef struct stc_can_warning_limit
{
uint8_t CanWarningLimitVal; ///< 接收缓冲器将满限定
uint8_t CanErrorWarningLimitVal; ///< 错误警告限定
}stc_can_warning_limit_t;
/**
*******************************************************************************
** \brief .(ACF)
******************************************************************************/
typedef enum en_can_acf_format_en
{
CanStdFrames = 0x02u, ///< 仅接受标准帧
CanExtFrames = 0x03u, ///< 仅接受扩展帧
CanAllFrames = 0x00u, ///< 接收标准帧和扩展帧
}en_can_acf_format_en_t;
/**
*******************************************************************************
** \brief 使. (ACFEN)
******************************************************************************/
typedef enum en_can_filter_sel
{
CanFilterSel1 = 0u, ///< 筛选器组1使能
CanFilterSel2 = 1u, ///< 筛选器组2使能
CanFilterSel3 = 2u, ///< 筛选器组3使能
CanFilterSel4 = 3u, ///< 筛选器组4使能
CanFilterSel5 = 4u, ///< 筛选器组5使能
CanFilterSel6 = 5u, ///< 筛选器组6使能
CanFilterSel7 = 6u, ///< 筛选器组7使能
CanFilterSel8 = 7u, ///< 筛选器组8使能
}en_can_filter_sel_t;
/**
*******************************************************************************
** \brief CAN 使.(IE)
******************************************************************************/
typedef enum
{
//<<Can Rx or Tx Irq En
CanRxIrqEn = 0x00000080, ///< 接收中断使能
CanRxOverIrqEn = 0x00000040, ///< 接收上溢中断使能
CanRxBufFullIrqEn = 0x00000020, ///< 接收缓冲器满中断使能
CanRxBufAlmostFullIrqEn = 0x00000010, ///< 接收缓冲器将满中断使能
CanTxPrimaryIrqEn = 0x00000008, ///< PTB发送中断使能
CanTxSecondaryIrqEn = 0x00000004, ///< STB发送中断使能
CanErrorIrqEn = 0x00000002, ///< 错误中断使能
//<<Can Error Irq En
CanErrorPassiveIrqEn = 0x00200000, ///< 错误被动中断使能
CanArbiLostIrqEn = 0x00080000, ///< 仲裁失败中断使能
CanBusErrorIrqEn = 0x00020000, ///< 总线错误中断使能
}en_can_irq_type_t;
/**
*******************************************************************************
** \brief CAN.(IF)
******************************************************************************/
typedef enum
{
CanTxBufFullIrqFlg = 0x00000001, ///< 发送缓冲器满标志
CanRxIrqFlg = 0x00008000, ///< 接收中断标志
CanRxOverIrqFlg = 0x00004000, ///< 接收上溢中断标志
CanRxBufFullIrqFlg = 0x00002000, ///< 接收缓冲器满中断标志
CanRxBufAlmostFullIrqFlg = 0x00001000, ///< 接收缓冲器将满中断标志
CanTxPrimaryIrqFlg = 0x00000800, ///< PTB发送中断标志
CanTxSecondaryIrqFlg = 0x00000400, ///< STB发送中断标志
CanErrorIrqFlg = 0x00000200, ///< 错误中断标志
CanAbortIrqFlg = 0x00000100, ///< 取消发送中断标志
CanErrorWarningIrqFlg = 0x00800000, ///< 达到错误限定警告标志
CanErrorPassivenodeIrqFlg = 0x00400000, ///< 错误被动节点标志
CanErrorPassiveIrqFlg = 0x00100000, ///< 错误被动中断标志
CanArbiLostIrqFlg = 0x00040000, ///< 仲裁失败中断标志
CanBusErrorIrqFlg = 0x00010000, ///< 总线错误中断标志
}en_can_irq_flag_type_t;
/**
*******************************************************************************
** \brief CAN .(CFG_STAT)
******************************************************************************/
typedef enum
{
CanExternalLoopBackMode = 0x40u, ///< 外部回环模式
CanInternalLoopBackMode = 0x20u, ///< 内部回环模式
CanTxSignalPrimaryMode = 0x10u, ///< PTB单次传输模式
CanTxSignalSecondaryMode = 0x08u, ///< STB单次传输模式
CanListenOnlyMode = 0xFFu, ///< 静默模式
}en_can_mode_t;
/**
*******************************************************************************
** \brief CAN .(STAT)
******************************************************************************/
typedef enum
{
CanRxActive = 0x04, ///< 接收中状态
CanTxActive = 0x02, ///< 发送中状态
CanBusoff = 0x01, ///< 总线关闭状态
}en_can_status_t;
/**
*******************************************************************************
** \brief CAN .(TCMD)
******************************************************************************/
typedef enum
{
CanPTBTxCmd = 0x10, ///< PTB发送命令
CanPTBTxAbortCmd = 0x08, ///< PTB发送取消命令
CanSTBTxOneCmd = 0x04, ///< STB单帧发送命令
CanSTBTxAllCmd = 0x02, ///< STB所有帧命令
CanSTBTxAbortCmd = 0x01, ///< STB发送取消命令
}en_can_tx_cmd_t;
/**
*******************************************************************************
** \brief CAN .(TCTRL)
******************************************************************************/
typedef enum
{
CanSTBFifoMode = 0, ///< FIFO模式
CanSTBPrimaryMode = 1, ///< 优先级模式
}en_can_stb_mode_t;
/**
*******************************************************************************
** \brief CAN .(RCTRL)
******************************************************************************/
typedef enum
{
CanSelfAckDisable = 0, ///< 无自应答
CanSelfAckEnable = 1, ///< 使能自应答(LBME=1)
}en_can_self_ack_en_t;
/**
*******************************************************************************
** \brief .(RCTRL)
******************************************************************************/
typedef enum
{
CanRxBufOverwritten = 0, ///< 最早接收到的数据被覆盖
CanRxBufNotStored = 1, ///< 最新接收到的数据不被存储
}en_can_rx_buf_mode_en_t;
/**
*******************************************************************************
** \brief .(RCTRL)
******************************************************************************/
typedef enum
{
CanRxNormal = 0, ///< 正常模式
CanRxAll = 1, ///< 存储所有(包括错误)数据
}en_can_rx_buf_all_t;
/**
*******************************************************************************
** \brief CAN .(RSTAT)
******************************************************************************/
typedef enum
{
CanRxBufEmpty = 0, ///< 空
CanRxBufnotAlmostFull = 1, ///< 非空但小于警告限定值
CanRxBufAlmostFull = 2, ///< 大于警告限定值但未满
CanRxBufFull = 3, ///< 满(上溢)
}en_can_rx_buf_status_t;
/**
*******************************************************************************
** \brief CAN .(TSSTAT)
******************************************************************************/
typedef enum
{
CanTxBufEmpty = 0, ///< 空
CanTxBufnotHalfFull = 1, ///< 小于等于半满
CanTxBufHalfFull = 2, ///< 大于半满
CanTxBufFull = 3, ///< 满
}en_can_tx_buf_status_t;
/**
*******************************************************************************
** \brief CAN .
******************************************************************************/
typedef struct stc_can_filter
{
uint32_t u32CODE; ///< CODE
uint32_t u32MASK; ///< MASK
en_can_filter_sel_t enFilterSel; ///< 筛选器组选择
en_can_acf_format_en_t enAcfFormat; ///< 筛选帧格式.
}stc_can_filter_t;
/**
*******************************************************************************
** \brief CAN .
******************************************************************************/
typedef struct stc_can_bt
{
uint8_t SEG_1; ///< 位段1时间(Tseg_1 = (SEG_1 + 2)*TQ)
uint8_t SEG_2; ///< 位段2时间(Tseg_2 = (SEG_2 + 1)*TQ)
uint8_t SJW; ///< 再同步补偿宽度时间(Tsjw = (SJW + 1)*TQ)
uint8_t PRESC; ///< CAN时钟预分频(TQ)
}stc_can_bt_t;
/**
*******************************************************************************
** \brief CAN .
******************************************************************************/
typedef struct
{
uint32_t DLC : 4; ///< Data length code
uint32_t RESERVED0 : 2; ///< Ignore
uint32_t RTR : 1; ///< Remote transmission request
uint32_t IDE : 1; ///< IDentifier extension
uint32_t RESERVED1 : 24; ///< Ignore
}stc_can_txcontrol_t;
/**
*******************************************************************************
** \brief CAN .
******************************************************************************/
typedef struct stc_can_txframe
{
union
{
uint32_t TBUF32_0; ///< Ignore
uint32_t StdID; ///< Standard ID
uint32_t ExtID; ///< Extended ID
};
union
{
uint32_t TBUF32_1; ///< Ignore
stc_can_txcontrol_t Control_f; ///< CAN Tx Control
};
union
{
uint32_t TBUF32_2[2]; ///< Ignore
uint8_t Data[8]; ///< CAN data
};
en_can_buffer_sel_t enBufferSel; ///< CAN Tx buffer select
}stc_can_txframe_t;
/**
*******************************************************************************
** \brief CAN .
******************************************************************************/
typedef struct
{
uint8_t DLC : 4; ///< Data length code
uint8_t RESERVED0 : 2; ///< Ignore
uint8_t RTR : 1; ///< Remote transmission request
uint8_t IDE : 1; ///< IDentifier extension
}stc_can_rxcontrol_t;
/**
*******************************************************************************
** \brief CAN.
******************************************************************************/
typedef struct
{
uint8_t RESERVED0 : 4; ///< Ignore
uint8_t TX : 1; ///< TX is set to 1 if the loop back mode is activated
uint8_t KOER : 3; ///< Kind of error
}stc_can_status_t;
/**
*******************************************************************************
** \brief CAN CYCTIM.
******************************************************************************/
typedef struct
{
stc_can_rxcontrol_t Control_f; ///< @ref stc_can_rxcontrol_t
stc_can_status_t Status_f; ///< @ref stc_can_status_t
uint16_t CycleTime; ///< TTCAN cycletime
}stc_can_cst_t;
/**
*******************************************************************************
** \brief CAN .
******************************************************************************/
typedef struct stc_can_rxframe
{
union
{
uint32_t RBUF32_0; ///< Ignore
uint32_t StdID; ///< Standard ID
uint32_t ExtID; ///< Extended ID
};
union
{
uint32_t RBUF32_1; ///< Ignore
stc_can_cst_t Cst; ///< @ref stc_can_cst_t
};
union
{
uint32_t RBUF32_2[2]; ///< Ignore
uint8_t Data[8]; ///< CAN data
};
}stc_can_rxframe_t;
/**
*******************************************************************************
** \brief CAN .
******************************************************************************/
typedef struct stc_can_init_config
{
en_can_rx_buf_all_t enCanRxBufAll; ///< @ref en_can_rx_buf_all_t
en_can_rx_buf_mode_en_t enCanRxBufMode; ///< @ref en_can_rx_buf_mode_en_t
en_can_stb_mode_t enCanSTBMode; ///< @ref en_can_stb_mode_t
stc_can_bt_t stcCanBt; ///< @ref stc_can_bt_t
stc_can_warning_limit_t stcWarningLimit; ///< @ref stc_can_warning_limit_t
}stc_can_init_config_t;
/**
*******************************************************************************
** \brief CAN TTCAN
******************************************************************************/
/**
*******************************************************************************
** \brief TTCAN
******************************************************************************/
typedef enum
{
CanTTcanPTBSel = 0x00u, ///< PTB
CanTTcanSTB1Sel = 0x01u, ///< STB1
CanTTcanSTB2Sel = 0x02u, ///< STB2
CanTTcanSTB3Sel = 0x03u, ///< STB3
CanTTcanSTB4Sel = 0x04u, ///< STB4
}en_can_ttcan_tbslot_t;
/**
*******************************************************************************
** \brief TTCAN
******************************************************************************/
typedef enum
{
CanTTcanTprescDiv1 = 0x00u, ///< Div1
CanTTcanTprescDiv2 = 0x01u, ///< Div2
CanTTcanTprescDiv3 = 0x02u, ///< Div3
CanTTcanTprescDiv4 = 0x03u, ///< Div4
}en_can_ttcan_Tpresc_t;
/**
*******************************************************************************
** \brief TTCAN
******************************************************************************/
typedef enum
{
CanTTcanImmediate = 0x00, ///< 立即触发
CanTTcanTime = 0x01, ///< 时间触发
CanTTcanSingle = 0x02, ///< 单次发送触发
CanTTcanTransStart = 0x03, ///< 发送开始触发
CanTTcanTransStop = 0x04, ///< 发送停止触发
}en_can_ttcan_trigger_type_t;
/**
*******************************************************************************
** \brief TTCAN
******************************************************************************/
typedef enum
{
CanTTcanWdtTriggerIrq = 0x80, ///< 触发看门中断标志
CanTTcanErrorTriggerIrq = 0x10, ///< 触发错误中断标志
CanTTcanTimTriggerIrq = 0x10, ///< 时间触发中断标志
}en_can_ttcan_irq_type_t;
typedef struct stc_can_ttcan_ref_msg
{
uint8_t u8IDE; ///< Reference message IDE:1-Extended; 0-Standard;
union ///< Reference message ID
{
uint32_t RefStdID; ///< Reference standard ID
uint32_t RefExtID; ///< Reference Extended ID
};
}stc_can_ttcan_ref_msg_t;
typedef struct stc_can_ttcan_trigger_config
{
en_can_ttcan_tbslot_t enTbSlot; ///< Transmit trigger TB slot pointer
en_can_ttcan_trigger_type_t enTrigType; ///< Trigger type
en_can_ttcan_Tpresc_t enTpresc; ///< Timer prescaler
uint8_t u8Tew; ///< Transmit enable window
uint16_t u16TrigTime; ///< TTCAN trigger time
uint16_t u16WatchTrigTime; ///< TTCAN watch trigger time register
}stc_can_ttcan_trigger_config_t;
/*******************************************************************************
* Global pre-processor symbols/macros ('#define')
******************************************************************************/
/*******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/*******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
///< CAN 初始化配置
void CAN_Init(stc_can_init_config_t *pstcCanInitCfg);
///< CAN 去初始化
void CAN_DeInit(void);
///< CAN 中断控制
void CAN_IrqCmd(en_can_irq_type_t enCanIrqType, boolean_t enNewState);
///< CAN 中断标志获取
boolean_t CAN_IrqFlgGet(en_can_irq_flag_type_t enCanIrqFlgType);
///< CAN 中断标志清除
void CAN_IrqFlgClr(en_can_irq_flag_type_t enCanIrqFlgType);
///< CAN 模式配置
void CAN_ModeConfig(en_can_mode_t enMode, en_can_self_ack_en_t enCanSAck, boolean_t enNewState);
///< CAN 错误类型获取
en_can_error_t CAN_ErrorStatusGet(void);
///< CAN CAN状态获取
boolean_t CAN_StatusGet(en_can_status_t enCanStatus);
///< CAN 筛选器配置
void CAN_FilterConfig(stc_can_filter_t *pstcFilter, boolean_t enNewState);
///< CAN 发送数据帧配置
void CAN_SetFrame(stc_can_txframe_t *pstcTxFrame);
///< CAN 数据帧传输命令
void CAN_TransmitCmd(en_can_tx_cmd_t enTxCmd);
///< CAN 发送缓冲状态获取
en_can_tx_buf_status_t CAN_TxBufStatusGet(void);
///< CAN 数据帧接收
void CAN_Receive(stc_can_rxframe_t *pstcRxFrame);
///< CAN 接收缓冲状态获取
en_can_rx_buf_status_t CAN_RxBufStatusGet(stc_can_rxframe_t *pstcRxFrame);
///< CAN 仲裁捕获
uint8_t CAN_ArbitrationLostCap(void);
///< CAN 接收错误计数值获取
uint8_t CAN_RxErrorCntGet(void);
///< CAN 发送错误计数值获取
uint8_t CAN_TxErrorCntGet(void);
//<< void CAN_TTCAN_Enable(void);
//<< void CAN_TTCAN_Disable(void);
//<< void CAN_TTCAN_IrqCmd(void);
//<< void CAN_TTCAN_ReferenceMsgSet(stc_can_ttcan_ref_msg_t *pstcRefMsg);
//<< void CAN_TTCAN_TriggerConfig(stc_can_ttcan_trigger_config_t *pstcTriggerCfg);
//@} // CanGroup
#ifdef __cplusplus
}
#endif
#endif /* __CAN_H__ */
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

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@ -0,0 +1,120 @@
/******************************************************************************
* Copyright (C) 2016, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file crc.h
**
** CRC API.
**
** - 2016-05-04 LuX V1.0.
**
******************************************************************************/
#ifndef __CRC_H__
#define __CRC_H__
/******************************************************************************
* Include files
******************************************************************************/
#include "sysctrl.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup CrcGroup Cyclic Redundancy Check (CRC)
**
******************************************************************************/
//@{
/******************************************************************************
* Global type definitions
******************************************************************************/
/******************************************************************************
* Global definitions
******************************************************************************/
/******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
//CRC16 编码值获取
uint16_t CRC16_Get8(uint8_t* pu8Data, uint32_t u32Len);
uint16_t CRC16_Get16(uint16_t* pu16Data, uint32_t u32Len);
uint16_t CRC16_Get32(uint32_t* pu32Data, uint32_t u32Len);
//CRC16 校验
en_result_t CRC16_Check8(uint8_t* pu8Data, uint32_t u32Len, uint16_t u16CRC);
en_result_t CRC16_Check16(uint16_t* pu16Data, uint32_t u32Len, uint16_t u16CRC);
en_result_t CRC16_Check32(uint32_t* pu32Data, uint32_t u32Len, uint16_t u16CRC);
//CRC32 编码值获取
uint32_t CRC32_Get8(uint8_t* pu8Data, uint32_t u32Len);
uint32_t CRC32_Get16(uint16_t* pu16Data, uint32_t u32Len);
uint32_t CRC32_Get32(uint32_t* pu32Data, uint32_t u32Len);
//CRC32 校验
en_result_t CRC32_Check8(uint8_t* pu8Data, uint32_t u32Len, uint32_t u32CRC);
en_result_t CRC32_Check16(uint16_t* pu16Data, uint32_t u32Len, uint32_t u32CRC);
en_result_t CRC32_Check32(uint32_t* pu32Data, uint32_t u32Len, uint32_t u32CRC);
//@} // CRC Group
#ifdef __cplusplus
}
#endif
#endif /* __CRC_H__ */
/******************************************************************************
* EOF (not truncated)
******************************************************************************/

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/******************************************************************************
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file dac.h
**
** Header file for dac Converter functions
** @link DAC Group Some description @endlink
**
** - 2019-04-10 First Version
**
******************************************************************************/
#ifndef __DAC_H__
#define __DAC_H__
/******************************************************************************/
/* Include files */
/******************************************************************************/
#include "ddl.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \brief 使
******************************************************************************/
typedef enum
{
DacDisable = 0u, //禁止
DacEnable = 1u //使能
}en_en_state_t;
/**
******************************************************************************
** \brief 使DAC0 DAC_CR0BOFF0
******************************************************************************/
typedef enum
{
DacBoffDisable = 1u,
DacBoffEnable = 0u
}en_dac_boff_t;
/**
******************************************************************************
** \brief 使DAC0使 DAC_CR0: TEN0
******************************************************************************/
typedef enum
{
DacTenDisable = 0u,
DacTenEnable = 1u
}en_dac_ten_t;
/**
******************************************************************************
** \brief DAC0 DAC_CR0: TSEL0
******************************************************************************/
typedef enum
{
DacTim0Tradc = 0u, //TIM0_TRADC触发
DacTim1Tradc = 1u, //TIM1_TRADC触发
DacTim2Tradc = 2u, //TIM2_TRADC触发
DacTim3Tradc = 3u, //TIM3_TRADC触发
DacTim4Tradc = 4u, //TIM4_TRADC触发
DacTim5Tradc = 5u, //TIM5_TRADC触发
DacSwTriger = 6u, //软件触发
DacExPortTriger = 7u //外部端口触发
}en_dac_tsel_t;
/**
******************************************************************************
** \brief DAC0/使 DAC_CR0: WAVE0
******************************************************************************/
typedef enum
{
DacWaveDisable = 0u, //禁止生产波
DacNoiseEnable = 1u, //使能生成噪声波
DacTrWaveEnable = 2u //使能生产三角波
}en_dac_wave_t;
/**
******************************************************************************
** \brief DACx/ DAC_CR0: MAMP0 & MAMP1
******************************************************************************/
typedef enum
{
DacMemp01 = 0u,
DacMenp03 = 1u,
DacMenp07 = 2u,
DacMenp15 = 3u,
DacMenp31 = 4u,
DacMenp63 = 5u,
DacMenp127 = 6u,
DacMenp255 = 7u,
DacMenp511 = 8u,
DacMenp1023 = 9u,
DacMenp2047 = 10u,
DacMenp4095 = 11u
}en_dac_mamp_t;
/**
******************************************************************************
** \brief DACxDMA使 DAC_CR0: DMAEN0 & DMAEN1
******************************************************************************/
/**
******************************************************************************
** \brief DACxDMA使 DAC_CR0: DMAUDRIE0 & DMAUDRIE1
******************************************************************************/
/**
******************************************************************************
** \brief DACx DAC_CR0: SREF0 & SREF1
******************************************************************************/
typedef enum
{
DacVoltage1V5 = 0u, //内部1.5V
DacVoltage2V5 = 1u, //内部2.5V
DacVoltageExRef = 2u, //外部参考电压ExRef(PB01)
DacVoltageAvcc = 3u //AVCC电压
}en_dac_sref_t;
/**
******************************************************************************
** \brief DACxDAC_ETRS DAC_ETRS
******************************************************************************/
typedef enum
{
DacPortTrigPA9 = 0u, //触发端口为PA9
DacPortTrigPB9 = 1u, //触发端口为PB9
DacPortTrigPC9 = 2u, //触发端口为PC9
DacPortTrigPD9 = 3u, //触发端口为PD9
DacPortTrigPE9 = 4u, //触发端口为PE9
DacPortTrigPF9 = 5u //触发端口为PF9
}en_port_trig_t;
/**
******************************************************************************
** \brief
******************************************************************************/
typedef enum
{
DacRightAlign = 0u, //右对齐
DacLeftAlign = 1u //左对齐
}en_align_t;
/**
******************************************************************************
** \brief
******************************************************************************/
typedef enum
{
DacBit8 = 0u, //8位
DacBit12 = 1u //12位
}en_bitno_t;
/**
******************************************************************************
** \brief
******************************************************************************/
typedef struct
{
en_dac_boff_t boff_t;
en_dac_ten_t ten_t;
en_dac_tsel_t tsel_t;
en_dac_wave_t wave_t;
en_dac_mamp_t mamp_t;
en_dac_sref_t sref_t;
en_port_trig_t port_trig_t;
en_align_t align;
uint16_t dhr12;
uint8_t dhr8;
}stc_dac_cfg_t;
///< DAC0 操作API
extern void Dac0_Init(stc_dac_cfg_t* DAC_InitStruct);
extern void Dac0_SetChannelData(en_align_t DAC_Align, en_bitno_t DAC_Bit, uint16_t Data);
extern uint16_t Dac0_GetDataOutputValue(void);
extern void Dac0_DmaCmd(boolean_t NewState);
extern void Dac0_DmaITCfg(boolean_t NewState);
extern boolean_t Dac0_GetITStatus(void);
extern void Dac0_Cmd(boolean_t NewState);
extern void Dac0_SoftwareTriggerCmd(void);
///< DAC1 操作API
extern void Dac1_Init(stc_dac_cfg_t* DAC_InitStruct);
extern void Dac1_SetChannelData(en_align_t DAC_Align, en_bitno_t DAC_Bit, uint16_t Data);
extern uint16_t Dac1_GetDataOutputValue(void);
extern void Dac1_DmaCmd(boolean_t NewState);
extern void Dac1_DmaITCfg(boolean_t NewState);
extern boolean_t Dac1_GetITStatus(void);
extern void Dac1_Cmd(boolean_t NewState);
extern void Dac1_SoftwareTriggerCmd(void);
#ifdef __cplusplus
}
#endif
#endif //__DAC_H__
/******************************************************************************/
/* EOF (not truncated) */
/******************************************************************************/

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/*
* @Description:
* @Date: 2022-01-06 16:25:34
* @LastEditors: CK.Zh
* @LastEditTime: 2022-01-07 11:51:55
* @FilePath: /rt-thread/bsp/hc32l073/Libraries/HC32L073_StdPeriph_Driver/inc/ddl.h
*/
/*******************************************************************************
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file ddl.h
**
** DDL common define.
** @link SampleGroup Some description @endlink
**
** - 2019-10-17 1.1 Lux
**
******************************************************************************/
#ifndef __DDL_H__
#define __DDL_H__
/******************************************************************************/
/* Include files */
/******************************************************************************/
#include "base_types.h"
#include "board_config.h"
#include "board_motion.h"
#include "hc32l07x.h"
#include "system_hc32l07x.h"
#include "sysctrl.h"
#include "interrupts_hc32l07x.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/******************************************************************************/
/* Global pre-processor symbols/macros ('#define') */
/* Macro for initializing local structures to zero */
/******************************************************************************/
#define DDL_ZERO_STRUCT(x) ddl_memclr((uint8_t*)&(x), (uint32_t)(sizeof(x)))
#define DEC2BCD(x) ((((x)/10)<<4) + ((x)%10))
#define BCD2DEC(x) ((((x)>>4)*10) + ((x)&0x0F))
#define SET_BIT(REG, BIT) ((REG) |= (BIT))
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
#define READ_BIT(REG, BIT) ((REG) & (BIT))
#define CLEAR_REG(REG) ((REG) = (0x0))
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
#define READ_REG(REG) ((REG))
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
/**
******************************************************************************
** Global Device Series List
******************************************************************************/
#define DDL_DEVICE_SERIES_HC32L07X (0u)
/**
******************************************************************************
** Global Device Package List
******************************************************************************/
// package definitions of HC device.
#define DDL_DEVICE_PACKAGE_HC_C (0x00u)
#define DDL_DEVICE_PACKAGE_HC_F (0x10u)
#define DDL_DEVICE_PACKAGE_HC_J (0x20u)
#define DDL_DEVICE_PACKAGE_HC_K (0x30u)
/******************************************************************************/
/* User Device Setting Include file */
/******************************************************************************/
#include "ddl_device.h" // MUST be included here!
/******************************************************************************/
/* Global type definitions ('typedef') */
/******************************************************************************/
/**
******************************************************************************
** \brief Level
**
** Specifies levels.
**
******************************************************************************/
typedef enum en_level
{
DdlLow = 0u, ///< Low level '0'
DdlHigh = 1u ///< High level '1'
} en_level_t;
/**
******************************************************************************
** \brief Generic Flag Code
**
** Specifies flags.
**
******************************************************************************/
typedef enum en_flag
{
DdlClr = 0u, ///< Flag clr '0'
DdlSet = 1u ///< Flag set '1'
} en_stat_flag_t, en_irq_flag_t;
/******************************************************************************/
/* Global variable declarations ('extern', definition in C source) */
/******************************************************************************/
/******************************************************************************/
/* Global function prototypes ('extern', definition in C source) */
/******************************************************************************/
/*******************************************************************************
* Global function prototypes
******************************************************************************/
extern void ddl_memclr(void* pu8Address, uint32_t u32Count);
uint32_t Log2(uint32_t u32Val);
/**
*******************************************************************************
** This hook is part of wait loops.
******************************************************************************/
void delay1ms(uint32_t u32Cnt);
void delay100us(uint32_t u32Cnt);
void delay10us(uint32_t u32Cnt);
void SetBit(uint32_t addr, uint32_t offset, boolean_t bFlag);
void ClrBit(uint32_t addr, uint32_t offset);
boolean_t GetBit(uint32_t addr, uint32_t offset);
#ifdef __cplusplus
}
#endif
#endif /* __DDL_H__ */
/******************************************************************************/
/* EOF (not truncated) */
/******************************************************************************/

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/*******************************************************************************
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file debug.h
**
** Headerfile for DEBUG functions
** @link Debug Group Some description @endlink
**
** History:
** - 2018-04-15 Lux First Version
**
******************************************************************************/
#ifndef __DEBUG_H__
#define __DEBUG_H__
/*******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup DebugGroup (DEBUG)
**
******************************************************************************/
//@{
/**
*******************************************************************************
** function prototypes.
******************************************************************************/
/******************************************************************************
* Global type definitions
******************************************************************************/
/**
*******************************************************************************
** \brief
** \note
******************************************************************************/
typedef enum en_debug_module_active
{
DebugMskTim0 = 0x0001u, ///< TIM0
DebugMskTim1 = 0x0002u, ///< TIM1
DebugMskTim2 = 0x0004u, ///< TIM2
DebugMskLpTim0 = 0x0008u, ///< LPTIM0
DebugMskTim4 = 0x0010u, ///< TIM4
DebugMskTim5 = 0x0020u, ///< TIM5
DebugMskTim6 = 0x0040u, ///< TIM6
DebugMskPca = 0x0080u, ///< PCA
DebugMskWdt = 0x0100u, ///< WDT
DebugMskRtc = 0x0200u, ///< RTC
DebugMskTim3 = 0x0800u, ///< TIM3
DebugMskLpTim1 = 0x1000u, ///< LPTIM1
}en_debug_module_active_t;
/*******************************************************************************
* Global definitions
******************************************************************************/
/******************************************************************************
* Global variable declarations ('extern', definition in C source)
******************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
///< 在SWD调试模式下使能模块计数功能
en_result_t Debug_ActiveEnable(en_debug_module_active_t enModule);
///< 在SWD调试模式下暂停模块计数功能
en_result_t Debug_ActiveDisable(en_debug_module_active_t enModule);
//@} // Debug Group
#ifdef __cplusplus
#endif
#endif /* __DEBUG_H__ */
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

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/*****************************************************************************
* Copyright (C) 2016, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file dma.h
**
** A detailed description is available at
** @link DmacGroup Dmac description @endlink
**
** - 2018-03-09 1.0 Hongjh First version for Device Driver Library of Dmac.
**
******************************************************************************/
#ifndef __DMAC_H__
#define __DMAC_H__
/*******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
*******************************************************************************
** \defgroup DmacGroup Direct Memory Access Control(DMAC)
**
******************************************************************************/
//@{
/*******************************************************************************
* Global type definitions ('typedef')
******************************************************************************/
/**
*******************************************************************************
** \brief DMA
**
******************************************************************************/
typedef enum en_dma_channel
{
DmaCh0 = 0x00, ///< DMA 通道0
DmaCh1 = 0x04, ///< DMA 通道1
} en_dma_channel_t;
/**
*******************************************************************************
** \brief DMA
**
******************************************************************************/
typedef enum en_dma_priority
{
DmaMskPriorityFix = 0x00000000, ///< DMA 各通道优先级固定 (CH0>CH1)
DmaMskPriorityLoop = 0x10000000, ///< DMA 各通道优先级采用轮询方式
} en_dma_priority_t;
/**
*******************************************************************************
** \brief DMA
**
******************************************************************************/
typedef enum en_dma_transfer_width
{
DmaMsk8Bit = 0x00000000, ///< 8 bit 字节传输
DmaMsk16Bit = 0x04000000, ///< 16 bit 半字传输
DmaMsk32Bit = 0x08000000 ///< 32 bit 字传输
} en_dma_transfer_width_t;
/**
*******************************************************************************
** \brief DMA (Block)(Burst)
**
******************************************************************************/
typedef enum en_dma_transfer_mode
{
DmaMskBlock = 0x00000000, ///< 块(Block)传输
DmaMskBurst = 0x10000000, ///< 突发(Burst)传输
} en_dma_transfer_mode_t;
/**
*******************************************************************************
** \brief DMA
**
******************************************************************************/
typedef enum en_dma_stat
{
DmaDefault = 0U, ///< 初始值
DmaAddOverflow = 1U, ///< 传输错误引起中止(地址溢出)
DmaHALT = 2U, ///< 传输停止请求引起中止外设停止请求引起的停止或者EB/DE位引起的禁止传输
DmaAccSCRErr = 3U, ///< 传输错误引起中止(传输源地址访问错误)
DmaAccDestErr = 4U, ///< 传输错误引起中止(传输目的地址访问错误)
DmaTransferComplete = 5U, ///< 成功传输完成
DmaTransferPause = 7U, ///< 传输暂停
} en_dma_stat_t;
/**
*******************************************************************************
** \brief DMA
**
******************************************************************************/
typedef enum en_src_address_mode
{
DmaMskSrcAddrInc = 0x00000000, ///< 地址自增
DmaMskSrcAddrFix = 0x02000000, ///< 地址固定
} en_src_address_mode_t;
/**
*******************************************************************************
** \brief DMA
**
******************************************************************************/
typedef enum en_dst_address_mode
{
DmaMskDstAddrInc = 0x00000000, ///< 地址自增
DmaMskDstAddrFix = 0x01000000, ///< 地址固定
} en_dst_address_mode_t;
/**
*******************************************************************************
** \brief DMA CONFA:BC[3:0]CONFA:TC[15:0]
**
******************************************************************************/
typedef enum en_bc_tc_reload_mode
{
DmaMskBcTcReloadDisable = 0x00000000, ///< 禁止重载
DmaMskBcTcReloadEnable = 0x00800000, ///< 使能重载
} en_bc_tc_reload_mode_t;
/**
*******************************************************************************
** \brief DMA使
**
******************************************************************************/
typedef enum en_src_address_reload_mode
{
DmaMskSrcAddrReloadDisable = 0x00000000, ///< 禁止DMA源地址重载
DmaMskSrcAddrReloadEnable = 0x00400000, ///< 使能DMA源地址重载
} en_src_address_reload_mode_t;
/**
*******************************************************************************
** \brief DMA使
**
******************************************************************************/
typedef enum en_dst_address_reload_mode
{
DmaMskDstAddrReloadDisable = 0x00000000, ///< 禁止DMA目的地址重载
DmaMskDstAddrReloadEnable = 0x00200000, ///< 使能DMA目的地址重载
} en_dst_address_reload_mode_t;
/**
*******************************************************************************
** \brief DMA
**
******************************************************************************/
typedef enum en_dma_msk
{
DmaMskOneTransfer = 0x00000000, ///< 传输一次DMAC传输完成时清除CONFA:ENS位
DmaMskContinuousTransfer = 0x00000001, ///< 连续传输DMAC传输完成时不清除CONFA:ENS位
} en_dma_msk_t;
/**
*******************************************************************************
** \brief DMA
**
******************************************************************************/
typedef enum stc_dma_trig_sel
{
DmaSWTrig = 0U, ///< Select DMA software trig
DmaSPI0RXTrig = 64U, ///< Select DMA hardware trig 0
DmaSPI0TXTrig = 65U, ///< Select DMA hardware trig 1
DmaSPI1RXTrig = 66U, ///< Select DMA hardware trig 2
DmaSPI1TXTrig = 67U, ///< Select DMA hardware trig 3
DmaADCJQRTrig = 68U, ///< Select DMA hardware trig 4
DmaADCSQRTrig = 69U, ///< Select DMA hardware trig 5
DmaLCDTxTrig = 70U, ///< Select DMA hardware trig 6
DmaUart0RxTrig = 72U, ///< Select DMA hardware trig 8
DmaUart0TxTrig = 73U, ///< Select DMA hardware trig 9
DmaUart1RxTrig = 74U, ///< Select DMA hardware trig 10
DmaUart1TxTrig = 75U, ///< Select DMA hardware trig 11
DmaLpUart0RxTrig = 76U, ///< Select DMA hardware trig 12
DmaLpUart0TxTrig = 77U, ///< Select DMA hardware trig 13
DmaLpUart1RxTrig = 78U, ///< Select DMA hardware trig 14
DmaLpUart1TxTrig = 79U, ///< Select DMA hardware trig 15
DmaDAC0Trig = 80U, ///< Select DMA hardware trig 16
DmaDAC1Trig = 81U, ///< Select DMA hardware trig 17
DmaTIM0ATrig = 82U, ///< Select DMA hardware trig 18
DmaTIM0BTrig = 83U, ///< Select DMA hardware trig 19
DmaTIM1ATrig = 84U, ///< Select DMA hardware trig 20
DmaTIM1BTrig = 85U, ///< Select DMA hardware trig 21
DmaTIM2ATrig = 86U, ///< Select DMA hardware trig 22
DmaTIM2BTrig = 87U, ///< Select DMA hardware trig 23
DmaTIM3ATrig = 88U, ///< Select DMA hardware trig 24
DmaTIM3BTrig = 89U, ///< Select DMA hardware trig 25
DmaTIM4ATrig = 90U, ///< Select DMA hardware trig 26
DmaTIM4BTrig = 91U, ///< Select DMA hardware trig 27
DmaTIM5ATrig = 92U, ///< Select DMA hardware trig 28
DmaTIM5BTrig = 93U, ///< Select DMA hardware trig 29
DmaTIM6ATrig = 94U, ///< Select DMA hardware trig 30
DmaTIM6BTrig = 95U, ///< Select DMA hardware trig 31
DmaUart2RxTrig = 96U, ///< Select DMA hardware trig 32
DmaUart2TxTrig = 97U, ///< Select DMA hardware trig 33
DmaUart3RxTrig = 98U, ///< Select DMA hardware trig 34
DmaUart3TxTrig = 99U, ///< Select DMA hardware trig 35
DmaI2S0LeftTrig = 100U, ///< Select DMA hardware trig 36
DmaI2S0RightRrig = 101U, ///< Select DMA hardware trig 37
DmaI2S1LeftTrig = 102U, ///< Select DMA hardware trig 36
DmaI2S1RightRrig = 103U, ///< Select DMA hardware trig 37
}en_dma_trig_sel_t;
/**
*******************************************************************************
** \brief DMA
**
******************************************************************************/
typedef struct stc_dma_cfg
{
en_dma_transfer_mode_t enMode;
uint16_t u16BlockSize; ///< 块传输个数
uint16_t u16TransferCnt; ///< 传输块次数
en_dma_transfer_width_t enTransferWidth; ///< 传输数据字节宽度 具体参考枚举定义:en_dma_transfer_width_t
en_src_address_mode_t enSrcAddrMode; ///< DMA源地址控制模式自增或固定
en_dst_address_mode_t enDstAddrMode; ///< DMA目的地址控制模式自增或固定
en_src_address_reload_mode_t enSrcAddrReloadCtl; ///< 源地址重载 具体参考枚举定义:en_src_address_reload_mode_t
en_dst_address_reload_mode_t enDestAddrReloadCtl;///< 目的地址重载 具体参考枚举定义:en_dst_address_reload_mode_t
en_bc_tc_reload_mode_t enSrcBcTcReloadCtl; ///< Bc/Tc值重载功能 具体参考枚举定义:en_bc_tc_reload_mode_t
uint32_t u32SrcAddress; ///< 源地址>
uint32_t u32DstAddress; ///< 目的地址>
en_dma_msk_t enTransferMode; ///DMA 连续传输设置 具体参考枚举定义:en_dma_msk_t
en_dma_priority_t enPriority; ///DMA 优先级设定 具体参考枚举定义:en_dma_priority_t
en_dma_trig_sel_t enRequestNum; ///<DMA 触发源选择 具体参考枚举定义:en_dma_trig_sel_t
} stc_dma_cfg_t;
/*******************************************************************************
* Global pre-processor symbols/macros ('#define')
******************************************************************************/
/*******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/*******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
///< 初始化DMAC通道
en_result_t Dma_InitChannel(en_dma_channel_t enCh, stc_dma_cfg_t* pstcCfg);
///< DMA模块使能函数使能所有通道的操作每个通道按照各自设置工作
void Dma_Enable(void);
///< DMA模块功能禁止函数所有通道禁止工作.
void Dma_Disable(void);
///< 触发指定DMA通道软件传输功能.
void Dma_SwStart(en_dma_channel_t enCh);
///< 停止指定DMA通道软件传输功能.
void Dma_SwStop(en_dma_channel_t enCh);
///< 使能指定dma通道的传输完成中断.
void Dma_EnableChannelIrq(en_dma_channel_t enCh);
///< 禁用指定dma通道的传输完成中断.
void Dma_DisableChannelIrq(en_dma_channel_t enCh);
///< 使能指定dma通道的传输错误中断..
void Dma_EnableChannelErrIrq(en_dma_channel_t enCh);
///< 禁用指定dma通道的传输错误中断..
void Dma_DisableChannelErrIrq(en_dma_channel_t enCh);
///< 使能指定dma通道
void Dma_EnableChannel(en_dma_channel_t enCh);
///< 禁用指定dma通道
void Dma_DisableChannel(en_dma_channel_t enCh);
///< 设定指定通道的块(Block)尺寸
void Dma_SetBlockSize(en_dma_channel_t enCh, uint16_t u16BlkSize);
///< 设定指定通道块(Block)传输次数
void Dma_SetTransferCnt(en_dma_channel_t enCh, uint16_t u16TrnCnt);
///< 允许指定通道可连续传输即DMAC在传输完成时不清除CONFA:ENS位.
void Dma_EnableContinusTranfer(en_dma_channel_t enCh);
///< 禁止指定通道连续传输即DMAC在传输完成时清除.
void Dma_DisableContinusTranfer(en_dma_channel_t enCh);
///< 暂停所有dma通道.
void Dma_HaltTranfer(void);
///< 恢复之前暂停的所有dma通道.
void Dma_RecoverTranfer(void);
///< 暂停指定dma通道.
void Dma_PauseChannelTranfer(en_dma_channel_t enCh);
///< 恢复之前暂定的指定dma通道.
void Dma_RecoverChannelTranfer(en_dma_channel_t enCh);
///< 设定指定通道传输数据宽度.
void Dma_SetTransferWidth(en_dma_channel_t enCh, en_dma_transfer_width_t enWidth);
///< 设定dma通道优先级.
void Dma_SetChPriority(en_dma_priority_t enPrio);
///< 获取指定DMA通道的状态.
en_dma_stat_t Dma_GetStat(en_dma_channel_t enCh);
///< 清除指定DMA通道的状态值.
void Dma_ClrStat(en_dma_channel_t enCh);
///<设定指定通道源地址
void Dma_SetSourceAddress(en_dma_channel_t enCh, uint32_t u32Address);
///<设定指定通道目标地址.
void Dma_SetDestinationAddress(en_dma_channel_t enCh, uint32_t u32Address);
//@} // DmacGroup
#ifdef __cplusplus
}
#endif
#endif /* __DMAC_H__ */
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

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/*************************************************************************************
* Copyright (C) 2016, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file flash.h
**
** FLASH API.
**
** - 2017-05-02 LuX V1.0
**
******************************************************************************/
#ifndef __FLASH_H__
#define __FLASH_H__
/******************************************************************************/
/* Include files */
/******************************************************************************/
#include "ddl.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup FlashGroup Flash Controller (Flash)
**
**
******************************************************************************/
//@{
/******************************************************************************
* Global type definitions
******************************************************************************/
/**
******************************************************************************
** \brief Flash
*****************************************************************************/
typedef enum en_flash_int_type
{
FlashPCInt = 0x01u, ///<擦写PC地址报警中断
FlashSlockInt = 0x02u, ///<擦写保护报警中断
} en_flash_int_type_t;
/**
******************************************************************************
** \brief Flash
*****************************************************************************/
typedef enum en_flash_waitcycle
{
FlashWaitCycle0 = 0u, ///< 读等待周期设置为0-即读周期为1当HCLK小于等于24MHz时
FlashWaitCycle1 = 1u, ///< 读等待周期设置为1-即读周期为2当HCLK大于24MHz时必须至少为1
FlashWaitCycle2 = 2u, ///< 读等待周期设置为2-即读周期为3当HCK大于48MHz时必须至少为2
} en_flash_waitcycle_t;
/**
******************************************************************************
** \brief Flash
*****************************************************************************/
typedef enum en_flash_lock
{
FlashLock0 = 0u, ///<LOCK0
FlashLock1 = 1u, ///<LOCK1
} en_flash_lock_t;
/**
******************************************************************************
** \brief Redefinition of FLASH register structure
******************************************************************************/
/******************************************************************************
* Global definitions
******************************************************************************/
/******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
///<Flash 初始化配置(中断函数、编程时间参数及休眠模式配置)
en_result_t Flash_Init(uint8_t u8FreqCfg, boolean_t bDpstbEn);
///<Flash 页/全片擦除
en_result_t Flash_SectorErase(uint32_t u32SectorAddr);
en_result_t Flash_ChipErase(void);
///<Flash 字节/半字/字写
en_result_t Flash_WriteByte(uint32_t u32Addr, uint8_t u8Data);
en_result_t Flash_WriteHalfWord(uint32_t u32Addr, uint16_t u16Data);
en_result_t Flash_WriteWord(uint32_t u32Addr, uint32_t u32Data);
///<Flash 编程保护加锁/解锁
void Flash_LockAll(void);
void Flash_UnlockAll(void);
en_result_t Flash_LockSet(en_flash_lock_t enLock, uint32_t u32LockValue);
///<Flash 读等待周期设定
en_result_t Flash_WaitCycle(en_flash_waitcycle_t enWaitCycle);
///<中断相关函数
///<中断使能/禁止
en_result_t Flash_EnableIrq(en_flash_int_type_t enFlashIntType);
en_result_t Flash_DisableIrq(en_flash_int_type_t enFlashIntType);
///<中断标志获取
boolean_t Flash_GetIntFlag(en_flash_int_type_t enFlashIntType);
///<中断标志清除
en_result_t Flash_ClearIntFlag(en_flash_int_type_t enFlashIntType);
//@} // FlashGroup
#ifdef __cplusplus
}
#endif
#endif /* __FLASH_H__ */
/******************************************************************************/
/* EOF (not truncated) */
/******************************************************************************/

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@ -0,0 +1,477 @@
/*******************************************************************************
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file gpio.h
**
** GPIO driver
** @link GPIO Group Some description @endlink
**
** - 2018-04-18
**
******************************************************************************/
#ifndef __GPIO_H__
#define __GPIO_H__
/*******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
*******************************************************************************
** \defgroup GpioGroup General Purpose I/O (GPIO)
**
**
******************************************************************************/
//@{
#define GPIO_GPSZ (0x40u)
/*******************************************************************************
* Global type definitions
******************************************************************************/
/**
*******************************************************************************
** \brief GPIO PORT
******************************************************************************/
typedef enum en_gpio_port
{
GpioPortA = 0x00u, ///< GPIO PORT A
GpioPortB = 0x40u, ///< GPIO PORT B
GpioPortC = 0x80u, ///< GPIO PORT C
GpioPortD = 0xc0u, ///< GPIO PORT D
GpioPortE = 0x1000u, ///< GPIO PORT E
GpioPortF = 0x1040u, ///< GPIO PORT F
}en_gpio_port_t;
/**
*******************************************************************************
** \brief GPIO PIN
******************************************************************************/
typedef enum en_gpio_pin
{
GpioPin0 = 0u, ///< GPIO PIN0
GpioPin1 = 1u, ///< GPIO PIN1
GpioPin2 = 2u, ///< GPIO PIN2
GpioPin3 = 3u, ///< GPIO PIN3
GpioPin4 = 4u, ///< GPIO PIN4
GpioPin5 = 5u, ///< GPIO PIN5
GpioPin6 = 6u, ///< GPIO PIN6
GpioPin7 = 7u, ///< GPIO PIN7
GpioPin8 = 8u, ///< GPIO PIN8
GpioPin9 = 9u, ///< GPIO PIN9
GpioPin10 = 10u, ///< GPIO PIN10
GpioPin11 = 11u, ///< GPIO PIN11
GpioPin12 = 12u, ///< GPIO PIN12
GpioPin13 = 13u, ///< GPIO PIN13
GpioPin14 = 14u, ///< GPIO PIN14
GpioPin15 = 15u, ///< GPIO PIN15
}en_gpio_pin_t;
/**
*******************************************************************************
** \brief GPIO (AF-Alternate function)
** \note GPIO
******************************************************************************/
typedef enum en_gpio_af
{
GpioAf0 = 0u, ///< GPIO功能
GpioAf1 = 1u, ///< GPIO AF1:复用功能1
GpioAf2 = 2u, ///< GPIO AF2:复用功能2
GpioAf3 = 3u, ///< GPIO AF3:复用功能3
GpioAf4 = 4u, ///< GPIO AF4:复用功能4
GpioAf5 = 5u, ///< GPIO AF5:复用功能5
GpioAf6 = 6u, ///< GPIO AF6:复用功能6
GpioAf7 = 7u, ///< GPIO AF7:复用功能7
}en_gpio_af_t;
/**
*******************************************************************************
** \brief GPIO
******************************************************************************/
typedef enum en_gpio_dir
{
GpioDirOut = 0u, ///< GPIO 输出
GpioDirIn = 1u, ///< GPIO 输入
}en_gpio_dir_t;
/**
*******************************************************************************
** \brief GPIO
******************************************************************************/
typedef enum en_gpio_pu
{
GpioPuDisable = 0u, ///< GPIO无上拉
GpioPuEnable = 1u, ///< GPIO上拉
}en_gpio_pu_t;
/**
*******************************************************************************
** \brief GPIO
******************************************************************************/
typedef enum en_gpio_pd
{
GpioPdDisable = 0u, ///< GPIO无下拉
GpioPdEnable = 1u, ///< GPIO下拉
}en_gpio_pd_t;
/**
*******************************************************************************
** \brief GPIO
******************************************************************************/
typedef enum en_gpio_drv
{
GpioDrvH = 0u, ///< GPIO高驱动能力
GpioDrvL = 1u, ///< GPIO低驱动能力
}en_gpio_drv_t;
/**
*******************************************************************************
** \brief GPIO
******************************************************************************/
typedef enum en_gpio_od
{
GpioOdDisable = 0u, ///< GPIO开漏输出关闭
GpioOdEnable = 1u, ///< GPIO开漏输出使能
}en_gpio_od_t;
/**
*******************************************************************************
** \brief GPIO/线
******************************************************************************/
typedef enum en_gpio_ctrl_mode
{
GpioFastIO = 0u, ///< FAST IO 总线控制模式
GpioAHB = 1u, ///< AHB 总线控制模式
}en_gpio_ctrl_mode_t;
/**
*******************************************************************************
** \brief GPIO
******************************************************************************/
typedef enum en_gpio_irqtype
{
GpioIrqHigh = 0u, ///< GPIO高电平触发
GpioIrqLow = 1u, ///< GPIO低电平触发
GpioIrqRising = 2u, ///< GPIO上升沿触发
GpioIrqFalling = 3u, ///< GPIO下降沿触发
}en_gpio_irqtype_t;
/**
*******************************************************************************
** \brief GPIO SF-Secondary Function
******************************************************************************/
typedef enum en_gpio_sf_irqmode
{
GpioSfIrqDpslpMode = 1u, ///< Deep Sleep模式
GpioSfIrqActSlpMode = 0u, ///< Active/Sleep模式
}en_gpio_sf_irqmode_t;
/**
*******************************************************************************
** \brief GPIO SF-Secondary FunctionHCLK
******************************************************************************/
typedef enum en_gpio_sf_hclkout_g
{
GpioSfHclkOutDisable = 0u, ///< HCLK输出门控关闭
GpioSfHclkOutEnable = 1u, ///< HCLK输出门控使能
}en_gpio_sf_hclkout_g_t;
/**
*******************************************************************************
** \brief GPIO SF-Secondary FunctionHCLK
******************************************************************************/
typedef enum en_gpio_sf_hclkout_div
{
GpioSfHclkOutDiv1 = 0u, ///< HCLK
GpioSfHclkOutDiv2 = 1u, ///< HCLK/2
GpioSfHclkOutDiv4 = 2u, ///< HCLK/4
GpioSfHclkOutDiv8 = 3u, ///< HCLK/8
}en_gpio_sf_hclkout_div_t;
/**
*******************************************************************************
** \brief GPIO SF-Secondary FunctionPCLK
******************************************************************************/
typedef enum en_gpio_sf_pclkout_g
{
GpioSfPclkOutDisable = 0u, ///< PCLK输出门控关闭
GpioSfPclkOutEnable = 1u, ///< PCLK输出门控使能
}en_gpio_sf_pclkout_g_t;
/**
*******************************************************************************
** \brief GPIO SF-Secondary FunctionPCLK
******************************************************************************/
typedef enum en_gpio_sf_pclkout_div
{
GpioSfPclkOutDiv1 = 0u, ///< PCLK
GpioSfPclkOutDiv2 = 1u, ///< PCLK/2
GpioSfPclkOutDiv4 = 2u, ///< PCLK/4
GpioSfPclkOutDiv8 = 3u, ///< PCLK/8
}en_gpio_sf_pclkout_div_t;
/**
*******************************************************************************
** \brief GPIO SF-Secondary FunctionIR
******************************************************************************/
typedef enum en_gpio_sf_irpol
{
GpioSfIrP = 0u, ///< IR正向输出
GpioSfIrN = 1u, ///< IR反向输出
}en_gpio_sf_irpol_t;
/**
*******************************************************************************
** \brief GPIO SF-Secondary FunctionSSN
******************************************************************************/
typedef enum en_gpio_sf_ssnspi
{
GpioSpi0 = 0u, ///< SPI0 SSN
GpioSpi1 = 1u, ///< SPI1 SSN
}en_gpio_sf_ssnspi_t;
/**
*******************************************************************************
** \brief GPIO SF-Secondary FunctionSSN
******************************************************************************/
typedef enum en_gpio_sf_ssn_extclk
{
GpioSfSsnExtClkH = 0u, ///< 高电平
GpioSfSsnExtClkPA03 = 1u, ///< PA03
GpioSfSsnExtClkPA04 = 2u, ///< PA04
GpioSfSsnExtClkPA06 = 3u, ///< PA06
GpioSfSsnExtClkPA08 = 4u, ///< PA08
GpioSfSsnExtClkPA09 = 5u, ///< PA09
GpioSfSsnExtClkPA12 = 6u, ///< PA12
GpioSfSsnExtClkPA15 = 7u, ///< PA15
GpioSfSsnExtClkPB01 = 8u, ///< PB01
GpioSfSsnExtClkPB02 = 9u, ///< PB02
GpioSfSsnExtClkPB05 = 10u, ///< PB05
GpioSfSsnExtClkPB06 = 11u, ///< PB06
GpioSfSsnExtClkPB09 = 12u, ///< PB09
GpioSfSsnExtClkPB10 = 13u, ///< PB10
GpioSfSsnExtClkPB12 = 14u, ///< PB12
GpioSfSsnExtClkPB14 = 15u, ///< PB14
}en_gpio_sf_ssn_extclk_t;
/**
*******************************************************************************
** \brief GPIO SF-Secondary Function
** \note GPIO
******************************************************************************/
typedef enum en_gpio_sf
{
GpioSf0 = 0u, ///< SF0:PX_SEL的配置功能
GpioSf1 = 1u, ///< SF1:辅助功能1
GpioSf2 = 2u, ///< SF2:辅助功能2
GpioSf3 = 3u, ///< SF3:辅助功能3
GpioSf4 = 4u, ///< SF4:辅助功能4
GpioSf5 = 5u, ///< SF5:辅助功能5
GpioSf6 = 6u, ///< SF6:辅助功能6
GpioSf7 = 7u, ///< SF7:辅助功能7
}en_gpio_sf_t;
/**
*******************************************************************************
** \brief GPIO SF-Secondary Function
******************************************************************************/
typedef enum en_gpio_sf_tim_g
{
GpioSfTim0G = 0u, ///<Tim0定时器GATE输入选择
GpioSfTim1G = 3u, ///<Tim1定时器GATE输入选择
GpioSfTim2G = 6u, ///<Tim2定时器GATE输入选择
GpioSfTim3G = 9u, ///<Tim3定时器GATE输入选择
GpioSfLpTim0G = 12u, ///<LPTim0定时器GATE输入选择
GpioSfLpTim1G = 38u, ///<LPTim1定时器GATE输入选择
}en_gpio_sf_tim_g_t;
/**
*******************************************************************************
** \brief GPIO SF-Secondary FunctionETR
******************************************************************************/
typedef enum en_gpio_sf_tim_e
{
GpioSfTim0E = 0u, ///<Tim0定时器ETR输入选择
GpioSfTim1E = 3u, ///<Tim1定时器ETR输入选择
GpioSfTim2E = 6u, ///<Tim2定时器ETR输入选择
GpioSfTim3E = 9u, ///<Tim3定时器ETR输入选择
GpioSfLpTim0E = 12u, ///<LPTim0定时器ETR输入选择
GpioSfLpTim1E = 41u, ///<LPTim1定时器ETR输入选择
}en_gpio_sf_tim_e_t;
/**
*******************************************************************************
** \brief GPIO SF-Secondary Function
******************************************************************************/
typedef enum en_gpio_sf_tim_c
{
GpioSfTim0CA = 0u, ///<Tim0定时器CHA输入选择
GpioSfTim1CA = 3u, ///<Tim1定时器CHA输入选择
GpioSfTim2CA = 6u, ///<Tim2定时器CHA输入选择
GpioSfTim3CA = 9u, ///<Tim3定时器CH0A输入选择
GpioSfTim3CB = 12u, ///<Tim3定时器CH0B输入选择
}en_gpio_sf_tim_c_t;
/**
*******************************************************************************
** \brief GPIO SF-Secondary FunctionPCA
******************************************************************************/
typedef enum en_gpio_sf_pca
{
GpioSfPcaCH0 = 0u, ///<PCA_CH0捕获口输入选择
GpioSfPcaECI = 3u, ///<PCA ECI时钟输入选择
}en_gpio_sf_pca_t;
/**
*******************************************************************************
** \brief GPIO SF-Secondary FunctionPCNT
******************************************************************************/
typedef enum en_gpio_sf_pcnt
{
GpioSfPcntS0 = 0u, ///<PCNT_S0输入选择
GpioSfPcntS1 = 3u, ///<PCNT_S1输入选择
}en_gpio_sf_pcnt_t;
/**
*******************************************************************************
** \brief GPIO
******************************************************************************/
typedef struct
{
boolean_t bOutputVal; ///< 默认端口输出电平
en_gpio_dir_t enDir; ///< 端口方向配置
en_gpio_drv_t enDrv; ///< 端口驱动能力配置
en_gpio_pu_t enPu; ///< 端口上拉配置
en_gpio_pd_t enPd; ///< 端口下拉配置
en_gpio_od_t enOD; ///< 端口开漏输出配置
en_gpio_ctrl_mode_t enCtrlMode; ///< 端口输入/输出值寄存器总线控制模式配置
}stc_gpio_cfg_t;
/*******************************************************************************
* Global definitions
******************************************************************************/
/******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/******************************************************************************
Global function prototypes (definition in C source)
*******************************************************************************/
///< GPIO IO初始化/去初始化
en_result_t Gpio_Init(en_gpio_port_t enPort, en_gpio_pin_t enPin, stc_gpio_cfg_t *pstcGpioCfg);
///< GPIO 获取端口输入电平
boolean_t Gpio_GetInputIO(en_gpio_port_t enPort, en_gpio_pin_t enPin);
uint16_t Gpio_GetInputData(en_gpio_port_t enPort);
///< GPIO 设置端口输出
///< GPIO 端口输出电平配置及获取
en_result_t Gpio_WriteOutputIO(en_gpio_port_t enPort, en_gpio_pin_t enPin, boolean_t bVal);
boolean_t Gpio_ReadOutputIO(en_gpio_port_t enPort, en_gpio_pin_t enPin);
///< GPIO 端口/引脚输出电平置位
en_result_t Gpio_SetPort(en_gpio_port_t enPort, uint16_t u16ValMsk);
en_result_t Gpio_SetIO(en_gpio_port_t enPort, en_gpio_pin_t enPin);
///< GPIO 端口/引脚输出电平清零
en_result_t Gpio_ClrPort(en_gpio_port_t enPort, uint16_t u16ValMsk);
en_result_t Gpio_ClrIO(en_gpio_port_t enPort, en_gpio_pin_t enPin);
///< GPIO 端口输出电平置位与清零设置
en_result_t Gpio_SetClrPort(en_gpio_port_t enPort, uint32_t u32ValMsk);
///< GPIO 设置端口为模拟功能
en_result_t Gpio_SetAnalogMode(en_gpio_port_t enPort, en_gpio_pin_t enPin);
///< GPIO 设置端口为端口复用功能
en_result_t Gpio_SetAfMode(en_gpio_port_t enPort, en_gpio_pin_t enPin, en_gpio_af_t enAf);
///< GPIO 端口中断控制功能使能/关闭
en_result_t Gpio_EnableIrq(en_gpio_port_t enPort, en_gpio_pin_t enPin, en_gpio_irqtype_t enType);
en_result_t Gpio_DisableIrq(en_gpio_port_t enPort, en_gpio_pin_t enPin, en_gpio_irqtype_t enType);
///< GPIO 中断状态获取
boolean_t Gpio_GetIrqStatus(en_gpio_port_t enPort, en_gpio_pin_t enPin);
///< GPIO 中断标志清除
en_result_t Gpio_ClearIrq(en_gpio_port_t enPort, en_gpio_pin_t enPin);
///< GPIO 端口辅助功能配置
///< GPIO 中断模式配置
en_result_t Gpio_SfIrqModeCfg(en_gpio_sf_irqmode_t enIrqMode);
///< GPIO IR输出极性配置
en_result_t Gpio_SfIrPolCfg(en_gpio_sf_irpol_t enIrPolMode);
///< GPIO HCLK输出配置
en_result_t Gpio_SfHClkOutputCfg(en_gpio_sf_hclkout_g_t enGate, en_gpio_sf_hclkout_div_t enDiv);
///< GPIO PCLK输出配置
en_result_t Gpio_SfPClkOutputCfg(en_gpio_sf_pclkout_g_t enGate, en_gpio_sf_pclkout_div_t enDiv);
///< GPIO 外部时钟输入配置
en_result_t Gpio_SfExtClkCfg(en_gpio_sf_ssn_extclk_t enExtClk);
///< GPIO SPI SSN输入配置
en_result_t Gpio_SfSsnCfg(en_gpio_sf_ssnspi_t enSpi, en_gpio_sf_ssn_extclk_t enSsn);
///< GPIO Timer 门控输入配置
en_result_t Gpio_SfTimGCfg(en_gpio_sf_tim_g_t enTimG, en_gpio_sf_t enSf);
///< GPIO Timer ETR选择配置
en_result_t Gpio_SfTimECfg(en_gpio_sf_tim_e_t enTimE, en_gpio_sf_t enSf);
///< GPIO Timer 捕获输入配置
en_result_t Gpio_SfTimCCfg(en_gpio_sf_tim_c_t enTimC, en_gpio_sf_t enSf);
///< GPIO PCA捕获选择配置
en_result_t Gpio_SfPcaCfg(en_gpio_sf_pca_t enPca, en_gpio_sf_t enSf);
///< GPIO PCNT捕获选择配置
en_result_t Gpio_SfPcntCfg(en_gpio_sf_pcnt_t enPcnt, en_gpio_sf_t enSf);
//@} // GpioGroup
#ifdef __cplusplus
}
#endif
#endif /* __GPIO_H__ */
/******************************************************************************
* EOF (not truncated)
******************************************************************************/

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/******************************************************************************
* Copyright (C) 2016, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file hdiv.h
**
** HDIV API.
**
** - 2016-05-04 LuX V1.0.
**
******************************************************************************/
#ifndef __HDIV_H__
#define __HDIV_H__
/******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup (HDIV)
**
******************************************************************************/
//@{
/******************************************************************************
* Global type definitions
******************************************************************************/
/******************************************************************************
* Global definitions
******************************************************************************/
/******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
typedef struct stc_div_unsigned_result
{
uint32_t Quotient;
uint32_t Remainder;
}stc_div_unsigned_result_t;
typedef struct stc_div_signed_result
{
int32_t Quotient;
int32_t Remainder;
}stc_div_signed_result_t;
/******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
//HDIV
en_result_t Hdiv_Unsigned(uint32_t Dividend,uint16_t Divisor,stc_div_unsigned_result_t* stcDivResult);
en_result_t Hdiv_Signed(int32_t Dividend,int16_t Divisor,stc_div_signed_result_t* stcDivResult);
boolean_t Hdiv_GetEndState(void);
boolean_t Hdiv_GetZeroState(void);
//@} // HDIV Group
#ifdef __cplusplus
}
#endif
#endif /* __HDIV_H__ */
/******************************************************************************
* EOF (not truncated)
******************************************************************************/

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/******************************************************************************
* Copyright (C) 2017, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/*****************************************************************************/
/** \file i2c.h
**
** Headerfile for I2C functions
**
**
** History:
** - 2018-03-1 CJ First Version
**
*****************************************************************************/
#ifndef __I2C_H__
#define __I2C_H__
#include "ddl.h"
/**
*******************************************************************************
** \defgroup I2cGroup Inter-Integrated Circuit (I2C)
**
**
******************************************************************************/
//@{
/******************************************************************************/
/* Global pre-processor symbols/macros ('#define') */
/******************************************************************************/
/******************************************************************************
* Global type definitions
******************************************************************************/
/**
******************************************************************************
** \brief I2C
*****************************************************************************/
typedef enum en_i2c_func
{
I2cModule_En = 6u, ///<I2C模块使能
I2cStart_En = 5u, ///<开始信号
I2cStop_En = 4u, ///<结束信号
I2cAck_En = 2u, ///<应答信号
I2cHlm_En = 0u, ///<高速使能
}en_i2c_func_t;
/**
******************************************************************************
** \brief I2C
*****************************************************************************/
typedef enum en_i2c_mode
{
I2cMasterMode = 0x40u, ///<I2C主机模式
I2cSlaveMode = 0x44u, ///<I2C从机模式
}en_i2c_mode_t;
/**
******************************************************************************
** \brief I2C
*****************************************************************************/
typedef struct stc_i2c_cfg
{
uint32_t u32Pclk; ///<Pclk 设置(Hz)
uint32_t u32Baud; ///<I2C通信波特率(Hz)
en_i2c_mode_t enMode; ///<I2C主从模式配置
uint8_t u8SlaveAddr; ///<从机地址配置(如果需要)
boolean_t bGc; ///<广播地址使能(如果需要)
}stc_i2c_cfg_t;
/******************************************************************************
* Global variable declarations ('extern', definition in C source)
*****************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
*****************************************************************************/
//I2C初始化函数
en_result_t I2C_Init(M0P_I2C_TypeDef* I2Cx,stc_i2c_cfg_t *pstcI2CCfg);
//设置波特率配置寄存器
en_result_t I2C_SetBaud(M0P_I2C_TypeDef* I2Cx,uint8_t u8Tm);
//I2C功能设置函数
en_result_t I2C_SetFunc(M0P_I2C_TypeDef* I2Cx,en_i2c_func_t enFunc);
//I2C功能清除函数
en_result_t I2C_ClearFunc(M0P_I2C_TypeDef* I2Cx,en_i2c_func_t enFunc);
//获取中断标记SI
boolean_t I2C_GetIrq(M0P_I2C_TypeDef* I2Cx);
//清除中断标记SI
en_result_t I2C_ClearIrq(M0P_I2C_TypeDef* I2Cx);
//获取状态
uint8_t I2C_GetState(M0P_I2C_TypeDef* I2Cx);
//字节写函数
en_result_t I2C_WriteByte(M0P_I2C_TypeDef* I2Cx,uint8_t u8Data);
//字节读函数
uint8_t I2C_ReadByte(M0P_I2C_TypeDef* I2Cx);
//@} // I2cGroup
#ifdef __cplusplus
#endif
#endif /* __I2C_H__ */
/******************************************************************************
* EOF (not truncated)
*****************************************************************************/

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/******************************************************************************
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file i2s.h
**
** Header file for i2s Converter functions
** @link I2S Group Some description @endlink
**
** - 2019-07-05 lsq First Version
**
******************************************************************************/
#ifndef __I2S_H__
#define __I2S_H__
/******************************************************************************/
/* Include files */
/******************************************************************************/
#include "ddl.h"
/**
******************************************************************************
** \brief
******************************************************************************/
#define I2S_IT_TXE ((uint8_t)7) // the TXEIE of I2Sx_CR
#define I2S_IT_RXNEIE ((uint8_t)6) // the RXNEI of I2Sx_CR
#define I2S_IT_ERRIE ((uint8_t)5) // the ERRIE of I2Sx_CR
#define I2S_RDMA_EN ((uint8_t)1) // the RDMA of I2Sx_CR
#define I2S_LDMA_EN ((uint8_t)0) // the LDMA of I2Sx_CR
#define I2S_RXNE_L ((uint8_t)0) // the RXNE_L of I2Sx_SR
#define I2S_TXE_L ((uint8_t)1) // the TXE_L of I2Sx_SR
#define I2S_UDR_L ((uint8_t)2) // the UDR_L of I2Sx_SR
#define I2S_UDR_R ((uint8_t)3) // the UDR_R of I2Sx_SR
#define I2S_OVR_L ((uint8_t)6) // the OVR_L of I2Sx_SR
#define I2S_BSY ((uint8_t)7) // the BSY of I2Sx_SR
#define I2S_FRE ((uint8_t)8) // the FRE of I2Sx_SR
#define I2S_OVR_R ((uint8_t)13)// the OVR_R of I2Sx_SR
#define I2S_RXNE_R ((uint8_t)14)// the RXNE_R of I2Sx_SR
#define I2S_TXE_R ((uint8_t)15)// the TXE_R of I2Sx_SR
#define I2S_FLAG_UDF ((uint8_t)3) // the UDF of I2Sx_ICR
#define I2S_FLAG_OVR ((uint8_t)6) // the OVR of I2Sx_ICR
#define I2S_FLAG_FRE ((uint8_t)8) // the FRE of I2Sx_ICR
/**
******************************************************************************
** \brief
******************************************************************************/
#define I2S_AudioFreq_192k (uint32_t)192000u // 192khz
#define I2S_AudioFreq_96k (uint32_t)96000u // 96khz
#define I2S_AudioFreq_48k (uint32_t)48000u // 48khz
#define I2S_AudioFreq_44k (uint32_t)44100u // 44.1khz
#define I2S_AudioFreq_32k (uint32_t)32000u // 32khz
#define I2S_AudioFreq_22k (uint32_t)22050u // 22khz
#define I2S_AudioFreq_16k (uint32_t)16000u // 16khz
#define I2S_AudioFreq_11k (uint32_t)11025u // 11.025khz
#define I2S_AudioFreq_8k (uint32_t)8000u // 8khz
/**
******************************************************************************
** \brief 使
******************************************************************************/
typedef enum
{
DISABLE = 0, //禁止
ENABLE = 1 //使能
}en_en_state_t;
/**
******************************************************************************
** \brief
******************************************************************************/
typedef enum
{
RESET = 0,
SET = !RESET
}en_flag_status_t;
/**
******************************************************************************
** \brief I2S
******************************************************************************/
typedef enum
{
I2S0 = 0u, // I2S通道0
I2S1 = 1u, // I2S通道1
}en_i2s_channel_t;
/**
******************************************************************************
** \brief I2S 使
******************************************************************************/
typedef enum
{
I2sEnable = 1u, // I2S模块使能
I2sDisable = 0u, // I2S模块禁止
}en_i2s_en_t;
/**
******************************************************************************
** \brief I2S
******************************************************************************/
typedef enum
{
I2sSlaveSend = 0u, //从模式发送
I2sSlaveRec = 1u, //从模式接收
I2sMasterSend = 2u, //主模式发送
I2sMasterRec = 3u, //主模式接收
}en_spi_mode_t;
/**
******************************************************************************
** \brief I2S PCMSYNC
******************************************************************************/
typedef enum
{
I2sPcmsyncShort = 0u, //短帧同步
I2sPcmsyncLong = 1u //长帧同步
}en_i2s_pcmsync_t;
/**
******************************************************************************
** \brief I2S
******************************************************************************/
typedef enum
{
I2sPclk = 0u, //主模式下I2S时钟PCLLK
I2sHclk = 1u //主模式下I2S时钟HCLLK
}en_i2s_cksel_t;
/**
******************************************************************************
** \brief I2S
******************************************************************************/
typedef enum
{
i2sstdPhilips = 0u, //I2S Philips标准
i2sstdMSBL = 1u, //MSB对齐标准(左对齐)
i2sstdLSBR = 2u, //LSB对齐标准(右对齐)
i2sstdPCM = 3u //PCM标准
}en_i2s_i3sstd_t;
/**
******************************************************************************
** \brief I2S
******************************************************************************/
typedef enum
{
i2sDatlen16Bit = 0u, //16位数据长度
i2sDatlen24Bit = 1u, //24位数据长度
i2sDatlen32Bit = 2u //32位数据长度
}en_i2s_datlen_t;
/**
******************************************************************************
** \brief I2S
******************************************************************************/
typedef enum
{
i2sChlen16Bit = 0u, //通道数据长度16位
i2sChlen32Bit = 1u //通道数据长度32位
}en_i2s_chlen_t;
/**
*******************************************************************************
** \brief I2S
******************************************************************************/
typedef struct
{
en_spi_mode_t i2s_Mode; //I2S 模式配置位
en_i2s_pcmsync_t i2s_PcmSync; //I2S 帧同步
en_i2s_cksel_t i2s_Cksel; //I2S 主模式下始终选择0PCLK 1:HCLK
en_i2s_i3sstd_t i2s_Std; //I2S 标准选择 0I2S Philips 1:MAS左对齐 2LSB右对齐 3PCM标准
en_i2s_datlen_t i2s_Datalen; //I2S 要传输的数据长度
en_i2s_chlen_t i2s_Chlen; //I2S 每个音频通道的位数016位 132位
en_en_state_t i2s_Mckoe; //I2S 主时钟MCK输出使能
uint32_t i2s_AudioFreq; //I2S audio frequecy
uint8_t i2s_Div; //I2S PR寄存器的DIV位数8位线性预分频器
uint8_t i2s_Odd; //I2S PR寄存器的ODD位数1位预分频器的奇数因子
uint8_t i2s_Fract; //I2S PR寄存器的FRACT小数分频位数6位
}stc_i2s_config_t;
/*******************************************************************************
** \brief I2Sx
******************************************************************************/
extern void I2S_ConfIt(M0P_I2S_TypeDef *i2sx, uint8_t i2s_it, en_en_state_t NewState);
extern void I2s_ConfDma(M0P_I2S_TypeDef *i2sx, uint8_t rl_dma_en, en_en_state_t NewState);
extern en_flag_status_t I2s_GetStatus(M0P_I2S_TypeDef *i2sx, uint8_t i2s_status);
extern void I2s_ClearITPendingBit(M0P_I2S_TypeDef *i2sx, uint8_t i2s_it_flag);
extern void I2s_SendDataL(M0P_I2S_TypeDef *i2sx, uint16_t Data);
extern void I2s_SendDataR(M0P_I2S_TypeDef *i2sx, uint16_t Data);
extern uint16_t I2s_ReceiveDataL(M0P_I2S_TypeDef *i2sx);
extern uint16_t I2s_ReceiveDataR(M0P_I2S_TypeDef *i2sx);
extern void I2s_Init(M0P_I2S_TypeDef *i2sx, stc_i2s_config_t *i2s_conf);
extern void I2S_Cmd(M0P_I2S_TypeDef *i2sx, en_en_state_t NewState);
#endif //__I2S_H__
/******************************************************************************/
/* EOF (not truncated) */
/******************************************************************************/

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/******************************************************************************
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file lcd.h
**
** Header file for lcd Converter functions
** @link LCD Group Some description @endlink
**
** - 2019-04-02 First Version
**
******************************************************************************/
#ifndef __LCD_H__
#define __LCD_H__
/******************************************************************************/
/* Include files */
/******************************************************************************/
#include "ddl.h"
/******************************************************************************
** Global type definitions
*****************************************************************************/
/**
******************************************************************************
** \brief LCD bias
*****************************************************************************/
typedef enum
{
LcdInResHighPower = 6,//内部电阻分压,大功耗模式
LcdInResLowPower = 4,//内部电阻分压,小功耗模式
LcdInResMidPower = 2,//内部电阻分压,中功耗模式
LcdExtCap = 1,//电容分压模式,需要外部电路配合
LcdExtRes = 0,//外部电阻模式,需要外部电路配合
}en_lcd_biassrc_t;
/**
******************************************************************************
** \brief LCD duty LCD_CR0 Duty
*****************************************************************************/
typedef enum
{
LcdStatic = 0u, // 静态显示
LcdDuty2 = 1u, // 1/2duty
LcdDuty3 = 2u, // 1/3duty
LcdDuty4 = 3u, // 1/4duty
LcdDuty6 = 5u, // 1/6duty
LcdDuty8 = 7u, // 1/8duty
}en_lcd_duty_t;
/**
******************************************************************************
** \brief LCD bias LCD_CR0 Bias
*****************************************************************************/
typedef enum
{
LcdBias3 = 0u, // 1/3 BIAS
LcdBias2 = 1u, // 1/2 BIAS
}en_lcd_bias_t;
/**
******************************************************************************
** \brief LCD LCD_CR0 CpClk
*****************************************************************************/
typedef enum
{
LcdClk2k = 0u, // 2k
LcdClk4k = 1u, // 4k
LcdClk8k = 2u, // 8k
LcdClk16k = 3u // 16k
}en_lcd_cpclk_t;
/**
******************************************************************************
** \brief LCD LCD_CR0 LcdClk
*****************************************************************************/
typedef enum
{
LcdClk64hz = 0u, // 64hz
LcdClk128hz = 1u, // 128hz
LcdClk256hz = 2u, // 256hz
LcdClk512hz = 3u // 512hz
}en_lcd_scanclk_t;
/**
******************************************************************************
** \brief LCD 使 LCD_CR0 EN
*****************************************************************************/
typedef enum
{
LcdEnable =1u, //LCD使能
LcdDisable =0u //LCD禁止
}en_lcd_en_t;
/**
******************************************************************************
** \brief LCD LCD_CR1 Mode
*****************************************************************************/
typedef enum
{
LcdMode0 = 0,///<模式0
LcdMode1 = 1,///<模式1
}en_lcd_dispmode_t;
/**
******************************************************************************
** \brief LCD LCD_CR1 ClkSrc
*****************************************************************************/
typedef enum
{
LcdXTL = 1,///<外部XTL
LcdRCL = 0,///<内部RCL
}en_lcd_clk_t;
/**
******************************************************************************
** \brief LCD CR1使
*****************************************************************************/
typedef enum
{
LcdBlinkEn = 6u, //LCD闪屏配置位
LcdIe = 9u, //LCD 中断使能位
LcdDmaEn = 10u, //LCD DMA硬件触发使能位
}en_cr1_t;
/**
******************************************************************************
** \brief LCDSEG COM
*****************************************************************************/
typedef struct
{
uint32_t u32Seg0_31; ///<SEG0-31配置
union{
uint32_t seg32_51_com0_8;
struct
{
uint32_t Seg32_35 :4;
uint32_t Seg36Com7 :1;
uint32_t Seg37Com6 :1;
uint32_t Seg38Com5 :1;
uint32_t Seg39Com4 :1;
uint32_t Seg40 :1;
uint32_t Seg41 :1;
uint32_t Seg42 :1;
uint32_t Seg43 :1;
uint32_t Mux :1;
uint32_t Seg44 :1;
uint32_t Seg45 :1;
uint32_t Seg46 :1;
uint32_t Seg47 :1;
uint32_t Seg48 :1;
uint32_t Seg49 :1;
uint32_t Seg50 :1;
uint32_t Seg51 :1;
uint32_t Com0_3 :4;
}segcom_bit;
}stc_seg32_51_com0_8_t;
}stc_lcd_segcom_t;
/**
******************************************************************************
** \brief LCD
*****************************************************************************/
typedef struct stc_lcd_segcompara
{
en_lcd_duty_t LcdDuty; ///<占空比
en_lcd_biassrc_t LcdBiasSrc; ///<时钟源
uint8_t u8MaxSeg; ///<最大SEG口
}stc_lcd_segcompara_t;
/**
******************************************************************************
** \brief I2C
*****************************************************************************/
typedef struct
{
en_lcd_biassrc_t LcdBiasSrc; //偏置源选择
en_lcd_duty_t LcdDuty; //duty配置选择
en_lcd_bias_t LcdBias; //偏压选择
en_lcd_cpclk_t LcdCpClk; //电压泵时钟频率选择
en_lcd_scanclk_t LcdScanClk; //扫描频率选择
en_lcd_dispmode_t LcdMode; //显示模式选择
en_lcd_clk_t LcdClkSrc; //时钟源选择
en_lcd_en_t LcdEn; //LCD使能
}stc_lcd_cfg_t;
/*******************************************************************************
** \brief lcd
******************************************************************************/
extern boolean_t Lcd_GetItStatus(void);
extern void Lcd_ClearItPendingBit(void);
extern en_result_t Lcd_GetSegCom(stc_lcd_segcompara_t *pstcSegComPara,stc_lcd_segcom_t *pstcSegCom);
extern void Lcd_SetSegCom(stc_lcd_segcom_t *pstcSegCom);
extern void Lcd_Init(stc_lcd_cfg_t *pstcLcdCfg);
extern void Lcd_FullDisp(void);
extern void Lcd_ClearDisp(void);
extern en_result_t Lcd_WriteRam(uint8_t u8Row,uint32_t u32Data);
//@} // LCDGroup
#ifdef __cplusplus
#endif
#endif /* __LCD_H__ */
/******************************************************************************
* EOF (not truncated)
*****************************************************************************/

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/******************************************************************************
* Copyright (C) 2017, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/*****************************************************************************/
/** \file lpm.h
**
** Lpm API
**
**
** History:
** - 2017-06-06 Lux V1.0
**
*****************************************************************************/
#ifndef __LPM_H__
#define __LPM_H__
/*****************************************************************************
* Include files
*****************************************************************************/
#include "ddl.h"
#ifdef __cplusplus
extern "C"
{
#endif
/**
*******************************************************************************
** \defgroup LpmGroup Low Power Management (LPM)
**
**
******************************************************************************/
//@{
/******************************************************************************
** Global pre-processor symbols/macros ('#define')
******************************************************************************/
/******************************************************************************
* Global type definitions
******************************************************************************/
/******************************************************************************
* Global variable declarations ('extern', definition in C source)
*****************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
*****************************************************************************/
///<功能配置及操作函数
///<进入普通休眠模式
void Lpm_GotoSleep(boolean_t bOnExit);
///<进入深度休眠模式
void Lpm_GotoDeepSleep(boolean_t bOnExit);
//@} // LpmGroup
#ifdef __cplusplus
#endif
#endif /* __LPM_H__ */
/******************************************************************************
* EOF (not truncated)
*****************************************************************************/

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/******************************************************************************
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/*****************************************************************************/
/** \file lptim.h
**
**
**
**
** History:
** - 2019-04-09 First version
**
*****************************************************************************/
#ifndef __LPTIM_H__
#define __LPTIM_H__
/*****************************************************************************
* Include files
*****************************************************************************/
#include "ddl.h"
#ifdef __cplusplus
extern "C"
{
#endif
/**
*******************************************************************************
** \brief LPTIMx
** \note LPTIMx_CR PRS
******************************************************************************/
typedef enum
{
LptimPrsDiv1 = 0, // 1分频
LptimPrsDiv2 = 1, // 2分频
LptimPrsDiv4 = 2, // 4分频
LptimPrsDiv8 = 3, // 8分频
LptimPrsDiv16 = 4, // 16分频
LptimPrsDiv32 = 5, // 32分频
LptimPrsDiv64 = 6, // 64分频
LptimPrsDiv256 = 7 // 256分频
}en_lptim_prs_t;
/**
*******************************************************************************
** \brief LPTIMx
** \note LPTIMx_CR TCK_SEL
******************************************************************************/
typedef enum
{
LptimPclk = 0,
LptimXtl = 2,
LptimRcl = 3
}en_lptim_tcksel_t;
/**
*******************************************************************************
** \brief LPTIMx GATE
** \note LPTIMx_CR GATE_P
******************************************************************************/
typedef enum
{
LptimGatePLow = 0,
LptimGatePHigh = 1
}en_lptim_gatep_t;
/**
*******************************************************************************
** \brief LPTIMx
** \note LPTIMx_CR GATE
******************************************************************************/
typedef enum
{
LptimGateLow = 0,
LptimGateHigh = 1
}en_lptim_gate_t;
/**
*******************************************************************************
** \brief LPTIMx TOG使
** \note LPTIMx_CR TOG
******************************************************************************/
typedef enum
{
LptimTogEnLow = 0,
LptimTogEnHigh = 1
}en_lptim_togen_t;
/**
*******************************************************************************
** \brief LPTIMx CT/
** \note LPTIMx_CR CT
******************************************************************************/
typedef enum
{
LptimTimerFun = 0, //警示器功能定时器使用TCK_SEL选择的时钟进行计数
LptimCntFun = 1 //计数器功能计数器使用外部输入的下降沿进行计数采样时钟使用TCK_SEL选择的时钟
}en_lptim_ct_t;
/**
*******************************************************************************
** \brief LPTIMx
** \note LPTIMx_CR MD
******************************************************************************/
typedef enum
{
LptimMode1 = 0, //模式1无重载16位计数器/定时器
LptimMode2 = 1 //模式2自动重载16位计数器/定时器
}en_lptim_md_t;
/**
*******************************************************************************
** \brief LPTIMx
** \note
******************************************************************************/
typedef struct
{
en_lptim_prs_t enPrs;
en_lptim_tcksel_t enTcksel;
en_lptim_gatep_t enGatep;
en_lptim_gate_t enGate;
en_lptim_togen_t enTogen;
en_lptim_ct_t enCt;
en_lptim_md_t enMd;
uint16_t u16Arr;
}stc_lptim_cfg_t;
/******************************************************************************
* Global variable declarations ('extern', definition in C source)
*****************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
*****************************************************************************/
extern void Lptim_ConfIt(M0P_LPTIMER_TypeDef* Lptimx, boolean_t NewStatus);
extern void Lptim_Cmd(M0P_LPTIMER_TypeDef* Lptimx, boolean_t NewStatus);
extern boolean_t Lptim_GetItStatus(M0P_LPTIMER_TypeDef* Lptimx);
extern void Lptim_ClrItStatus(M0P_LPTIMER_TypeDef* Lptimx);
extern en_result_t Lptim_Init(M0P_LPTIMER_TypeDef* Lptimx, stc_lptim_cfg_t* InitStruct);
#ifdef __cplusplus
#endif
#endif //__LPTIM_H__
/******************************************************************************
* EOF (not truncated)
*****************************************************************************/

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/******************************************************************************
* Copyright (C) 2017, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/*****************************************************************************/
/** \file lpuart.h
**
** Headerfile for LPUART functions
**
**
** History:
** - 2017-05-10 Cathy First Version
**
*****************************************************************************/
#ifndef __LPUART_H__
#define __LPUART_H__
/*****************************************************************************
* Include files
*****************************************************************************/
#include "ddl.h"
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup LPUartGroup Universal Asynchronous Receiver/Transmitter (LPUART)
**
******************************************************************************/
//@{
/******************************************************************************/
/* Global pre-processor symbols/macros ('#define') */
/******************************************************************************/
/******************************************************************************
* Global type definitions
******************************************************************************/
/**
******************************************************************************
**\brief LPuart
******************************************************************************/
/**
******************************************************************************
** \brief lpuart sclk
******************************************************************************/
typedef enum en_lpuart_sclk_sel
{
LPUartMskPclk = 0u<<11, ///<pclk
LPUartMskXtl = 2u<<11, ///<外部低速晶振
LPUartMskRcl = 3u<<11, ///<内部低速晶振
} en_lpuart_sclksel_t;
/**
******************************************************************************
** \brief lpuart/
******************************************************************************/
typedef enum en_lpuart_mmdorck
{
LPUartDataOrAddr = 0u, ///<多机模式时通过读写SBUF[8]决定帧为数据帧或地址帧
LPUartEven = 0x4u, ///<非多机模式偶校验
LPUartOdd = 0x8u, ///<非多机模式奇校验
}en_lpuart_mmdorck_t;
/**
******************************************************************************
** \brief lpuart
******************************************************************************/
typedef struct stc_lpuart_multimode
{
uint8_t u8SlaveAddr; ///<从机地址
uint8_t u8SaddEn; ///<从及地址掩码
}stc_lpuart_multimode_t;
/**
******************************************************************************
** \brief lpuart
******************************************************************************/
typedef enum en_lpuart_mode
{
LPUartMskMode0 = 0x00u, ///<模式0
LPUartMskMode1 = 0x40u, ///<模式1
LPUartMskMode2 = 0x80u, ///<模式2
LPUartMskMode3 = 0xc0u, ///<模式3
} en_lpuart_mode_t;
/**
******************************************************************************
** \brief lpuart stop
******************************************************************************/
typedef enum en_lpuart_stop
{
LPUart1bit = 0x0000u, ///<1位停止位
LPUart1_5bit = 0x4000u, ///<1.5位停止位
LPUart2bit = 0x8000u, ///<2位停止位
} en_lpuart_stop_t;
/**
******************************************************************************
** \brief lpuart 使
******************************************************************************/
typedef enum en_lpuart_func
{
LPUartRenFunc = 4u, ///<0-TX; ///<1-非mode0模式代表RX&TX ,mode0模式代表RX;
LPUartDmaRxFunc = 16u, ///<DMA接收功能
LPUartDmaTxFunc = 17u, ///<DMA发送功能
LPUartRtsFunc = 18u, ///<硬件流RTS功能
LPUartCtsFunc = 19u, ///<硬件流CTS功能
LPUartHdFunc = 22u, ///<单线半双工功能
}en_lpuart_func_t;
/**
******************************************************************************
** \brief lpuart使
******************************************************************************/
typedef enum en_lpuart_irq_sel
{
LPUartRxIrq = 0u, ///<接收中断使能
LPUartTxIrq = 1u, ///<发送中断使能
LPUartTxEIrq = 8u, ///<TX空中断使能
LPUartPEIrq = 13u, ///<奇偶校验中断使能
LPUartCtsIrq = 20u, ///<CTS信号翻转中断使能
LPUartFEIrq = 21u, ///<帧错误中断使能
}en_lpuart_irq_sel_t;
/**
******************************************************************************
** \brief lpuart
******************************************************************************/
typedef enum en_lpuart_status
{
LPUartRC = 0u, ///<接收数据完成标记
LPUartTC = 1u, ///<发送数据完成标记
LPUartFE = 2u, ///<帧错误标记
LPUartTxe = 3u, ///<TXbuff空标记
LPUartPE = 4u, ///<奇偶校验错误标记
LPUartCtsIf = 5u, ///<CTS中断标记
LPUartCts = 6u, ///<CTS信号标记
}en_lpuart_status_t;
/**
******************************************************************************
** \brief lpuart
******************************************************************************/
typedef enum en_lpuart_clkdiv
{
LPUartMsk16Or32Div = 0u, ///<模式0无效模式1/3为16分频模式2为32分频
LPUartMsk8Or16Div = 0x200u, ///<模式0无效模式1/3为8分频模式2为16分频
LPUartMsk4Or8Div = 0x400u, ///<模式0无效模式1/3为4分频模式2为8分频
}en_lpuart_clkdiv_t;
/**
******************************************************************************
** \brief lpuart Mode1Mode3
******************************************************************************/
typedef struct stc_lpuart_baud
{
en_lpuart_sclksel_t enSclkSel; ///<传输时钟源选择
en_lpuart_clkdiv_t enSclkDiv; ///<采样分频选择
uint32_t u32Sclk; ///<sclk
uint32_t u32Baud; ///< 波特率
} stc_lpuart_baud_t;
/**
******************************************************************************
** \lpuart
******************************************************************************/
typedef struct stc_lpuart_cfg
{
en_lpuart_mode_t enRunMode; ///<四种模式配置
en_lpuart_mmdorck_t enMmdorCk; ///<校验模式
en_lpuart_stop_t enStopBit; ///<停止位长度
stc_lpuart_baud_t stcBaud; ///<Mode1/3波特率配置
} stc_lpuart_cfg_t;
// 总初始化处理
en_result_t LPUart_Init(M0P_LPUART_TypeDef* LPUARTx, stc_lpuart_cfg_t* pstcCfg);
// LPUART 单线模式使能/禁止
void LPUart_HdModeEnable(M0P_LPUART_TypeDef* LPUARTx);
void LPUart_HdModeDisable(M0P_LPUART_TypeDef* LPUARTx);
//TB8数据设置
void LPUart_SetTb8(M0P_LPUART_TypeDef* LPUARTx, boolean_t bTB8Value);
//数据寄存器bit8位获取
boolean_t LPUart_GetRb8(M0P_LPUART_TypeDef* LPUARTx);
//中断相关设置函数使能和禁止
en_result_t LPUart_EnableIrq(M0P_LPUART_TypeDef* LPUARTx, en_lpuart_irq_sel_t enIrqSel);
en_result_t LPUart_DisableIrq(M0P_LPUART_TypeDef* LPUARTx, en_lpuart_irq_sel_t enIrqSel);
//特殊功能使能和禁止
en_result_t LPUart_EnableFunc(M0P_LPUART_TypeDef* LPUARTx, en_lpuart_func_t enFunc);
en_result_t LPUart_DisableFunc(M0P_LPUART_TypeDef* LPUARTx, en_lpuart_func_t enFunc);
//状态位获取函数
boolean_t LPUart_GetStatus(M0P_LPUART_TypeDef* LPUARTx,en_lpuart_status_t enStatus);
//状态位的清除
en_result_t LPUart_ClrStatus(M0P_LPUART_TypeDef* LPUARTx,en_lpuart_status_t enStatus);
//整个状态寄存器获取
uint8_t LPUart_GetIsr(M0P_LPUART_TypeDef* LPUARTx);
//整个状态寄存器清除
en_result_t LPUart_ClrIsr(M0P_LPUART_TypeDef* LPUARTx);
//数据查询方式的发送
en_result_t LPUart_SendData(M0P_LPUART_TypeDef* LPUARTx, uint8_t u8Data);
//数据中断方式的发送
en_result_t LPUart_SendDataIt(M0P_LPUART_TypeDef* LPUARTx, uint8_t u8Data);
//数据接收
uint8_t LPUart_ReceiveData(M0P_LPUART_TypeDef* LPUARTx);
//LPUARTx通道号enClk 时钟源选项
en_result_t LPUart_SelSclk(M0P_LPUART_TypeDef* LPUARTx, en_lpuart_sclksel_t enSclk);
//LPUART通道多主机模式配置
en_result_t LPUart_SetMultiMode(M0P_LPUART_TypeDef* LPUARTx, stc_lpuart_multimode_t* pstcMultiCfg);
//LPUART通道多主机模式从机地址配置函数
en_result_t LPUart_SetSaddr(M0P_LPUART_TypeDef* LPUARTx,uint8_t u8Addr);
//@} // LPUartGroup
#ifdef __cplusplus
#endif
#endif /* __UART_H__ */
/******************************************************************************
* EOF (not truncated)
*****************************************************************************/

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@ -0,0 +1,231 @@
/******************************************************************************
* Copyright (C) 2017, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file lvd.h
**
** Headerfile for Low Voltage Detector functions
**
** - 2017-06-28 Alex First Version
**
******************************************************************************/
#ifndef __LVD_H__
#define __LVD_H__
/******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup LvdGroup Low Voltage Detector (LVD)
**
******************************************************************************/
//@{
/******************************************************************************
* Global type definitions
******************************************************************************/
/**
******************************************************************************
** \brief LVD
**
** \note
******************************************************************************/
typedef enum en_lvd_input_src
{
LvdInputSrcMskVCC = 0u<<2, ///< Vcc
LvdInputSrcMskPC13 = 1u<<2, ///< PC13
LvdInputSrcMskPB08 = 2u<<2, ///< PB08
LvdInputSrcMskPB07 = 3u<<2, ///< PB07
}en_lvd_input_src_t;
/**
******************************************************************************
** \brief LVD
**
** \note
******************************************************************************/
typedef enum en_lvd_threshold
{
LvdMskTH1_8V = 0u<<4, ///< 1.8V
LvdMskTH1_9V = 1u<<4, ///< 1.9V
LvdMskTH2_0V = 2u<<4, ///< 2.0V
LvdMskTH2_1V = 3u<<4, ///< 2.1V
LvdMskTH2_2V = 4u<<4, ///< 2.2V
LvdMskTH2_3V = 5u<<4, ///< 2.3V
LvdMskTH2_4V = 6u<<4, ///< 2.4V
LvdMskTH2_5V = 7u<<4, ///< 2.5V
LvdMskTH2_6V = 8u<<4, ///< 2.6V
LvdMskTH2_7V = 9u<<4, ///< 2.7V
LvdMskTH2_8V = 10u<<4, ///< 2.8V
LvdMskTH2_9V = 11u<<4, ///< 2.9V
LvdMskTH3_0V = 12u<<4, ///< 3.0V
LvdMskTH3_1V = 13u<<4, ///< 3.1V
LvdMskTH3_2V = 14u<<4, ///< 3.2V
LvdMskTH3_3V = 15u<<4, ///< 3.3V
}en_lvd_threshold_t;
/**
******************************************************************************
** \brief LVD
**
** \note
******************************************************************************/
typedef enum en_lvd_filter_time
{
LvdFilterMsk7us = 0u<<9, ///< 7us
LvdFilterMsk14us = 1u<<9, ///< 14us
LvdFilterMsk28us = 2u<<9, ///< 28us
LvdFilterMsk112us = 3u<<9, ///< 112us
LvdFilterMsk450us = 4u<<9, ///< 450us
LvdFilterMsk1_8ms = 5u<<9, ///< 1.8ms
LvdFilterMsk7_2ms = 6u<<9, ///< 7.3ms
LvdFilterMsk28_8ms = 7u<<9, ///< 28.8ms
}en_lvd_filter_time_t;
/**
******************************************************************************
** \brief LVD
**
** \note
******************************************************************************/
typedef enum en_lvd_irq_type
{
LvdIrqMskRiseFall = 3u<<12, ///< 上升/下降沿触发
LvdIrqMskHigh = 1u<<14, ///< 高电平触发
LvdIrqMskRise = 1u<<13, ///< 上升沿触发
LvdIrqMskFall = 1u<<12, ///< 下降沿触发
}en_lvd_irq_type_t;
/**
******************************************************************************
** \brief LVD
**
** \note
******************************************************************************/
typedef enum en_lvd_act
{
LvdActMskReset = 1u<<1, ///< 系统复位
LvdActMskInt = 0u, ///< NVIC中断
}en_lvd_act_t;
/**
******************************************************************************
** \brief LVD使
**
** \note
******************************************************************************/
typedef enum en_lvd_filter
{
LvdFilterMskEnable = 1u<<8, ///< 数字滤波使能
LvdFilterMskDisable = 0u, ///< 数字滤波禁止
}en_lvd_filter_t;
/**
******************************************************************************
** \brief LVD
** \note
******************************************************************************/
typedef struct stc_lvd_cfg
{
en_lvd_act_t enAct; ///< LVD触发动作
en_lvd_input_src_t enInputSrc; ///< LVD输入电压源
en_lvd_threshold_t enThreshold; ///< LVD监测电压
en_lvd_filter_t enFilter; ///< 是否使用输出滤波
en_lvd_filter_time_t enFilterTime; ///< 输出滤波时间
en_lvd_irq_type_t enIrqType; ///< 中断触发方式
}stc_lvd_cfg_t;
/******************************************************************************
* Global definitions
******************************************************************************/
/******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
//irq enable/disable
void Lvd_EnableIrq(void);
void Lvd_DisableIrq(void);
// irq function
void Lvd_ClearIrq(void);
boolean_t Lvd_GetIrqStat(void);
// fliter function
boolean_t Lvd_GetFilterResult(void);
//init/deinit function
void Lvd_Init(stc_lvd_cfg_t *pstcCfg);
//LVD function enable/disable
void Lvd_Enable(void);
void Lvd_Disable(void);
//@} // LvdGroup
#ifdef __cplusplus
}
#endif
#endif /* __LVD_H__ */
/******************************************************************************
* EOF (not truncated)
******************************************************************************/

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@ -0,0 +1,160 @@
/*******************************************************************************
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file OPA.h
**
** Headerfile for OPA functions
** @link OPA Group Some description @endlink
**
** History:
** - 2019-04-11 First Version
**
******************************************************************************/
#ifndef __OPA_H__
#define __OPA_H__
/*******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup OPAGroup (OPA)
**
******************************************************************************/
//@{
/**
*******************************************************************************
** function prototypes.
******************************************************************************/
typedef enum
{
Opa0 = 5,
Opa1 = 6,
Opa2 = 7,
Opa3 = 8,
Opa4 = 9
}en_opa_t;
#define OPA_AZEN_Pos(Opax) ((uint32_t)((Opax)-(Opa0))) /* 通过OPA值计算对应教零使能位 */
typedef enum
{
Opa_Dac0Buff = 10, /* DAC0使用OP3单位增加缓存使能 */
Opa_Dac1Buff = 11 /* DAC0使用OP3单位增加缓存使能 */
}en_opa_dac_buff_t;
typedef enum
{
Opa_Ch_Oen1 = 0u, /* OPA OUT1 */
Opa_Ch_Oen2 = 1u, /* OPA OUT2 */
Opa_Ch_Oen3 = 2u, /* OPA OUT3 */
Opa_Ch_Oen4 = 3u, /* OPA OUT4 */
}en_opa_oenx_t;
#define OPA_CHANNEL_OUT_Pos(Opax, Opa_OutChx) ((uint32_t)((Opax)-(Opa0))*4 + (Opa_OutChx)) /* 通过OPA值计算指定输出通道bit位置 */
typedef enum
{
Opa_M1Pclk = 0u,
Opa_M2Pclk = 1u,
Opa_M4Pclk = 2u,
Opa_M8Pclk = 3u,
Opa_M16Pclk = 4u,
Opa_M32Pclk = 5u,
Opa_M64Pclk = 6u,
Opa_M128Pclk = 7u,
Opa_M256Pclk = 8u,
Opa_M512Pclk = 9u,
Opa_M1024Pclk = 10u,
Opa_M2048Pclk = 11u,
Opa_M4096Pclk = 12u
}en_opa_clksrc_t;
typedef struct
{
boolean_t bClk_sw_set; /* 自动教零选择 1软件校准使能。 0软件校准禁止软件触发校准使能 */
boolean_t bAz_pulse; /* 软件校准时配置为1软件触发校准时配置为0 */
boolean_t bAdctr_en; /* 配置为1时ADC启动会触发OPA自动校准使能 */
en_opa_clksrc_t enClksrc; /* 自动校准脉冲宽度设置 */
}stc_opa_zconfig_t;
typedef struct
{
boolean_t opa_ch1; /* OPA输出1使能配置 */
boolean_t opa_ch2; /* OPA输出2使能配置 */
boolean_t opa_ch3; /* OPA输出3使能配置 */
boolean_t opa_ch4; /* OPA输出4使能配置 */
}stc_opa_oenx_config_t;
/******************************************************************************
* Global variable declarations ('extern', definition in C source)
******************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
void Opa_OutChannelConfig(en_opa_t Opax, stc_opa_oenx_config_t OutChs);
void Opa_Cmd(en_opa_t Opax, boolean_t NewStatus);
void Opa_DacBufCmd(en_opa_dac_buff_t Buffx, boolean_t NewStatus);
void Opa_CalCmd(en_opa_t Opax, boolean_t NewStatus);
void Opa_CalConfig(stc_opa_zconfig_t* InitZero);
void Opa_CalSwTrig(void);
//@} // OPA Group
#ifdef __cplusplus
#endif
#endif /* __OPA_H__ */
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

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@ -0,0 +1,261 @@
/******************************************************************************
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/*****************************************************************************/
/** \file pca.h
**
** PCAAPI
**
**
** History:
** - 2019-04-09 First version
**
*****************************************************************************/
#ifndef __PCA_H__
#define __PCA_H__
/*****************************************************************************
* Include files
*****************************************************************************/
#include "ddl.h"
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup PcaGroup Programmable Counter Array (PCA)
**
******************************************************************************/
//@{
/******************************************************************************/
/* Global pre-processor symbols/macros ('#define') */
/******************************************************************************/
/******************************************************************************
* Global type definitions
******************************************************************************/
/**
*******************************************************************************
** \brief PCA
** \note
******************************************************************************/
typedef enum
{
PcaModule0 = 0, // PCA_0
PcaModule1 = 1, // PCA_1
PcaModule2 = 2, // PCA_2
PcaModule3 = 3, // PCA_3
PcaModule4 = 4 // PCA_4
}en_pca_module_t;
/**
*******************************************************************************
** \brief PCA
** \note PCA_CCONCCF0-CCF4CF; PCA_ICLRCCF0-CCF4CF
******************************************************************************/
typedef enum
{
PcaCcf0 = 0,
PcaCcf1 = 1,
PcaCcf2 = 2,
PcaCcf3 = 3,
PcaCcf4 = 4,
PcaCf = 7
}en_pca_ccficlr_t;
/**
*******************************************************************************
** \brief PCA
** \note PCA_CMOD CPS[2:0]
******************************************************************************/
typedef enum
{
PcaPclkdiv32 = 0, // PCLK/32
PcaPclkdiv16 = 1, // PCLK/16
PcaPclkdiv8 = 2, // PCLK/8
PcaPclkdiv4 = 3, // PCLK/4
PcaPclkdiv2 = 4, // PCLK/2
PcaTim0ovf = 5, // timer0 overflow
PcaTim1ovf = 6, // timer1 overflow
PcaEci = 7 // ECI外部时钟
}en_pca_clksrc_t;
/**
*******************************************************************************
** \brief PCA
** \note PCA_CCAPMx ECOM
******************************************************************************/
typedef enum
{
PcaEcomDisable = 0,
PcaEcomEnable = 1
}en_pca_ecom_t;
/**
*******************************************************************************
** \brief PCA 沿
** \note PCA_CCAPMx CAPP
******************************************************************************/
typedef enum
{
PcaCappDisable = 0,
PcaCappEnable = 1
}en_pca_capp_t;
/**
*******************************************************************************
** \brief PCA 沿
** \note PCA_CCAPMx CAPN
******************************************************************************/
typedef enum
{
PcaCapnDisable = 0,
PcaCapnEnable = 1
}en_pca_capn_t;
/**
*******************************************************************************
** \brief PCA
** \note PCA_CCAPMx MAT
******************************************************************************/
typedef enum
{
PcaMatDisable = 0,
PcaMatEnable = 1
}en_pca_mat_t;
/**
*******************************************************************************
** \brief PCA
** \note PCA_CCAPMx TOG
******************************************************************************/
typedef enum
{
PcaTogDisable = 0,
PcaTogEnable = 1
}en_pca_tog_t;
/**
*******************************************************************************
** \brief PCA PWM
** \note PCA_CCAPMx PWM
******************************************************************************/
typedef enum
{
PcaPwm8bitDisable = 0,
PcaPwm8bitEnable = 1
}en_pca_pwm8bit_t;
/**
*******************************************************************************
** \brief PCA EPWM
** \note PCA_EPWM EPWM
******************************************************************************/
typedef enum
{
PcaEpwmDisable = 0,
PcaEpwmEnable = 1
}en_pca_epwm_t;
/**
*******************************************************************************
** \brief PCA
** \note
******************************************************************************/
typedef struct
{
en_pca_clksrc_t pca_clksrc; // PCA_CMOD CPS[2:0]
boolean_t pca_cidl; // PCA_CMOD CIDL
en_pca_ecom_t pca_ecom; // PCA_CCAPMx ECOM
en_pca_capp_t pca_capp; // PCA_CCAPMx CAPP
en_pca_capn_t pca_capn; // PCA_CCAPMx CAPN
en_pca_mat_t pca_mat; // PCA_CCAPMx MAT
en_pca_tog_t pca_tog; // PCA_CCAPMx TOG
en_pca_pwm8bit_t pca_pwm; // PCA_CCAPMx PWM
en_pca_epwm_t pca_epwm; // PCA_EPWM
uint16_t pca_ccap; // PCA_CCAP
uint8_t pca_ccapl; // PCA_CCAPL PCA_CCAP的低字节
uint8_t pca_ccaph; // PCA_CCAPH PCA_CCAP的高字节
uint16_t pca_carr; // PCA_CARR
}stc_pcacfg_t;
/******************************************************************************
* Global variable declarations ('extern', definition in C source)
*****************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
*****************************************************************************/
extern boolean_t Pca_GetItStatus(en_pca_ccficlr_t It_Src);
extern void Pca_ClrItStatus(en_pca_ccficlr_t It_Src);
extern void Pca_StartPca(boolean_t NewStatus);
extern void Pca_SetCidl(boolean_t NewStatus);
extern void Pca_Set4Wdte(boolean_t NewStatus);
extern void Pca_ConfPcaIt(boolean_t NewStatus);
extern void Pca_ConfModulexIt(en_pca_module_t Modulex, boolean_t NewStatus);
extern void Pca_M0Init(stc_pcacfg_t* InitStruct);
extern void Pca_M1Init(stc_pcacfg_t* InitStruct);
extern void Pca_M2Init(stc_pcacfg_t* InitStruct);
extern void Pca_M3Init(stc_pcacfg_t* InitStruct);
extern void Pca_M4Init(stc_pcacfg_t* InitStruct);
extern uint16_t Pca_GetCnt(void);
extern void Pca_SetCnt(uint16_t cnt);
extern boolean_t Pca_GetOut(en_pca_module_t Modulex);
extern void Pca_SetCcap(en_pca_module_t Modulex, uint16_t Value);
extern uint16_t Pca_GetCcap(en_pca_module_t Modulex);
extern void Pca_SetCarr(uint16_t Value);
extern uint16_t Pca_GetCarr(void);
extern void Pca_SetCcapHL(en_pca_module_t Modulex, uint8_t ValueH, uint8_t ValueL);
extern void Pca_GetCcapHL(en_pca_module_t Modulex, uint8_t *ValueH, uint8_t *ValueL);
//@} // PcaGroup
#ifdef __cplusplus
#endif
#endif /* __PCA_H__ */
/******************************************************************************
* EOF (not truncated)
*****************************************************************************/

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/*******************************************************************************
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file pcnt.h
**
** Headerfile for PCNT functions
** @link PCNT Group Some description @endlink
**
** History:
** - 2019-04-08 First Version
**
******************************************************************************/
#ifndef __PCNT_H__
#define __PCNT_H__
/*******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup PCNTGroup (PCNT)
**
******************************************************************************/
//@{
/**
*******************************************************************************
** function prototypes.
******************************************************************************/
/**
*******************************************************************************
** \brief PCNT S0
** \note PCNT_CTRL S0P
******************************************************************************/
typedef enum
{
PcntS0PNoinvert = 0u, // S0通道极性不取反
PcntS0PInvert = 1u // S0通道极性取反
}en_pcnt_s0polar_t;
/**
*******************************************************************************
** \brief PCNT S1
** \note PCNT_CTRL S1P
******************************************************************************/
typedef enum
{
PcntS1PNoinvert = 0u, // S1通道极性不取反
PcntS1PInvert = 1u // S1通道极性取反
}en_pcnt_s1polar_t;
/**
*******************************************************************************
** \brief PCNT
** \note PCNT_CTRL DIR
******************************************************************************/
typedef enum
{
PcntNDoubleDirAdd = 0u, // 加计数
PcntNDoubleDirSub = 1u // 减计数
}en_pcnt_dir_t;
/**
*******************************************************************************
** \brief PCNT
** \note PCNT_CTRL ClkSel
******************************************************************************/
typedef enum
{
PcntCLKPclk = 1u, // PCLK
PcntCLKXtl = 2u, // XTL
PcntCLKRcl = 3u // RCL
}en_pcnt_clksel_t;
/**
*******************************************************************************
** \brief PCNT
** \note PCNT_CTRL Mode
******************************************************************************/
typedef enum
{
PcntSingleMode = 1u, // 单通道脉冲计数模式
PcntSpecialMode = 2u, // 双通道非正交脉冲计数模式
PcntDoubleMode = 3u // 双通道正交脉冲计数模式
}en_pcnt_mode_t;
/**
******************************************************************************
** \brief PCNT
** \note PCNT_IFR & PCNT_ICR & PCNT_IEN
*****************************************************************************/
typedef enum
{
PcntS1E = 7, // S1通道脉冲解码错误
PcntS0E = 6, // S0通道脉冲解码错误
PcntBB = 5, // 脉冲解码错误
PcntFE = 4, // 采样周期脉冲解码错误
PcntDIR = 3, // 反向改变中断
PcntTO = 2, // 超时中断标识
PcntOV = 1, // 上溢中断标识
PcntUF = 0, // 下溢中断标识
}en_pcnt_itfce_t;
/**
******************************************************************************
** \brief PCNT 1 PCNT_SR1
** \note PCNT_SR1 : DIR
*****************************************************************************/
typedef enum
{
PcntDoubleDirAdd = 0, // 双通道正交脉冲加计数
PcntDoubleDirSub = 1 // 双通道正交脉冲加计数
}en_pcnt_sr1dir_t;
/**
******************************************************************************
** \brief PCNT PCNT_DBG
** \note PCNT_DBG: DBG
*****************************************************************************/
typedef enum
{
PcntDBGZero = 0, // 固定为0
PcntDBGSxA = 1, // 脉冲同步之后通过S0A/S1A输出
PcntDBGSxP = 2, // 脉冲极性选择之后通过S0P/S1P输出
PcntDBGSxPF = 3 // 脉冲滤波之后通过S0PF/S1PF输出
}en_pcnt_dbg_t;
typedef enum
{
PcntDirUp = 0, //加计数
PcntDirDown = 1 //减计数
}en_pent_dir_t;
/**
******************************************************************************
** \brief PCNT
*****************************************************************************/
typedef struct stc_pcnt_cfg
{
en_pcnt_s0polar_t Pcnt_S0Sel; // S0通道极性选择
en_pcnt_s1polar_t Pcnt_S1Sel; // S1通道极性选择
en_pcnt_clksel_t Pcnt_Clk; // 计数时钟选择
en_pcnt_mode_t Pcnt_Mode; // 脉冲计数模式选择
boolean_t Pcnt_FltEn; // 脉冲宽度滤波器使能控制 PCNT_FLT: EN
uint8_t Pcnt_DebTop; // 计数器阀值 PCNT_FLT: DebTop
uint16_t Pcnt_ClkDiv; // 滤波时钟分频系数 PCNT_FLT: ClkDiv
boolean_t Pcnt_TocrEn; // 超时功能使能控制位 PCNT_TOCR : EN
uint16_t Pcnt_TocrTh; // 超时阈值 PCNT_TOCR : TH
en_pcnt_dbg_t Pcnt_Dbg; // 观测输出选择寄存器 PCNT_DBG
en_pent_dir_t Pcnt_Dir;
}stc_pcnt_initstruct_t;
/******************************************************************************
* Global variable declarations ('extern', definition in C source)
******************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
extern boolean_t Pcnt_Cmd(boolean_t NewState);
extern en_result_t Pcnt_SetB2T(uint16_t value);
extern en_result_t Pcnt_SetB2C(uint16_t value);
extern en_result_t Pcnt_SetT2C(void);
extern void Pcnt_Init(stc_pcnt_initstruct_t* InitStruct);
extern void Pcnt_ItCfg(en_pcnt_itfce_t IT_Src, boolean_t NewState);
extern boolean_t Pcnt_GetItStatus(en_pcnt_itfce_t IT_Src);
extern void Pcnt_ClrItStatus(en_pcnt_itfce_t IT_Src);
extern uint16_t Pcnt_GetCnt(void);
extern uint16_t Pcnt_GetTop(void);
extern uint16_t Pcnt_GetBuf(void);
extern void Pcnt_SetCnt(uint16_t value);
extern void Pcnt_SetBuf(uint16_t value);
extern void Pcnt_SetTop(uint16_t value);
//@} // PCNT Group
#ifdef __cplusplus
#endif
#endif /* __PCNT_H__ */
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

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/*************************************************************************************
* Copyright (C) 2016, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file ram.h
**
** RAM API.
**
** - 2019-04-02 LuX V1.0
**
******************************************************************************/
#ifndef __RAM_H__
#define __RAM_H__
/******************************************************************************/
/* Include files */
/******************************************************************************/
#include "ddl.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup RamGroup Ram Controller (Ram)
**
**
******************************************************************************/
//@{
/******************************************************************************
* Global type definitions
******************************************************************************/
/**
******************************************************************************
** \brief Redefinition of RAM register structure
******************************************************************************/
/******************************************************************************
* Global definitions
******************************************************************************/
/******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
///<中断相关函数
///<中断使能/禁止
void Ram_EnableIrq(void);
void Ram_DisableIrq(void);
///<中断标志获取
boolean_t Ram_GetIntFlag(void);
///<中断标志清除
void Ram_ClearIntFlag(void);
///<奇偶校验出错地址获取
uint32_t Ram_ErrAddrGet(void);
//@} // RamGroup
#ifdef __cplusplus
}
#endif
#endif /* __RAM_H__ */
/******************************************************************************/
/* EOF (not truncated) */
/******************************************************************************/

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/******************************************************************************
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file reset.h
**
** Headerfile for reset functions
**
**
** History:
** - 2018-04-21 Lux First Version
**
******************************************************************************/
#ifndef __RESET_H__
#define __RESET_H__
/******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup ResetGroup Reset (RST)
**
******************************************************************************/
//@{
/**
*******************************************************************************
** function prototypes.
******************************************************************************/
/*******************************************************************************
* Global definitions
******************************************************************************/
/**
*******************************************************************************
** \brief
** \note
******************************************************************************/
typedef enum en_sysctrl_peripheral0
{
ResetMskUart0 = 1u<<0u, ///< 串口0
ResetMskUart1 = 1u<<1u, ///< 串口1
ResetMskLpUart0 = 1u<<2u, ///< 低功耗串口0
ResetMskLpUart1 = 1u<<3u, ///< 低功耗串口1
ResetMskI2c0 = 1u<<4u, ///< I2C0
ResetMskI2c1 = 1u<<5u, ///< I2C1
ResetMskSpi0 = 1u<<6u, ///< SPI0
ResetMskSpi1 = 1u<<7u, ///< SPI1
ResetMskBaseTim = 1u<<8u, ///< 基础定时器TIM0/1/2
ResetMskLpTim0 = 1u<<9u, ///< 低功耗定时器0
ResetMskAdvTim = 1u<<10u, ///< 高级定时器TIM4/5/6
ResetMskTim3 = 1u<<11u, ///< 定时器3
ResetMskOpa = 1u<<13u, ///< OPA
ResetMskPca = 1u<<14u, ///< 可编程计数阵列
ResetMskAdcBgr = 1u<<16u, ///< ADC&BGR
ResetMskVcLvd = 1u<<17u, ///< VC和LVD
ResetMskRng = 1u<<18u, ///< RNG
ResetMskPcnt = 1u<<19u, ///< PCNT
ResetMskRtc = 1u<<20u, ///< RTC
ResetMskTrim = 1u<<21u, ///< 时钟校准
ResetMskLcd = 1u<<22u, ///< LCD
ResetMskTick = 1u<<24u, ///< 系统定时器
ResetMskSwd = 1u<<25u, ///< SWD
ResetMskCrc = 1u<<26u, ///< CRC
ResetMskAes = 1u<<27u, ///< AES
ResetMskGpio = 1u<<28u, ///< GPIO
ResetMskDma = 1u<<29u, ///< DMA
ResetMskHdiv = 1U<<30U, ///< HDIV
}en_reset_peripheral0_t;
typedef enum en_sysctrl_peripheral1
{
ResetMskUsb = 1u<<0u, ///< USB
ResetMskCan = 1u<<1u, ///< CAN
ResetMskCts = 1u<<2u, ///< CTS
ResetMskDac = 1u<<3u, ///< DAC
ResetMskLpTim1 = 1u<<4u, ///< 低功耗定时器1
ResetMskI2s0 = 1u<<5u, ///< I2S0
ResetMskI2s1 = 1u<<6u, ///< I2S1
ResetMskUart2 = 1u<<8u, ///< UART2
ResetMskUart3 = 1u<<9u, ///< UART3
}en_reset_peripheral1_t;
/**
*******************************************************************************
** \brief
**
** \note
******************************************************************************/
typedef enum en_reset_flag
{
ResetFlagMskPor5V = 1u<<0u, ///< 5V启动复位
ResetFlagMskPor1_5V = 1u<<1u, ///< 1.5V启动复位
ResetFlagMskLvd = 1u<<2u, ///< 低电压检测复位
ResetFlagMskWdt = 1u<<3u, ///< 看门狗复位
ResetFlagMskPca = 1u<<4u, ///< PCA复位
ResetFlagMskLockup = 1u<<5u, ///< 系统异常复位
ResetFlagMskSysreq = 1u<<6u, ///< 软件复位
ResetFlagMskRstb = 1u<<7u, ///< RESET脚 复位
}en_reset_flag_t;
/*******************************************************************************
* Global variable declarations ('extern', definition in C source)
******************************************************************************/
/*******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
///< 获得复位源状态
boolean_t Reset_GetFlag(en_reset_flag_t enRstFlg);
///< 清除复位源状态
void Reset_ClearFlag(en_reset_flag_t enRstFlg);
void Reset_ClearFlagAll(void);
///< 外设模块复位
void Reset_RstPeripheralAll(void);
void Reset_RstPeripheral0(en_reset_peripheral0_t enPeri);
void Reset_RstPeripheral1(en_reset_peripheral1_t enPeri);
//@} // ResetGroup
#ifdef __cplusplus
#endif
#endif /* __RESET_H__ */
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

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/******************************************************************************
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/*****************************************************************************/
/** \file rtc.h
**
** Headerfile for RTC functions
**
**
** History:
** - 2019-04-10 First Version
**
*****************************************************************************/
#ifndef __RTC_H__
#define __RTC_H__
/*****************************************************************************
* Include files
*****************************************************************************/
#include "ddl.h"
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup RtcGroup Real Time Clock (RTC)
**
******************************************************************************/
//@{
/******************************************************************************/
/* Global pre-processor symbols/macros ('#define') */
/******************************************************************************/
/******************************************************************************
* Global type definitions
******************************************************************************/
/**
******************************************************************************
** \brief rtc RTC_CR0 PRDS
*****************************************************************************/
typedef enum
{
RtcNone = 0u, //无周期中断
Rtc05S = 1u, //0.5S中断
Rtc1S = 2u, //1秒
Rtc1Min = 3u, //1分钟
Rtc1H = 4u, //1小时
Rtc1Day = 5u, //1天
Rtc1Mon = 6u //1月
}en_rtc_prds_t;
/**
******************************************************************************
** \brief rtc 12h24h RTC_CR0 AMPM
*****************************************************************************/
typedef enum
{
RtcAm = 0u, //12小时制
RtcPm = 1u //24小时制
}en_rtc_ampm_t;
/**
******************************************************************************
** \brief 1Hz RTC_CR0 HZ1SEL
*****************************************************************************/
typedef enum
{
RtcHz1selGeneralPricision = 0u, //普通精度1Hz输出
RtcHz1selHighPricision = 1u //高精度1Hz输出
}en_rtc_hz1sel_t;
/**
******************************************************************************
** \brief RTC_CR0 PRDSEL
*****************************************************************************/
typedef enum
{
RtcPrds = 0u, //使用PRDS所设定的周期中断事件间隔
RtcPrdx = 1u //使用PRDX所设定的周期中断事件间隔
}en_rtc_prdsel_t;
/**
******************************************************************************
** \brief rtc RTC_CR1 CKSEL
*****************************************************************************/
typedef enum
{
RtcClkXtl = 0u, //外部低速时钟XTL 32.768k
RtcClkRcl = 2u, //内部低速时钟RCL 32k
RtcClkXth128 = 4u, //外部晶振4M XTH/128
RtcClkXth256 = 5u, //外部晶振8M XTH/256
RtcClkXth512 = 6u, //外部晶振16M XTH/512
RtcClkXth1024 = 7u //外部晶振32M XTH/1024
}en_rtc_cksel_t;
/**
******************************************************************************
** \brief 使 RTC_COMPEN EN
*****************************************************************************/
typedef enum
{
RtcCompenDisable = 0u,
RtcCompenEnable = 1u
}en_rtc_compen_t;
/**
******************************************************************************
** \brief PRD使
*****************************************************************************/
typedef struct
{
en_rtc_prdsel_t rtcPrdsel;
uint8_t rtcPrdx;
en_rtc_prds_t rtcPrds;
}stc_rtc_cyccfg_t;
/**
******************************************************************************
** \brief
*****************************************************************************/
typedef struct
{
uint8_t RtcAlarmSec; //闹钟秒钟
uint8_t RtcAlarmMinute; //闹钟分钟
uint8_t RtcAlarmHour; //闹钟小时
uint8_t RtcAlarmWeek; //闹钟周
}stc_rtc_alarmtime_t;
/**
******************************************************************************
** \brief
*****************************************************************************/
/**
******************************************************************************
** \brief rtc
*****************************************************************************/
typedef struct stc_rtc_time
{
uint8_t u8Second; //时间:秒
uint8_t u8Minute; //时间:分
uint8_t u8Hour; //时间:时
uint8_t u8DayOfWeek; //时间:周
uint8_t u8Day; //时间:日
uint8_t u8Month; //时间:月
uint8_t u8Year; //时间:年
} stc_rtc_time_t;
/**
******************************************************************************
** \brief RTC
*****************************************************************************/
typedef struct
{
en_rtc_ampm_t rtcAmpm; //小时的时制
stc_rtc_cyccfg_t rtcPrdsel; //确定PRDS或者PRDX所设定的周期中断时间间隔类型
en_rtc_cksel_t rtcClksrc; //实时时钟的时钟源
en_rtc_compen_t rtcCompen; //时钟误差补偿使能与禁止
uint16_t rtcCompValue; //使能补偿的情况下,补偿值取值范围为:0-255
stc_rtc_time_t rtcTime; //要写入时间寄存器的时间
}stc_rtc_initstruct_t;
/******************************************************************************
Global function prototypes (definition in C source)
*******************************************************************************/
//RTC计数器的使能或停止
extern void Rtc_Cmd(boolean_t NewState);
//RTC计数器启动等待函数
extern void Rtc_StartWait(void);
//RTC的1Hz输出的使能或停止
extern void Rtc_Hz1Cmd(en_rtc_hz1sel_t pricision, boolean_t NewState);
//设置周期中断的类型(PRDSEL)及其所选类型的时间(PRDS或PRDX)
extern en_result_t Rtc_SetCyc(stc_rtc_cyccfg_t* pstCyc);
//RTC闹钟中断的使能或停止
extern void Rtc_AlmIeCmd(boolean_t NewState);
//RTC闹钟的使能或停止
extern void Rtc_AlmEnCmd(boolean_t NewState);
//获取RTC闹钟中断状态位
extern boolean_t Rtc_GetAlmfItStatus(void);
//清除RTC闹钟中断状态位
extern void Rtc_ClearAlmfItStatus(void);
//清除RTC周期中断状态位
extern void Rtc_ClearPrdfItStatus(void);
//获取RTC周期中断状态位
extern boolean_t Rtc_GetPridItStatus(void);
//配置RTC的误差补偿寄存器
extern en_result_t Rtc_CompCfg(uint16_t CompVlue, en_rtc_compen_t NewStatus);
//RTC根据日期计算周数
extern en_result_t Check_BCD_Format(uint8_t u8data,uint8_t u8limit_min, uint8_t u8limit_max);
//RTC获取时间函数
extern en_result_t Rtc_ReadDateTime(stc_rtc_time_t* time);
//向RTC时间寄存器写入时间
extern en_result_t Rtc_SetTime(stc_rtc_time_t* time);
//RTC闹钟中断时间获取
extern void Rtc_GetAlarmTime(stc_rtc_alarmtime_t* pstcAlarmTime);
//RTC闹钟设置
extern en_result_t Rtc_SetAlarmTime(stc_rtc_alarmtime_t* pstcAlarmTime);
//初始化RTC
extern void Rtc_Init(stc_rtc_initstruct_t* Rtc_InitStruct);
#endif /* __RTC_H__ */
/******************************************************************************
* EOF (not truncated)
*****************************************************************************/

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@ -0,0 +1,212 @@
/******************************************************************************
* Copyright (C) 2017, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED , ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/*****************************************************************************/
/** \file spi.h
**
** Headerfile for SPI functions
**
**
** History:
** - 2017-05-17 1.0 Devi First Version
**
*****************************************************************************/
#ifndef __SPI_H__
#define __SPI_H__
/******************************************************************************
* Include files
*****************************************************************************/
#include "ddl.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
//@{
/******************************************************************************
* Global type definitions
*****************************************************************************/
/**
******************************************************************************
** \brief SPI
******************************************************************************/
/**
******************************************************************************
** \brief SPI 使
******************************************************************************/
typedef enum en_spi_en
{
SpiMskEnable = 0x4u, ///< SPI模块使能
SpiMskDisable = 0u, ///< SPI模块禁止
}en_spi_en_t;
/**
******************************************************************************
** \brief SPI
******************************************************************************/
typedef enum en_spi_mode
{
SpiMskMaster = 0x10u, ///<主机
SpiMskSlave = 0x00u, ///<从机
}en_spi_mode_t;
/**
******************************************************************************
** \brief SPI
******************************************************************************/
typedef enum en_spi_cpol
{
SpiMskcpollow = 0u, ///<极性为低
SpiMskcpolhigh = 0x08u, ///<极性为高
}en_spi_cpol_t;
/**
******************************************************************************
** \brief SPI
******************************************************************************/
typedef enum en_spi_cpha
{
SpiMskCphafirst = 0u, ///<第一边沿采样
SpiMskCphasecond = 0x4u, ///<第二边沿采样
}en_spi_cpha_t;
/**
******************************************************************************
** \brief SPI
*****************************************************************************/
typedef enum en_spi_clk_div
{
SpiClkMskDiv2 = 0x00u, ///<PCLK 2分频
SpiClkMskDiv4 = 0x01u, ///<PCLK 4分频
SpiClkMskDiv8 = 0x02u, ///<PCLK 8分频
SpiClkMskDiv16 = 0x03u, ///<PCLK 16分频
SpiClkMskDiv32 = 0x80u, ///<PCLK 32分频
SpiClkMskDiv64 = 0x81u, ///<PCLK 64分频
SpiClkMskDiv128 = 0x82u, ///<PCLK 128分频
}en_spi_clk_div_t;
/**
******************************************************************************
** \brief SPI
*****************************************************************************/
typedef enum en_spi_cspin
{
SpiCsLow = 0u, ///<片选低电平
SpiCsHigh = 1u, ///<片选高电平
}en_spi_cspin_t;
/**
******************************************************************************
** \brief SPI
*****************************************************************************/
typedef enum en_spi_status
{
SpiIf = 0x80u, ///<传输结束中断标志
SpiSserr = 0x20u, ///<从机模式错误标志
SpiMdf = 0x10u, ///<主机模式错误标志
SpiBusy = 0x08u, ///<SPI总线忙标志
SpiTxe = 0x04u, ///<发送缓冲器器空标志
SpiRxne = 0x02u, ///<接受缓冲器非空标志
}en_spi_status_t;
/**
******************************************************************************
** \brief SPI
*****************************************************************************/
typedef enum en_spi_func
{
SpiMskRxNeIe = 0x40u, ///<接收缓冲器非空中断使能
SpiMskTxEIe = 0x20u, ///<发送缓冲器空中断使能
SpiMskDmaTxEn = 0x10u, ///<DMA硬件访问发送使能
SpiMskDmaRxEn = 0x08u, ///<DMA硬件访问接收使能
}en_spi_func_t;
/**
******************************************************************************
** \brief SPI
*****************************************************************************/
typedef struct stc_spi_cfg
{
en_spi_mode_t enSpiMode; ///< 主从模式选择
en_spi_clk_div_t enPclkDiv; ///< PCLK分频系数(波特率分频)
en_spi_cpol_t enCPOL; ///< 时钟极性选择
en_spi_cpha_t enCPHA; ///< 时钟相位选择
}stc_spi_cfg_t;
//SPI 状态获取
boolean_t Spi_GetStatus(M0P_SPI_TypeDef* SPIx,en_spi_status_t enStatus);
///<SPI 中断使能/禁止
en_result_t Spi_IrqEnable(M0P_SPI_TypeDef* SPIx);
en_result_t Spi_IrqDisable(M0P_SPI_TypeDef* SPIx);
//SPI 清除中断标记
en_result_t Spi_ClearStatus(M0P_SPI_TypeDef* SPIx);
//SPI初始化函数
en_result_t Spi_Init(M0P_SPI_TypeDef* SPIx,stc_spi_cfg_t* pstcSpiCfg);
//SPI 功能使能禁止函数
en_result_t Spi_FuncEnable(M0P_SPI_TypeDef* SPIx, en_spi_func_t enFunc);
en_result_t Spi_FuncDisable(M0P_SPI_TypeDef* SPIx, en_spi_func_t enFunc);
//SPI关闭函数
en_result_t Spi_DeInit(M0P_SPI_TypeDef* SPIx);
//SPI 配置主发送的电平
void Spi_SetCS(M0P_SPI_TypeDef* SPIx,boolean_t bFlag);
//SPI 数据字节数据收发
uint8_t Spi_RWByte(M0P_SPI_TypeDef* SPIx, uint8_t u8Data);
//SPI 数据发送
en_result_t Spi_SendData(M0P_SPI_TypeDef* SPIx, uint8_t u8Data);
void Spi_Slave_DummyWriteData(M0P_SPI_TypeDef* SPIx, uint8_t u8Data);
en_result_t Spi_SendBuf(M0P_SPI_TypeDef* SPIx, uint8_t* pu8Buf, uint32_t u32Len);
//SPI 数据接收
uint8_t Spi_ReceiveData(M0P_SPI_TypeDef* SPIx);
en_result_t Spi_ReceiveBuf(M0P_SPI_TypeDef* SPIx, uint8_t* pu8Buf, uint32_t u32Len);
//@} // Spi Group
#ifdef __cplusplus
}
#endif
#endif /* __SPI_H__ */
/******************************************************************************
* EOF (not truncated)
*****************************************************************************/

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@ -0,0 +1,491 @@
/*******************************************************************************
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file sysctrl.h
**
** Headerfile for SYSCTRL functions
** @link SYSCTRL Group Some description @endlink
**
** History:
** - 2018-04-15 Lux First Version
**
******************************************************************************/
#ifndef __SYSCTRL_H__
#define __SYSCTRL_H__
/*******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup SysCtrlGroup (SYSCTRL)
**
******************************************************************************/
//@{
/**
*******************************************************************************
** function prototypes.
******************************************************************************/
/******************************************************************************
* Global type definitions
******************************************************************************/
/**
*******************************************************************************
** \brief
** \note
******************************************************************************/
typedef enum en_sysctrl_clk_source
{
SysctrlClkRCH = 0u, ///< 内部高速时钟
SysctrlClkXTH = 1u, ///< 外部高速时钟
SysctrlClkRCL = 2u, ///< 内部低速时钟
SysctrlClkXTL = 3u, ///< 外部低速时钟
SysctrlClkPLL = 4u, ///< PLL时钟
SysctrlClkRC48M = 0x48, ///< RC48M时钟
}en_sysctrl_clk_source_t;
/**
*******************************************************************************
** \brief RCH
******************************************************************************/
typedef enum en_sysctrl_rch_freq
{
SysctrlRchFreq4MHz = 4u, ///< 4MHz
SysctrlRchFreq8MHz = 3u, ///< 8MHz
SysctrlRchFreq16MHz = 2u, ///< 16MHz
SysctrlRchFreq22_12MHz = 1u, ///< 22.12MHz
SysctrlRchFreq24MHz = 0u, ///< 24MHz
SysctrlRchFreq48MHz = 0x48u, ///< 48MHz
}en_sysctrl_rch_freq_t;
/**
*******************************************************************************
** \brief XTAL
******************************************************************************/
typedef enum en_sysctrl_xtal_driver
{
SysctrlXtalDriver0 = 0u, ///< 最弱驱动能力
SysctrlXtalDriver1 = 1u, ///< 弱驱动能力
SysctrlXtalDriver2 = 2u, ///< 一般驱动能力
SysctrlXtalDriver3 = 3u, ///< 最强驱动能力
}en_sysctrl_xtal_driver_t;
/**
*******************************************************************************
** \brief XTH
******************************************************************************/
typedef enum en_sysctrl_xth_freq
{
SysctrlXthFreq4_8MHz = 0u, ///< 4~8MHz
SysctrlXthFreq8_16MHz = 1u, ///< 8~16MHz
SysctrlXthFreq16_24MHz = 2u, ///< 16~24MHz
SysctrlXthFreq24_32MHz = 3u, ///< 24~32MHz
}en_sysctrl_xth_freq_t;
/**
*******************************************************************************
** \brief XTH
******************************************************************************/
typedef enum en_sysctrl_xth_cycle
{
SysctrlXthStableCycle256 = 0u, ///< 256 个周期数
SysctrlXthStableCycle1024 = 1u, ///< 1024 个周期数
SysctrlXthStableCycle4096 = 2u, ///< 4096 个周期数
SysctrlXthStableCycle16384 = 3u, ///< 16384 个周期数
}en_sysctrl_xth_cycle_t;
/**
*******************************************************************************
** \brief RCL
******************************************************************************/
typedef enum en_sysctrl_rcl_freq
{
SysctrlRclFreq32768 = 0x11u, ///< 32.768KHz
SysctrlRclFreq38400 = 0x10u, ///< 38.4KHz
}en_sysctrl_rcl_freq_t;
/**
*******************************************************************************
** \brief RCL
******************************************************************************/
typedef enum en_sysctrl_rcl_cycle
{
SysctrlRclStableCycle4 = 0u, ///< 4 个周期数
SysctrlRclStableCycle16 = 1u, ///< 16 个周期数
SysctrlRclStableCycle64 = 2u, ///< 64 个周期数
SysctrlRclStableCycle256 = 3u, ///< 256 个周期数
}en_sysctrl_rcl_cycle_t;
/**
*******************************************************************************
** \brief XTL
******************************************************************************/
typedef enum en_sysctrl_xtl_cycle
{
SysctrlXtlStableCycle256 = 0u, ///< 256 个周期数
SysctrlXtlStableCycle1024 = 1u, ///< 1024 个周期数
SysctrlXtlStableCycle4096 = 2u, ///< 4096 个周期数
SysctrlXtlStableCycle16384 = 3u, ///< 16384 个周期数
}en_sysctrl_xtl_cycle_t;
/**
*******************************************************************************
** \brief XTL
******************************************************************************/
typedef enum en_sysctrl_xtl_amp
{
SysctrlXtlAmp0 = 0u, ///< 最小振幅
SysctrlXtlAmp1 = 1u, ///< 小振幅
SysctrlXtlAmp2 = 2u, ///< 一般振幅
SysctrlXtlAmp3 = 3u, ///< 最大振幅
}en_sysctrl_xtl_amp_t;
/**
*******************************************************************************
** \brief PLL
******************************************************************************/
typedef enum en_sysctrl_pll_cycle
{
SysctrlPllStableCycle128 = 0u, ///< 128个周期数
SysctrlPllStableCycle256 = 1u, ///< 256个周期数
SysctrlPllStableCycle512 = 2u, ///< 512个周期数
SysctrlPllStableCycle1024 = 3u, ///< 1024个周期数
SysctrlPllStableCycle2048 = 4u, ///< 2048个周期数
SysctrlPllStableCycle4096 = 5u, ///< 4096个周期数
SysctrlPllStableCycle8192 = 6u, ///< 8192个周期数
SysctrlPllStableCycle16384 = 7u, ///< 16384个周期数
}en_sysctrl_pll_cycle_t;
/**
*******************************************************************************
** \brief PLL
******************************************************************************/
typedef enum en_sysctrl_pll_infreq
{
SysctrlPllInFreq4_6MHz = 0u, ///< 4~16MHz
SysctrlPllInFreq6_12MHz = 1u, ///< 6~12MHz
SysctrlPllInFreq12_20MHz = 2u, ///< 12~20MHz
SysctrlPllInFreq20_24MHz = 3u, ///< 20~24MHz
}en_sysctrl_pll_infreq_t;
/**
*******************************************************************************
** \brief PLL
******************************************************************************/
typedef enum en_sysctrl_pll_outfreq
{
SysctrlPllOutFreq8_12MHz = 0u, ///< 8~12MHz
SysctrlPllOutFreq12_18MHz = 1u, ///< 12~18MHz
SysctrlPllOutFreq18_24MHz = 2u, ///< 18~24MHz
SysctrlPllOutFreq24_36MHz = 3u, ///< 24~36MHz
SysctrlPllOutFreq36_48MHz = 4u, ///< 36~48MHz
}en_sysctrl_pll_outfreq_t;
/**
*******************************************************************************
** \brief PLL
******************************************************************************/
typedef enum en_sysctrl_pll_clksource
{
SysctrlPllXthXtal = 0u, ///< XTH晶振输入的时钟
SysctrlPllXthIn = 2u, ///< XTH从端口输入的时钟
SysctrlPllRch = 3u, ///< RCH时钟
}en_sysctrl_pll_clksource_t;
/**
*******************************************************************************
** \brief PLL
******************************************************************************/
typedef enum en_sysctrl_pll_mul
{
SysctrlPllMul2 = 2u, ///< 2倍频
SysctrlPllMul3 = 3u, ///< 3倍频
SysctrlPllMul4 = 4u, ///< 4倍频
SysctrlPllMul5 = 5u, ///< 5倍频
SysctrlPllMul6 = 6u, ///< 6倍频
SysctrlPllMul7 = 7u, ///< 7倍频
SysctrlPllMul8 = 8u, ///< 8倍频
SysctrlPllMul9 = 9u, ///< 9倍频
SysctrlPllMul10 = 10u, ///< 10倍频
SysctrlPllMul11 = 11u, ///< 11倍频
SysctrlPllMul12 = 12u, ///< 12倍频
}en_sysctrl_pll_mul_t;
/**
*******************************************************************************
** \brief HCLK
******************************************************************************/
typedef enum en_sysctrl_hclk_div
{
SysctrlHclkDiv1 = 0u, ///< SystemClk
SysctrlHclkDiv2 = 1u, ///< SystemClk/2
SysctrlHclkDiv4 = 2u, ///< SystemClk/4
SysctrlHclkDiv8 = 3u, ///< SystemClk/8
SysctrlHclkDiv16 = 4u, ///< SystemClk/16
SysctrlHclkDiv32 = 5u, ///< SystemClk/32
SysctrlHclkDiv64 = 6u, ///< SystemClk/64
SysctrlHclkDiv128 = 7u, ///< SystemClk/128
}en_sysctrl_hclk_div_t;
/**
*******************************************************************************
** \brief PCLK
******************************************************************************/
typedef enum en_sysctrl_pclk_div
{
SysctrlPclkDiv1 = 0u, ///< HCLK
SysctrlPclkDiv2 = 1u, ///< HCLK/2
SysctrlPclkDiv4 = 2u, ///< HCLK/4
SysctrlPclkDiv8 = 3u, ///< HCLK/8
}en_sysctrl_pclk_div_t;
/**
*******************************************************************************
** \brief RTC
******************************************************************************/
typedef enum en_sysctrl_rtc_adjust
{
SysctrlRTC4MHz = 0u, ///< 4MHz
SysctrlRTC6MHz = 1u, ///< 6MHz
SysctrlRTC8MHz = 2u, ///< 8MHz
SysctrlRTC12MHz = 3u, ///< 12MHz
SysctrlRTC16MHz = 4u, ///< 16MHz
SysctrlRTC20MHz = 5u, ///< 20MHz
SysctrlRTC24MHz = 6u, ///< 24MHz
SysctrlRTC32MHz = 7u, ///< 32MHz
}en_sysctrl_rtc_adjust_t;
/**
*******************************************************************************
** \brief
******************************************************************************/
typedef enum en_sysctrl_func
{
SysctrlEXTHEn = 1u, ///< 使能外部高速时钟从输入引脚输入
SysctrlEXTLEn = 2u, ///< 使能外部低速速时钟从输入引脚输入
SysctrlXTLAlwaysOnEn = 3u, ///< 使能后XTL_EN只可置位
SysctrlClkFuncRTCLpmEn = 5u, ///< 使能RTC低功耗模式
SysctrlCMLockUpEn = 6u, ///< 使能后CPU执行无效指令会复位MCU
SysctrlSWDUseIOEn = 8u, ///< SWD端口设为IO功能
}en_sysctrl_func_t;
/**
*******************************************************************************
** \brief USB
******************************************************************************/
typedef enum en_sysctrl_usbclk_sel
{
SysctrlUsbClkRch48M = 0u, ///<USB时钟选择RCH48M
SysctrlUsbClkPll = 1u, ///<USB时钟选择PLL
}en_sysctrl_usbclk_sel_t;
/**
*******************************************************************************
** \brief
******************************************************************************/
typedef enum en_sysctrl_timer_pllclk_sel
{
SysctrlTimerClkPll = 0u, ///<定时器使用PLL时使用系统同频时钟
SysctrlTimerClkPll2 = 1u, ///<定时器使用PLL是使用系统时钟2倍频
}en_sysctrl_timer_pllclk_sel_t;
/**
*******************************************************************************
** \brief
******************************************************************************/
typedef enum en_sysctrl_peripheral_gate
{
SysctrlPeripheralUart0 = 0u, ///< 串口0
SysctrlPeripheralUart1 = 1u, ///< 串口1
SysctrlPeripheralLpUart0 = 2u, ///< 低功耗串口0
SysctrlPeripheralLpUart1 = 3u, ///< 低功耗串口1
SysctrlPeripheralI2c0 = 4u, ///< I2C0
SysctrlPeripheralI2c1 = 5u, ///< I2C1
SysctrlPeripheralSpi0 = 6u, ///< SPI0
SysctrlPeripheralSpi1 = 7u, ///< SPI1
SysctrlPeripheralBaseTim = 8u, ///< 基础定时器TIM0/1/2
SysctrlPeripheralLpTim0 = 9u, ///< 低功耗定时器0
SysctrlPeripheralAdvTim = 10u, ///< 高级定时器TIM4/5/6
SysctrlPeripheralTim3 = 11u, ///< 定时器3
SysctrlPeripheralOpa = 13u, ///< OPA
SysctrlPeripheralPca = 14u, ///< 可编程计数阵列
SysctrlPeripheralWdt = 15u, ///< 看门狗
SysctrlPeripheralAdcBgr = 16u, ///< ADC&BGR
SysctrlPeripheralVcLvd = 17u, ///< VC和LVD
SysctrlPeripheralRng = 18u, ///< RNG
SysctrlPeripheralPcnt = 19u, ///< PCNT
SysctrlPeripheralRtc = 20u, ///< RTC
SysctrlPeripheralTrim = 21u, ///< 时钟校准
SysctrlPeripheralLcd = 22u, ///< LCD
SysctrlPeripheralTick = 24u, ///< 系统定时器
SysctrlPeripheralSwd = 25u, ///< SWD
SysctrlPeripheralCrc = 26u, ///< CRC
SysctrlPeripheralAes = 27u, ///< AES
SysctrlPeripheralGpio = 28u, ///< GPIO
SysctrlPeripheralDma = 29u, ///< DMA
SysctrlPeripheralHdiv = 30u, ///< 除法器
SysctrlPeripheralFlash = 31u, ///< Flash
SysctrlPeripheralUsb = 32u, ///< USB
SysctrlPeripheralCan = 33u, ///< CAN
SysctrlPeripheralCts = 34u, ///< CTS
SysctrlPeripheralDac = 35u, ///< DAC
SysctrlPeripheralLpTim1 = 36u, ///< 低功耗定时器1
SysctrlPeripheralI2s0 = 37u, ///< I2S0
SysctrlPeripheralI2s1 = 38u, ///< I2S1
SysctrlPeripheralUart2 = 40u, ///< UART2
SysctrlPeripheralUart3 = 41u, ///< UART3
}en_sysctrl_peripheral_gate_t;
/**
*******************************************************************************
** \brief
******************************************************************************/
typedef struct
{
en_sysctrl_clk_source_t enClkSrc; ///< 时钟源选择
en_sysctrl_hclk_div_t enHClkDiv; ///< HCLK分频系数
en_sysctrl_pclk_div_t enPClkDiv; ///< PCLK分频系数
}stc_sysctrl_clk_cfg_t;
/**
*******************************************************************************
** \brief
******************************************************************************/
typedef struct
{
en_sysctrl_pll_infreq_t enInFreq; ///< PLL输入时钟频率范围选择
en_sysctrl_pll_outfreq_t enOutFreq; ///< PLL输出时钟频率范围选择
en_sysctrl_pll_clksource_t enPllClkSrc; ///< PLL输入时钟源选择
en_sysctrl_pll_mul_t enPllMul; ///< PLL倍频系数选择
}stc_sysctrl_pll_cfg_t;
/******************************************************************************
* Global variable declarations ('extern', definition in C source)
******************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
///< 系统时钟初始化API:用于上电后,系统工作之前对主频及外设时钟进行初始化;
///< 注意1使用该初始化函数前需要根据系统必须优先设置目标内部时钟源的TRIM值或外部时钟源的频率范围
///< 注意2XTH、XTL的频率范围设定需要根据外部晶振决定
///< 注意3本驱动默认宏定义SYSTEM_XTH=8MHz,SYSTEM_XTL=32768Hz,如使用其它外部晶振,必须修改这两个宏定义的值。
en_result_t Sysctrl_ClkInit(stc_sysctrl_clk_cfg_t *pstcCfg);
///< 系统时钟去初始化API:恢复为上电默认状态->PCLK=HCLK=SystemClk=RCH4MHz
en_result_t Sysctrl_ClkDeInit(void);
///< 系统时钟模块的基本功能设置
///< 注意使能需要使用的时钟源之前必须优先设置目标内部时钟源的TRIM值或外部时钟源的频率范围
en_result_t Sysctrl_ClkSourceEnable(en_sysctrl_clk_source_t enSource, boolean_t bFlag);
///<外部晶振驱动配置系统初始化Sysctrl_ClkInit()之后可根据需要配置外部晶振的驱动能力时钟初始化Sysctrl_ClkInit()默认为最大值;
en_result_t Sysctrl_XTHDriverCfg(en_sysctrl_xtal_driver_t enDriver);
en_result_t Sysctrl_XTLDriverCfg(en_sysctrl_xtl_amp_t enAmp, en_sysctrl_xtal_driver_t enDriver);
///<时钟稳定周期设置:系统初始化Sysctrl_ClkInit()之后,可根据需要配置时钟开启后的稳定之间,默认为最大值;
en_result_t Sysctrl_SetXTHStableTime(en_sysctrl_xth_cycle_t enCycle);
en_result_t Sysctrl_SetRCLStableTime(en_sysctrl_rcl_cycle_t enCycle);
en_result_t Sysctrl_SetXTLStableTime(en_sysctrl_xtl_cycle_t enCycle);
en_result_t Sysctrl_SetPLLStableTime(en_sysctrl_pll_cycle_t enCycle);
///<系统时钟源切换并更新系统时钟如果需要在系统时钟初始化Sysctrl_ClkInit()之后切换主频时钟源,则使用该函数;
///< 时钟切换前后必须根据目标频率值设置Flash读等待周期可配置插入周期为0、1、2
///< 注意!!!当HCLK大于24MHz时FLASH等待周期插入必须至少为1,否则程序运行可能产生未知错误
en_result_t Sysctrl_SysClkSwitch(en_sysctrl_clk_source_t enSource);
///< 时钟源频率设定:根据系统情况,单独设置不同时钟源的频率值;
///< 时钟频率设置前必须根据目标频率值设置Flash读等待周期可配置插入周期为0、1、2
///< 其中XTL的时钟由外部晶振决定无需设置。
en_result_t Sysctrl_SetRCHTrim(en_sysctrl_rch_freq_t enRCHFreq);
en_result_t Sysctrl_SetRCLTrim(en_sysctrl_rcl_freq_t enRCLFreq);
en_result_t Sysctrl_SetXTHFreq(en_sysctrl_xth_freq_t enXTHFreq);
en_result_t Sysctrl_SetPLLFreq(stc_sysctrl_pll_cfg_t *pstcPLLCfg);
///< 时钟分频设置:根据系统情况单独设置HCLK、PCLK的分配值;
en_result_t Sysctrl_SetHCLKDiv(en_sysctrl_hclk_div_t enHCLKDiv);
en_result_t Sysctrl_SetPCLKDiv(en_sysctrl_pclk_div_t enPCLKDiv);
///< 时钟频率获取根据系统需要获取当前HCLK及PCLK的频率值
uint32_t Sysctrl_GetHClkFreq(void);
uint32_t Sysctrl_GetPClkFreq(void);
///< 外设门控开关/状态获取:用于控制外设模块的使能,使用该模块的功能之前,必须使能该模块的门控时钟;
en_result_t Sysctrl_SetPeripheralGate(en_sysctrl_peripheral_gate_t enPeripheral, boolean_t bFlag);
boolean_t Sysctrl_GetPeripheralGate(en_sysctrl_peripheral_gate_t enPeripheral);
///< 系统功能配置:用于设置其他系统相关特殊功能;
en_result_t Sysctrl_SetFunc(en_sysctrl_func_t enFunc, boolean_t bFlag);
///< RTC高速时钟补偿:用于设置RTC高速时钟下的频率补偿
en_result_t Sysctrl_SetRTCAdjustClkFreq(en_sysctrl_rtc_adjust_t enRtcAdj);
///< USB时钟选择
void Sysctrl_UsbClkSel(en_sysctrl_usbclk_sel_t enUsbClk);
///< 定时器使用PLL时时钟选择
void Sysctrl_TimerPllClkSel(en_sysctrl_timer_pllclk_sel_t enTimClk);
//@} // Sysctrl Group
#ifdef __cplusplus
#endif
#endif /* __SYSCTRL_H__ */
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

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@ -0,0 +1,781 @@
/*******************************************************************************
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file timer3.h
**
** API
** @link Timer3 Group Some description @endlink
**
** History:
** - 2019-04-18 Husj First Version
**
*****************************************************************************/
#ifndef __TIMER3_H__
#define __TIMER3_H__
/*****************************************************************************
* Include files
*****************************************************************************/
#include "ddl.h"
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup Tim3Group Timer3 (TIM3)
**
******************************************************************************/
//@{
/******************************************************************************/
/* Global pre-processor symbols/macros ('#define') */
/******************************************************************************/
/******************************************************************************
* Global type definitions
******************************************************************************/
/**
******************************************************************************
** \brief Timer3
*****************************************************************************/
typedef enum en_tim3_channel
{
Tim3CH0 = 0u, ///< Timer3通道0
Tim3CH1 = 1u, ///< Timer3通道1
Tim3CH2 = 2u, ///< Timer3通道2
}en_tim3_channel_t;
/**
******************************************************************************
** \brief (MODE)(0/1/23)
*****************************************************************************/
typedef enum en_tim3_work_mode
{
Tim3WorkMode0 = 0u, ///< 定时器模式
Tim3WorkMode1 = 1u, ///< PWC模式
Tim3WorkMode2 = 2u, ///< 锯齿波模式
Tim3WorkMode3 = 3u, ///< 三角波模式
}en_tim3_work_mode_t;
/**
******************************************************************************
** \brief (GATE_P)(0)
*****************************************************************************/
typedef enum en_tim3_m0cr_gatep
{
Tim3GatePositive = 0u, ///< 高电平有效
Tim3GateOpposite = 1u, ///< 低电平有效
}en_tim3_m0cr_gatep_t;
/**
******************************************************************************
** \brief TIM3 (PRS)(0/1/23)
*****************************************************************************/
typedef enum en_tim3_cr_timclkdiv
{
Tim3PCLKDiv1 = 0u, ///< Div 1
Tim3PCLKDiv2 = 1u, ///< Div 2
Tim3PCLKDiv4 = 2u, ///< Div 4
Tim3PCLKDiv8 = 3u, ///< Div 8
Tim3PCLKDiv16 = 4u, ///< Div 16
Tim3PCLKDiv32 = 5u, ///< Div 32
Tim3PCLKDiv64 = 6u, ///< Div 64
Tim3PCLKDiv256 = 7u, ///< Div 256
}en_tim3_cr_timclkdiv_t;
/**
******************************************************************************
** \brief / (CT)(0/1/23)
*****************************************************************************/
typedef enum en_tim3_cr_ct
{
Tim3Timer = 0u, ///< 定时器功能计数时钟为内部PCLK
Tim3Counter = 1u, ///< 计数器功能计数时钟为外部ETR
}en_tim3_cr_ct_t;
/**
******************************************************************************
** \brief (MD)(0)
*****************************************************************************/
typedef enum en_tim3_m0cr_md
{
Tim332bitFreeMode = 0u, ///< 32位计数器/定时器
Tim316bitArrMode = 1u, ///< 自动重装载16位计数器/定时器
}en_tim3_m0cr_md_t;
/**
******************************************************************************
** \brief TIM3(0/1/23)
*****************************************************************************/
typedef enum en_tim3_irq_type
{
Tim3UevIrq = 0u, ///< 溢出/事件更新中断
Tim3CA0Irq = 2u, ///< CH0A捕获/比较中断(仅模式1/23存在)
Tim3CA1Irq = 3u, ///< CH1A捕获/比较中断(仅模式23存在)
Tim3CA2Irq = 4u, ///< CH2A捕获/比较中断(仅模式23存在)
Tim3CB0Irq = 5u, ///< CH0B捕获/比较中断(仅模式23存在)
Tim3CB1Irq = 6u, ///< CH1B捕获/比较中断(仅模式23存在)
Tim3CB2Irq = 7u, ///< CH2B捕获/比较中断(仅模式23存在)
Tim3CA0E = 8u, ///< CH0A捕获数据丢失标志(仅模式23存在)(不是中断)
Tim3CA1E = 9u, ///< CH1A捕获数据丢失标志(仅模式23存在)(不是中断)
Tim3CA2E = 10u, ///< CH2A捕获数据丢失标志(仅模式23存在)(不是中断)
Tim3CB0E = 11u, ///< CH0B捕获数据丢失标志(仅模式23存在)(不是中断)
Tim3CB1E = 12u, ///< CH1B捕获数据丢失标志(仅模式23存在)(不是中断)
Tim3CB2E = 13u, ///< CH2B捕获数据丢失标志(仅模式23存在)(不是中断)
Tim3BkIrq = 14u, ///< 刹车中断(仅模式23存在
Tim3TrigIrq = 15u, ///< 触发中断(仅模式23存在
}en_tim3_irq_type_t;
/**
******************************************************************************
** \brief (Edg1stEdg2nd)(1)
*****************************************************************************/
typedef enum en_tim3_m1cr_Edge
{
Tim3PwcRiseToRise = 0u, ///< 上升沿到上升沿(周期)
Tim3PwcFallToRise = 1u, ///< 下降沿到上升沿(低电平)
Tim3PwcRiseToFall = 2u, ///< 上升沿到下降沿(高电平)
Tim3PwcFallToFall = 3u, ///< 下降沿到下降沿(周期)
}en_tim3_m1cr_Edge_t;
/**
******************************************************************************
** \brief PWC (Oneshot)(1)
*****************************************************************************/
typedef enum en_tim3_m1cr_oneshot
{
Tim3PwcCycleDetect = 0u, ///< PWC循环测量
Tim3PwcOneShotDetect = 1u, ///< PWC单次测量
}en_tim3_m1cr_oneshot_t;
/**
******************************************************************************
** \brief PWC IA0 (IA0S)(1)
*****************************************************************************/
typedef enum en_tim3_m1_mscr_ia0s
{
Tim3IA0Input = 0u, ///< IAO输入
Tim3XORInput = 1u, ///< IA0 ETR GATE XOR(TIM0/1/2)/IA0 IA1 IA2 XOR(TIM3)
}en_tim3_m1_mscr_ia0s_t;
/**
******************************************************************************
** \brief PWC IB0 (IA0S)(1)
*****************************************************************************/
typedef enum en_tim3_m1_mscr_ib0s
{
Tim3IB0Input = 0u, ///< IBO输入
Tim3TsInput = 1u, ///< 内部触发TS选择信号
}en_tim3_m1_mscr_ib0s_t;
/**
******************************************************************************
** \brief (CCPA0/CCPB0/ETP/BKP)(1/23)
*****************************************************************************/
typedef enum en_tim3_port_polarity
{
Tim3PortPositive = 0u, ///< 正常输入输出
Tim3PortOpposite = 1u, ///< 反向输入输出
}en_tim3_port_polarity_t;
/**
******************************************************************************
** \brief (FLTET/FLTA0/FLAB0)(1/23)
*****************************************************************************/
typedef enum en_tim3_flt
{
Tim3FltNone = 0u, ///< 无滤波
Tim3FltPCLKCnt3 = 4u, ///< PCLK 3个连续有效
Tim3FltPCLKDiv4Cnt3 = 5u, ///< PCLK/4 3个连续有效
Tim3FltPCLKDiv16Cnt3 = 6u, ///< PCLK/16 3个连续有效
Tim3FltPCLKDiv64Cnt3 = 7u, ///< PCLK/64 3个连续有效
}en_tim3_flt_t;
/**
******************************************************************************
** \brief (OCMA/OCMB)(23)
*****************************************************************************/
typedef enum en_tim3_m23_fltr_ocm
{
Tim3ForceLow = 0u, ///< 强制为0
Tim3ForceHigh = 1u, ///< 强制为1
Tim3CMPForceLow = 2u, ///< 比较匹配时强制为0
Tim3CMPForceHigh = 3u, ///< 比较匹配时强制为1
Tim3CMPInverse = 4u, ///< 比较匹配时翻转电平
Tim3CMPOnePrdHigh = 5u, ///< 比较匹配时输出一个计数周期的高电平
Tim3PWMMode1 = 6u, ///< 通道控制为PWM mode 1
Tim3PWMMode2 = 7u, ///< 通道控制为PWM mode 2
}en_tim3_m23_fltr_ocm_t;
/**
******************************************************************************
** \brief TS (TS)(1/23)
*****************************************************************************/
typedef enum en_tim3_mscr_ts
{
Tim3Ts0ETR = 0u, ///< ETR外部输入滤波后的相位选择信号
Tim3Ts1TIM0TRGO = 1u, ///< Timer0的TRGO输出信号
Tim3Ts2TIM1TRGO = 2u, ///< Timer1的TRGO输出信号
Tim3Ts3TIM2TRGO = 3u, ///< Timer2的TRGO输出信号
Tim3Ts4TIM3TRGO = 4u, ///< Timer3的TRGO输出信号
//Tim3Ts5IA0ED = 5u, ///< 无效
Tim3Ts6IAFP = 6u, ///< CH0A 外部输输入滤波后的相位选择信号
Tim3Ts7IBFP = 7u, ///< CH0B 外部输输入滤波后的相位选择信
}en_tim3_mscr_ts_t;
/**
******************************************************************************
** \brief PWM (COMP)(23)
*****************************************************************************/
typedef enum en_tim3_m23cr_comp
{
Tim3IndependentPWM = 0u, ///< 独立PWM输出
Tim3ComplementaryPWM = 1u, ///< 互补PWM输出
}en_tim3_m23cr_comp_t;
/**
******************************************************************************
** \brief (DIR)(23)
*****************************************************************************/
typedef enum en_tim3_m23cr_dir
{
Tim3CntUp = 0u, ///< 向上计数
Tim3CntDown = 1u, ///< 向下计数
}en_tim3_m23cr_dir_t;
/**
******************************************************************************
** \brief (PWM2S)(23)
*****************************************************************************/
typedef enum en_tim3_m23cr_pwm2s
{
Tim3DoublePointCmp = 0u, ///< 双点比较使能使用CCRA,CCRB比较控制OCREFA输出
Tim3SinglePointCmp = 1u, ///< 单点比较使能使用CCRA比较控制OCREFA输出
}en_tim3_m23cr_pwm2s_t;
/**
******************************************************************************
** \brief GATEPWM (CSG)(23)
*****************************************************************************/
typedef enum en_tim3_m23cr_csg
{
Tim3PWMCompGateCmpOut = 0u, ///< 在PWM互补模式下Gate作为比较输出
Tim3PWMCompGateCapIn = 1u, ///< 在PWM互补模式下Gate作为捕获输入
}en_tim3_m23cr_csg_t;
/**
******************************************************************************
** \brief (CCR0A,CCR0B)(23)
*****************************************************************************/
typedef enum en_tim3_m23_ccrx
{
Tim3CCR0A = 0u, ///< CCR0A比较捕获寄存器
Tim3CCR0B = 1u, ///< CCR0B比较捕获寄存器
Tim3CCR1A = 2u, ///< CCR1A比较捕获寄存器
Tim3CCR1B = 3u, ///< CCR1B比较捕获寄存器
Tim3CCR2A = 4u, ///< CCR2A比较捕获寄存器
Tim3CCR2B = 5u, ///< CCR2B比较捕获寄存器
}en_tim3_m23_ccrx_t;
/**
******************************************************************************
** \brief OCREF (OCCS)(23)
*****************************************************************************/
typedef enum en_tim3_m23ce_occs
{
Tim3OC_Ref_Clr = 0u, ///< 来自VC的OC_Ref_Clr
Tim3ETRf = 1u, ///< 外部ETRf
}en_tim3_m23ce_occs_t;
/**
******************************************************************************
** \brief (CIS/CISB)(23)
*****************************************************************************/
typedef enum en_tim3_m23_cisa_cisb
{
Tim3CmpIntNone = 0u, ///< 无比较匹配中断
Tim3CmpIntRise = 1u, ///< 比较匹配上升沿中断
Tim3CmpIntFall = 2u, ///< 比较匹配下降沿中断
Tim3CmpIntRiseFall = 3u, ///< 比较匹配上升沿下降沿中断
}en_tim3_m23_cisa_cisb_t;
/**
******************************************************************************
** \brief TIM3 - CHx(BKSA/BKSB)(23)
**
** \note
******************************************************************************/
typedef enum en_tim3_m23_crchx_bks
{
Tim3CHxBksHiZ = 0u, ///< 刹车使能时CHx端口输出高阻态
Tim3CHxBksNorm = 1u, ///< 刹车使能时CHx端口正常输出
Tim3CHxBksLow = 2u, ///< 刹车使能时CHx端口输出低电平
Tim3CHxBksHigh = 3u, ///< 刹车使能时CHx端口输出高电平
}en_tim3_m23_crchx_bks_t;
/**
******************************************************************************
** \brief TIM3 - CHx沿沿(CRx/CFx)(23)
**
** \note
******************************************************************************/
typedef enum en_tim3_m23_crch0_cfx_crx
{
Tim3CHxCapNone = 0u, ///< CHx通道捕获禁止
Tim3CHxCapRise = 1u, ///< CHx通道上升沿捕获使能
Tim3CHxCapFall = 2u, ///< CHx通道下降沿捕获使能
Tim3CHxCapFallRise = 3u, ///< CHx通道上升沿下降沿捕获都使能
}en_tim3_m23_crch0_cfx_crx_t;
/**
******************************************************************************
** \brief TIM3 - CHx(CSA/CSB)(23)
**
** \note
******************************************************************************/
typedef enum en_tim3_m23_crch0_csa_csb
{
Tim3CHxCmpMode = 0u, ///< CHx通道设置为比较模式
Tim3CHxCapMode = 1u, ///< CHx通道设置为捕获模式
}en_tim3_m23_crch0_csa_csb_t;
/**
******************************************************************************
** \brief DMA (CCDS)(23)
*****************************************************************************/
typedef enum en_tim3_m23_mscr_ccds
{
Tim3CmpTrigDMA = 0u, ///< 比较匹配触发DMA
Tim3UEVTrigDMA = 1u, ///< 事件更新代替比较匹配触发DMA
}en_tim3_m23_mscr_ccds_t;
/**
******************************************************************************
** \brief (MSM)(23)
*****************************************************************************/
typedef enum en_tim3_m23_mscr_msm
{
Tim3SlaveMode = 0u, ///< 从模式
Tim3MasterMode = 1u, ///< 主模式
}en_tim3_m23_mscr_msm_t;
/**
******************************************************************************
** \brief (MMS)(23)
*****************************************************************************/
typedef enum en_tim3_m23_mscr_mms
{
Tim3MasterUG = 0u, ///< UG(软件更新)源
Tim3MasterCTEN = 1u, ///< CTEN源
Tim3MasterUEV = 2u, ///< UEV更新源
Tim3MasterCMPSO = 3u, ///< 比较匹配选择输出源
Tim3MasterOCA0Ref = 4u, ///< OCA0_Ref源
Tim3MasterOCB0Ref = 5u, ///< OCB0_Ref源
//Tim3MasterOCB0Ref = 6u,
//Tim3MasterOCB0Ref = 7u,
}en_tim3_m23_mscr_mms_t;
/**
******************************************************************************
** \brief (SMS)(23)
*****************************************************************************/
typedef enum en_tim3_m23_mscr_sms
{
Tim3SlaveIClk = 0u, ///< 使用内部时钟
Tim3SlaveResetTIM = 1u, ///< 复位功能
Tim3SlaveTrigMode = 2u, ///< 触发模式
Tim3SlaveEClk = 3u, ///< 外部时钟模式
Tim3SlaveCodeCnt1 = 4u, ///< 正交编码计数模式1
Tim3SlaveCodeCnt2 = 5u, ///< 正交编码计数模式2
Tim3SlaveCodeCnt3 = 6u, ///< 正交编码计数模式3
Tim3SlaveGateCtrl = 7u, ///< 门控功能
}en_tim3_m23_mscr_sms_t;
/**
******************************************************************************
** \brief (CTEN)
*****************************************************************************/
typedef enum en_tim3_start
{
Tim3CTENDisable = 0u, ///< 停止
Tim3CTENEnable = 1u, ///< 运行
}en_tim3_start_t;
/**
******************************************************************************
** \brief TIM3 mode0 (0)
*****************************************************************************/
typedef struct stc_tim3_mode0_cfg
{
en_tim3_work_mode_t enWorkMode; ///< 工作模式设置
en_tim3_m0cr_gatep_t enGateP; ///< 门控极性控制
boolean_t bEnGate; ///< 门控使能
en_tim3_cr_timclkdiv_t enPRS; ///< 预除频配置
boolean_t bEnTog; ///< 翻转输出使能
en_tim3_cr_ct_t enCT; ///< 定时/计数功能选择
en_tim3_m0cr_md_t enCntMode; ///< 计数模式配置
}stc_tim3_mode0_cfg_t;
/**
******************************************************************************
** \brief TIM3 mode1 (1)
*****************************************************************************/
typedef struct stc_tim3_mode1_cfg
{
en_tim3_work_mode_t enWorkMode; ///< 工作模式设置
en_tim3_cr_timclkdiv_t enPRS; ///< 预除频配置
en_tim3_cr_ct_t enCT; ///< 定时/计数功能选择
en_tim3_m1cr_oneshot_t enOneShot; ///< 单次测量/循环测量选择
}stc_tim3_mode1_cfg_t;
/**
******************************************************************************
** \brief PWC(1)
*****************************************************************************/
typedef struct stc_tim3_pwc_input_cfg
{
en_tim3_mscr_ts_t enTsSel; ///< 触发输入源选择
en_tim3_m1_mscr_ia0s_t enIA0Sel; ///< CHA0输入选择
en_tim3_m1_mscr_ib0s_t enIB0Sel; ///< CHB0输入选择
en_tim3_port_polarity_t enETRPhase; ///< ETR相位选择
en_tim3_flt_t enFltETR; ///< ETR滤波设置
en_tim3_flt_t enFltIA0; ///< CHA0滤波设置
en_tim3_flt_t enFltIB0; ///< CHB0滤波设置
}stc_tim3_pwc_input_cfg_t;
/**
******************************************************************************
** \brief TIM3 mode23 (23)
*****************************************************************************/
typedef struct stc_tim3_mode23_cfg
{
en_tim3_work_mode_t enWorkMode; ///< 工作模式设置
en_tim3_m23cr_dir_t enCntDir; ///< 计数方向
en_tim3_cr_timclkdiv_t enPRS; ///< 时钟预除频配置
en_tim3_cr_ct_t enCT; ///< 定时/计数功能选择
en_tim3_m23cr_comp_t enPWMTypeSel; ///< PWM模式选择独立/互补)
en_tim3_m23cr_pwm2s_t enPWM2sSel; ///< OCREFA双点比较功能选择
boolean_t bOneShot; ///< 单次触发模式使能/禁止
boolean_t bURSSel; ///< 更新源选择
}stc_tim3_mode23_cfg_t;
/**
******************************************************************************
** \brief GATEPWM (23)
*****************************************************************************/
typedef struct stc_tim3_m23_gate_cfg
{
en_tim3_m23cr_csg_t enGateFuncSel; ///< Gate比较、捕获功能选择
boolean_t bGateRiseCap; ///< GATE作为捕获功能时上沿捕获有效控制
boolean_t bGateFallCap; ///< GATE作为捕获功能时下沿捕获有效控制
}stc_tim3_m23_gate_cfg_t;
/**
******************************************************************************
** \brief CHA/CHB (23)
*****************************************************************************/
typedef struct stc_tim3_m23_compare_cfg
{
en_tim3_m23_crch0_csa_csb_t enCHxACmpCap; ///< CH0A比较/捕获功能选择
en_tim3_m23_fltr_ocm_t enCHxACmpCtrl; ///< CH0A通道比较控制
en_tim3_port_polarity_t enCHxAPolarity; ///< CH0A输出极性控制
boolean_t bCHxACmpBufEn; ///< 比较A缓存功能 使能/禁止
en_tim3_m23_cisa_cisb_t enCHxACmpIntSel; ///< CHA比较匹配中断选择
en_tim3_m23_crch0_csa_csb_t enCHxBCmpCap; ///< CH0B比较/捕获功能选择
en_tim3_m23_fltr_ocm_t enCHxBCmpCtrl; ///< CH0B通道比较控制
en_tim3_port_polarity_t enCHxBPolarity; ///< CH0B输出极性控制
boolean_t bCHxBCmpBufEn; ///< 比较B缓存功能 使能/禁止
en_tim3_m23_cisa_cisb_t enCHxBCmpIntSel; ///< CHB0比较匹配中断选择
}stc_tim3_m23_compare_cfg_t;
/**
******************************************************************************
** \brief CHA/CHB (23)
*****************************************************************************/
typedef struct stc_tim3_m23_input_cfg
{
en_tim3_m23_crch0_csa_csb_t enCHxACmpCap; ///< CH0A比较/捕获功能选择
en_tim3_m23_crch0_cfx_crx_t enCHxACapSel; ///< CH0A捕获边沿选择
en_tim3_flt_t enCHxAInFlt; ///< CH0A通道捕获滤波控制
en_tim3_port_polarity_t enCHxAPolarity; ///< CH0A输入相位
en_tim3_m23_crch0_csa_csb_t enCHxBCmpCap; ///< CH0A比较/捕获功能选择
en_tim3_m23_crch0_cfx_crx_t enCHxBCapSel; ///< CH0B捕获边沿选择
en_tim3_flt_t enCHxBInFlt; ///< CH0B通道捕获滤波控制
en_tim3_port_polarity_t enCHxBPolarity; ///< CH0B输入相位
}stc_tim3_m23_input_cfg_t;
/**
******************************************************************************
** \brief ETR(23)
*****************************************************************************/
typedef struct stc_tim3_m23_etr_input_cfg
{
en_tim3_port_polarity_t enETRPolarity; ///< ETR输入极性设置
en_tim3_flt_t enETRFlt; ///< ETR滤波设置
}stc_tim3_m23_etr_input_cfg_t;
/**
******************************************************************************
** \brief BK(23)
*****************************************************************************/
typedef struct stc_tim3_m23_bk_input_cfg
{
boolean_t bEnBrake; ///< 刹车使能
boolean_t bEnVCBrake; ///< 使能VC刹车
boolean_t bEnSafetyBk; ///< 使能safety刹车
boolean_t bEnBKSync; ///< TIM0/TIM1/TIM2刹车同步使能
en_tim3_m23_crchx_bks_t enBkCH0AStat; ///< 刹车时CHA端口状态设置
en_tim3_m23_crchx_bks_t enBkCH0BStat; ///< 刹车时CHB端口状态设置
en_tim3_m23_crchx_bks_t enBkCH1AStat; ///< 刹车时CHA端口状态设置
en_tim3_m23_crchx_bks_t enBkCH1BStat; ///< 刹车时CHB端口状态设置
en_tim3_m23_crchx_bks_t enBkCH2AStat; ///< 刹车时CHA端口状态设置
en_tim3_m23_crchx_bks_t enBkCH2BStat; ///< 刹车时CHB端口状态设置
en_tim3_port_polarity_t enBrakePolarity; ///< 刹车BK输入极性设置
en_tim3_flt_t enBrakeFlt; ///< 刹车BK滤波设置
}stc_tim3_m23_bk_input_cfg_t;
/**
******************************************************************************
** \brief (23)
*****************************************************************************/
typedef struct stc_tim3_m23_dt_cfg
{
boolean_t bEnDeadTime; ///< 刹车时CHA端口状态设置
uint8_t u8DeadTimeValue; ///< 刹车时CHA端口状态设置
}stc_tim3_m23_dt_cfg_t;
/**
******************************************************************************
** \brief ADC(23)
*****************************************************************************/
typedef struct stc_tim3_m23_adc_trig_cfg
{
boolean_t bEnTrigADC; ///< 触发ADC全局控制
boolean_t bEnUevTrigADC; ///< 事件更新触发ADC
boolean_t bEnCH0ACmpTrigADC; ///< CH0A比较匹配触发ADC
boolean_t bEnCH0BCmpTrigADC; ///< CH0B比较匹配触发ADC
boolean_t bEnCH1ACmpTrigADC; ///< CH0A比较匹配触发ADC
boolean_t bEnCH1BCmpTrigADC; ///< CH0B比较匹配触发ADC
boolean_t bEnCH2ACmpTrigADC; ///< CH0A比较匹配触发ADC
boolean_t bEnCH2BCmpTrigADC; ///< CH0B比较匹配触发ADC
}stc_tim3_m23_adc_trig_cfg_t;
/**
******************************************************************************
** \brief DMA (23)
*****************************************************************************/
typedef struct stc_tim3_m23_trig_dma_cfg
{
boolean_t bUevTrigDMA; ///< 更新 触发DMA使能
boolean_t bTITrigDMA; ///< Trig 触发DMA功能
boolean_t bCmpA0TrigDMA; ///< CH0A捕获比较触发DMA使能
boolean_t bCmpB0TrigDMA; ///< CH0B捕获比较触发DMA使能
boolean_t bCmpA1TrigDMA; ///< CH1A捕获比较触发DMA使能
boolean_t bCmpB1TrigDMA; ///< CH1B捕获比较触发DMA使能
boolean_t bCmpA2TrigDMA; ///< CH2A捕获比较触发DMA使能
boolean_t bCmpB2TrigDMA; ///< CH2B捕获比较触发DMA使能
en_tim3_m23_mscr_ccds_t enCmpUevTrigDMA; ///< 比较模式下DMA比较触发选择
}stc_tim3_m23_trig_dma_cfg_t;
/**
******************************************************************************
** \brief (23)
*****************************************************************************/
typedef struct stc_tim3_m23_master_slave_cfg
{
en_tim3_m23_mscr_msm_t enMasterSlaveSel; ///< 主从模式选择
en_tim3_m23_mscr_mms_t enMasterSrc; ///< 主模式触发源选择
en_tim3_m23_mscr_sms_t enSlaveModeSel; ///< 从模式选择
en_tim3_mscr_ts_t enTsSel; ///< 触发输入源选择
}stc_tim3_m23_master_slave_cfg_t;
/**
******************************************************************************
** \brief OCREF (23)
*****************************************************************************/
typedef struct stc_tim3_m23_OCREF_Clr_cfg
{
en_tim3_m23ce_occs_t enOCRefClrSrcSel; ///< OCREF清除源选择
boolean_t bVCClrEn; ///< 是否使能来自VC的OCREF_Clr
}stc_tim3_m23_OCREF_Clr_cfg_t;
/******************************************************************************
* Global variable declarations ('extern', definition in C source)
*****************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
*****************************************************************************/
//中断相关函数
//中断标志获取
boolean_t Tim3_GetIntFlag(en_tim3_irq_type_t enTim3Irq);
//中断标志清除
en_result_t Tim3_ClearIntFlag(en_tim3_irq_type_t enTim3Irq);
//所有中断标志清除
en_result_t Tim3_ClearAllIntFlag(void);
//模式0中断使能
en_result_t Tim3_Mode0_EnableIrq(void);
//模式1中断使能
en_result_t Tim3_Mode1_EnableIrq (en_tim3_irq_type_t enTim3Irq);
//模式2中断使能
en_result_t Tim3_Mode23_EnableIrq (en_tim3_irq_type_t enTim3Irq);
//模式0中断禁止
en_result_t Tim3_Mode0_DisableIrq(void);
//模式1中断禁止
en_result_t Tim3_Mode1_DisableIrq (en_tim3_irq_type_t enTim3Irq);
//模式2中断禁止
en_result_t Tim3_Mode23_DisableIrq (en_tim3_irq_type_t enTim3Irq);
//模式0初始化及相关功能操作
//timer配置及初始化
en_result_t Tim3_Mode0_Init(stc_tim3_mode0_cfg_t* pstcCfg);
//timer 启动/停止
en_result_t Tim3_M0_Run(void);
en_result_t Tim3_M0_Stop(void);
//重载值设置
en_result_t Tim3_M0_ARRSet(uint16_t u16Data);
//16位计数值设置/获取
en_result_t Tim3_M0_Cnt16Set(uint16_t u16Data);
uint16_t Tim3_M0_Cnt16Get(void);
//32位计数值设置/获取
en_result_t Tim3_M0_Cnt32Set(uint32_t u32Data);
uint32_t Tim3_M0_Cnt32Get(void);
//端口输出使能/禁止设定
en_result_t Tim3_M0_Enable_Output(boolean_t bEnOutput);
//翻转使能/禁止(低电平)设定
en_result_t Tim3_M0_EnTOG(boolean_t bEnTOG);
//模式1初始化及相关功能操作
//timer配置及初始化
en_result_t Tim3_Mode1_Init(stc_tim3_mode1_cfg_t* pstcCfg);
//PWC 输入配置
en_result_t Tim3_M1_Input_Cfg(stc_tim3_pwc_input_cfg_t* pstcCfg);
//PWC测量边沿起始结束选择
en_result_t Tim3_M1_PWC_Edge_Sel(en_tim3_m1cr_Edge_t enEdgeSel);
//timer 启动/停止
en_result_t Tim3_M1_Run(void);
en_result_t Tim3_M1_Stop(void);
//16位计数值设置/获取
en_result_t Tim3_M1_Cnt16Set(uint16_t u16Data);
uint16_t Tim3_M1_Cnt16Get(void);
//脉冲宽度测量结果数值获取
uint16_t Tim3_M1_PWC_CapValueGet(void);
//模式23初始化及相关功能操作
//timer配置及初始化
en_result_t Tim3_Mode23_Init(stc_tim3_mode23_cfg_t* pstcCfg);
//timer 启动/停止
en_result_t Tim3_M23_Run(void);
en_result_t Tim3_M23_Stop(void);
//PWM输出使能
en_result_t Tim3_M23_EnPWM_Output(boolean_t bEnOutput, boolean_t bEnAutoOutput);
//重载值设置
en_result_t Tim3_M23_ARRSet(uint16_t u16Data, boolean_t bArrBufEn);
//16位计数值设置/获取
en_result_t Tim3_M23_Cnt16Set(uint16_t u16Data);
uint16_t Tim3_M23_Cnt16Get(void);
//比较捕获寄存器CCR0A/CCR0B设置/读取
en_result_t Tim3_M23_CCR_Set(en_tim3_m23_ccrx_t enCCRSel, uint16_t u16Data);
uint16_t Tim3_M23_CCR_Get(en_tim3_m23_ccrx_t enCCRSel);
//PWM互补输出模式下GATE功能选择
en_result_t Tim3_M23_GateFuncSel(stc_tim3_m23_gate_cfg_t* pstcCfg);
//主从模式配置
en_result_t Tim3_M23_MasterSlave_Set(stc_tim3_m23_master_slave_cfg_t* pstcCfg);
//CH0A/CH0B比较通道控制
en_result_t Tim3_M23_PortOutput_Cfg(en_tim3_channel_t enTim3Chx, stc_tim3_m23_compare_cfg_t* pstcCfg);
//CH0A/CH0B输入控制
en_result_t Tim3_M23_PortInput_Cfg(en_tim3_channel_t enTim3Chx, stc_tim3_m23_input_cfg_t* pstcCfg);
//ERT输入控制
en_result_t Tim3_M23_ETRInput_Cfg(stc_tim3_m23_etr_input_cfg_t* pstcCfg);
//刹车BK输入控制
en_result_t Tim3_M23_BrakeInput_Cfg(stc_tim3_m23_bk_input_cfg_t* pstcBkCfg);
//触发ADC控制
en_result_t Tim3_M23_TrigADC_Cfg(stc_tim3_m23_adc_trig_cfg_t* pstcCfg);
//死区功能
en_result_t Tim3_M23_DT_Cfg(stc_tim3_m23_dt_cfg_t* pstcCfg);
//重复周期设置
en_result_t Tim3_M23_SetValidPeriod(uint8_t u8ValidPeriod);
//OCREF清除功能
en_result_t Tim3_M23_OCRefClr(stc_tim3_m23_OCREF_Clr_cfg_t* pstcCfg);
//使能DMA传输
en_result_t Tim3_M23_EnDMA(stc_tim3_m23_trig_dma_cfg_t* pstcCfg);
//捕获比较A软件触发
en_result_t Tim3_M23_EnSwTrigCapCmpA(en_tim3_channel_t enTim3Chx);
//捕获比较B软件触发
en_result_t Tim3_M23_EnSwTrigCapCmpB(en_tim3_channel_t enTim3Chx);
//软件更新使能
en_result_t Tim3_M23_EnSwUev(void);
//软件触发使能
en_result_t Tim3_M23_EnSwTrig(void);
//软件刹车使能
en_result_t Tim3_M23_EnSwBk(void);
//@} // Tim3Group
#ifdef __cplusplus
#endif
#endif /* __BT_H__ */
/******************************************************************************
* EOF (not truncated)
*****************************************************************************/

View File

@ -0,0 +1,184 @@
/******************************************************************************
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/*****************************************************************************/
/** \file trim.h
**
** TRIM API
**
**
** History:
** - 2018-04-21 Lux V1.0
**
*****************************************************************************/
#ifndef __TRIM_H__
#define __TRIM_H__
/*****************************************************************************
* Include files
*****************************************************************************/
#include "ddl.h"
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup TrimGroup Clock Trimming (TRIM)
**
******************************************************************************/
//@{
/******************************************************************************
** Global pre-processor symbols/macros ('#define')
******************************************************************************/
/******************************************************************************
* Global type definitions
******************************************************************************/
/**
******************************************************************************
** \brief 使 (MON_EN)
*****************************************************************************/
typedef enum en_trim_monitor
{
TrimMonDisable = 0u, ///< 禁止
TrimMonEnable = 0x40u, ///< 使能
}en_trim_monitor_t;
/**
******************************************************************************
** \brief / (CALCLK_SEL)
*****************************************************************************/
typedef enum en_trim_calclksel
{
TrimCalMskRCH = 0x000u, ///< RCH
TrimCalMskXTH = 0x010u, ///< XTH
TrimCalMskRCL = 0x020u, ///< RCL
TrimCalMskXTL = 0x030u, ///< XTL
TrimCalMskPLL = 0x100u, ///< PLL
}en_trim_calclksel_t;
/**
******************************************************************************
** \brief (REFCLK_SEL)
*****************************************************************************/
typedef enum en_trim_refclksel
{
TrimRefMskRCH = 0x0u, ///< RCH
TrimRefMskXTH = 0x2u, ///< XTH
TrimRefMskRCL = 0x4u, ///< RCL
TrimRefMskXTL = 0x6u, ///< XTL
TrimRefMskIRC10K = 0x8u, ///< IRC10K
TrimRefMskExtClk = 0xau, ///< 外部输入时钟
}en_trim_refclksel_t;
/**
******************************************************************************
** \brief
*****************************************************************************/
typedef enum en_trim_inttype
{
TrimStop = 0x01u, ///< 参考计数器停止标志
TrimCalCntOf = 0x02u, ///< 校准计数器溢出标志
TrimXTLFault = 0x04u, ///< XTL 失效标志
TrimXTHFault = 0x08u, ///< XTH 失效标志
TrimPLLFault = 0x10u, ///< PLL 失效标志
}en_trim_inttype_t;
/**
******************************************************************************
** \brief TRIM
*****************************************************************************/
typedef struct stc_trim_cfg
{
en_trim_monitor_t enMON; ///< 监测模式使能
en_trim_calclksel_t enCALCLK; ///< 校准时钟选择
uint32_t u32CalCon; ///< 校准计数器溢出值配置
en_trim_refclksel_t enREFCLK; ///< 参考时钟选择
uint32_t u32RefCon; ///< 参考计数器初值配置
}stc_trim_cfg_t;
/******************************************************************************
* Global variable declarations ('extern', definition in C source)
*****************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
*****************************************************************************/
///<<功能配置及操作函数
///<Trim 配置及初始化
en_result_t Trim_Init(stc_trim_cfg_t* pstcCfg);
///<校准/监测启动/停止
void Trim_Run(void);
void Trim_Stop(void);
///<参考计数器计数值获取
uint32_t Trim_RefCntGet(void);
///<校准计数器计数值获取
uint32_t Trim_CalCntGet(void);
///<中断操作相关函数
///中断使能/禁止
void Trim_EnableIrq(void);
void Trim_DisableIrq(void);
///<中断标志获取
boolean_t Trim_GetIntFlag(en_trim_inttype_t enIntType);
///<中断标志清除
en_result_t Trim_ClearIntFlag(en_trim_inttype_t enIntType);
//@} // TrimGroup
#ifdef __cplusplus
#endif
#endif /* __TRIM_H__ */
/******************************************************************************
* EOF (not truncated)
*****************************************************************************/

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/*******************************************************************************
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file trng.h
**
** Headerfile for RNG functions
** @link RNG Group Some description @endlink
**
** History:
** - 2018-04-15 Lux First Version
**
******************************************************************************/
#ifndef __TRNG_H__
#define __TRNG_H__
/*******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup TrngGroup (TRNG)
**
******************************************************************************/
//@{
/**
*******************************************************************************
** function prototypes.
******************************************************************************/
/*******************************************************************************
* Global definitions
******************************************************************************/
/******************************************************************************
* Global variable declarations ('extern', definition in C source)
******************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
///< 随机数初始化(上电第一次生成随机数)
en_result_t Trng_Init(void);
///< 生成随机数(非上电第一次生成随机数)
en_result_t Trng_Generate(void);
///< 获取64bits随机数执行随机数初始化或生成随机数函数后可使用该函数获取随机数值
uint32_t Trng_GetData0(void);
uint32_t Trng_GetData1(void);
//@} // Trng Group
#ifdef __cplusplus
#endif
#endif /* __TRNG_H__ */
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

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/*
* @Description:
* @Date: 2022-01-06 16:25:34
* @LastEditors: CK.Zh
* @LastEditTime: 2022-01-07 12:28:05
* @FilePath: /rt-thread/bsp/hc32l073/Libraries/HC32L073_StdPeriph_Driver/inc/uart.h
*/
/******************************************************************************
* Copyright (C) 2017, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/*****************************************************************************/
/** \file uart.h
**
** Headerfile for UART functions
**
**
** History:
** - 2017-05-10 Cathy First Version
**
*****************************************************************************/
#ifndef __UART_H__
#define __UART_H__
/*****************************************************************************
* Include files
*****************************************************************************/
#include "ddl.h"
#include "hc32l07x.h"
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup UartGroup Universal Asynchronous Receiver/Transmitter (UART)
**
******************************************************************************/
//@{
/******************************************************************************/
/* Global pre-processor symbols/macros ('#define') */
/******************************************************************************/
/******************************************************************************
* Global type definitions
******************************************************************************/
/**
******************************************************************************
**\brief uart
******************************************************************************/
/**
******************************************************************************
** \brief uart/
******************************************************************************/
typedef enum en_uart_mmdorck
{
UartMskDataOrAddr = 0u, ///<多机模式时通过读写SBUF[8]决定帧为数据帧或地址帧
UartMskEven = 0x4u, ///<非多机模式偶校验
UartMskOdd = 0x8u, ///<非多机模式奇校验
}en_uart_mmdorck_t;
/**
******************************************************************************
** \brief uart
******************************************************************************/
typedef struct stc_uart_multimode
{
uint8_t u8SlaveAddr; ///<从机地址
uint8_t u8SaddEn; ///<从及地址掩码
}stc_uart_multimode_t;
/**
******************************************************************************
** \brief uart
******************************************************************************/
typedef enum en_uart_mode
{
UartMskMode0 = 0x00u, ///<模式0
UartMskMode1 = 0x40u, ///<模式1
UartMskMode2 = 0x80u, ///<模式2
UartMskMode3 = 0xc0u, ///<模式3
} en_uart_mode_t;
/**
******************************************************************************
** \brief uart stop
******************************************************************************/
typedef enum en_uart_stop
{
UartMsk1bit = 0x0000u, ///<1位停止位
UartMsk1_5bit = 0x4000u, ///<1.5位停止位
UartMsk2bit = 0x8000u, ///<2位停止位
} en_uart_stop_t;
/**
******************************************************************************
** \brief uart 使
******************************************************************************/
typedef enum en_uart_func
{
UartRenFunc = 4u, ///<0-TX; ///<1-非mode0模式代表RX&TX ,mode0模式代表RX;
UartDmaRxFunc = 16u, ///<DMA接收功能
UartDmaTxFunc = 17u, ///<DMA发送功能
UartRtsFunc = 18u, ///<硬件流RTS功能
UartCtsFunc = 19u, ///<硬件流CTS功能
UartHdFunc = 22u, ///<单线半双工功能
}en_uart_func_t;
/**
******************************************************************************
** \brief uart使
******************************************************************************/
typedef enum en_uart_irq_sel
{
UartRxIrq = 0u, ///<接收中断使能
UartTxIrq = 1u, ///<发送中断使能
UartTxEIrq = 8u, ///<TX空中断使能
UartPEIrq = 13u, ///<奇偶校验中断使能
UartCtsIrq = 20u, ///<CTS信号翻转中断使能
UartFEIrq = 21u, ///<帧错误中断使能
}en_uart_irq_sel_t;
/**
******************************************************************************
** \brief uart
******************************************************************************/
typedef struct stc_uart_irq_cb
{
func_ptr_t pfnTxIrqCb; ///<发送中断服务函数
func_ptr_t pfnRxFEIrqCb; ///<接收帧错误中断服务函数
func_ptr_t pfnRxIrqCb; ///<接收中断服务函数
func_ptr_t pfnCtsIrqCb; ///<CTS信号翻转中断服务函数
func_ptr_t pfnPEIrqCb; ///<奇偶校验错误中断服务函数
}stc_uart_irq_cb_t;
/**
******************************************************************************
** \brief uart
******************************************************************************/
typedef enum en_uart_status
{
UartRC = 0u, ///<接收数据完成标记
UartTC = 1u, ///<发送数据完成标记
UartFE = 2u, ///<帧错误标记
UartTxe = 3u, ///<TXbuff空标记
UartPE = 4u, ///<奇偶校验错误标记
UartCtsIf = 5u, ///<CTS中断标记
UartCts = 6u, ///<CTS信号标记
}en_uart_status_t;
/**
******************************************************************************
** \brief uart
******************************************************************************/
typedef enum en_uart_clkdiv
{
UartMsk16Or32Div = 0u, ///<模式0无效模式1/3为16分频模式2为32分频
UartMsk8Or16Div = 0x200u, ///<模式0无效模式1/3为8分频模式2为16分频
}en_uart_clkdiv_t;
/**
******************************************************************************
** \brief uart Mode1Mode3
******************************************************************************/
typedef struct stc_uart_baud
{
en_uart_clkdiv_t enClkDiv; ///<采样分频
uint32_t u32Pclk; ///<pclk
uint32_t u32Baud; ///<波特率
} stc_uart_baud_t;
/**
******************************************************************************
** \uart
******************************************************************************/
typedef struct stc_uart_cfg
{
en_uart_mode_t enRunMode; ///<四种模式配置
en_uart_mmdorck_t enMmdorCk; ///<校验模式
en_uart_stop_t enStopBit; ///<停止位长度
stc_uart_baud_t stcBaud; ///<Mode1/3波特率配置
stc_uart_multimode_t* pstcMultiMode; ///<多主机模式配置
stc_uart_irq_cb_t* pstcIrqCb; ///<中断服务函数
boolean_t bTouchNvic; ///<NVIC中断使能
} stc_uart_cfg_t;
//UART初始化
en_result_t Uart_Init(M0P_UART_TypeDef* UARTx, stc_uart_cfg_t* pstcCfg);
///< UART 单线模式使能/禁止
void Uart_HdModeEnable(M0P_UART_TypeDef* UARTx);
void Uart_HdModeDisable(M0P_UART_TypeDef* UARTx);
//UART模块多机模式设置函数
en_result_t Uart_SetMultiMode(M0P_UART_TypeDef* UARTx,stc_uart_multimode_t* pstcMultiCfg);
//TB8数据设置
void Uart_SetTb8(M0P_UART_TypeDef* UARTx, boolean_t bTB8Value);
//RB8数据获取
boolean_t Uart_GetRb8(M0P_UART_TypeDef* UARTx);
//中断相关设置函数
en_result_t Uart_EnableIrq(M0P_UART_TypeDef* UARTx, en_uart_irq_sel_t enIrqSel);
en_result_t Uart_DisableIrq(M0P_UART_TypeDef* UARTx, en_uart_irq_sel_t enIrqSel);
//功能使能和禁止
en_result_t Uart_EnableFunc(M0P_UART_TypeDef* UARTx, en_uart_func_t enFunc);
en_result_t Uart_DisableFunc(M0P_UART_TypeDef* UARTx, en_uart_func_t enFunc);
//状态位的获取和清除
uint8_t Uart_GetIsr(M0P_UART_TypeDef* UARTx);
boolean_t Uart_GetStatus(M0P_UART_TypeDef* UARTx,en_uart_status_t enStatus);
en_result_t Uart_ClrIsr(M0P_UART_TypeDef* UARTx);
en_result_t Uart_ClrStatus(M0P_UART_TypeDef* UARTx,en_uart_status_t enStatus);
//数据收发操作
///< 数据查询模式发送
en_result_t Uart_SendDataPoll(M0P_UART_TypeDef* UARTx, uint8_t u8Data);
///< 数据中断模式发送
en_result_t Uart_SendDataIt(M0P_UART_TypeDef* UARTx, uint8_t u8Data);
uint8_t Uart_ReceiveData(M0P_UART_TypeDef* UARTx);
//@} // UartGroup
#ifdef __cplusplus
#endif
#endif /* __UART_H__ */
/******************************************************************************
* EOF (not truncated)
*****************************************************************************/

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/******************************************************************************
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file vc.h
**
** Headerfile for Voltage Comparator functions
** @link VC Group Some description @endlink
**
** - 2019-04-10 First Version
**
******************************************************************************/
#ifndef __VC_H__
#define __VC_H__
/******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup VcGroup Voltage Comparator (VC)
**
******************************************************************************/
//@{
/******************************************************************************
* Global type definitions
******************************************************************************/
/**
******************************************************************************
** \brief VC
*****************************************************************************/
typedef enum
{
VcChannel0 = 0u, // 通道0
VcChannel1 = 1u, // 通道1
VcChannel2 = 2u // 通道2
}en_vc_channel_t;
/**
******************************************************************************
** \brief VC VC_CR VCx_HYS_SEL(x=012)
*****************************************************************************/
typedef enum
{
VcDelayoff = 0u, // 迟滞关闭
VcDelay10mv = 1u, // 迟滞10mv
VcDelay20mv = 2u, // 迟滞20mv
VcDelay30mv = 3u, // 迟滞30mv
}en_vc_cmp_delay_t;
/**
******************************************************************************
** \brief VC VC_CR VCx_BIAS_SEL(x=012)
*****************************************************************************/
typedef enum
{
VcBias300na = 0u, // 偏置电流300nA
VcBias1200na = 1u, // 偏置电流1.2uA
VcBias10ua = 2u, // 偏置电流10uA
VcBias20ua = 3u, // 偏置电流20uA
}en_vc_bias_current_t;
/**
******************************************************************************
** \brief VC VCx_CR debounce_time(x=012)
*****************************************************************************/
typedef enum
{
VcFilter7us = 0u, // 输出滤波时间7us
VcFilter14us = 1u, // 输出滤波时间14us
VcFilter28us = 2u, // 输出滤波时间28us
VcFilter112us = 3u, // 输出滤波时间112us
VcFilter450us = 4u, // 输出滤波时间450us
VcFilter1800us = 5u, // 输出滤波时间1.8ms
VcFilter7200us = 6u, // 输出滤波时间7.2ms
VcFilter28800us = 7u, // 输出滤波时间28.8ms
}en_vc_resp_filter_t;
/**
******************************************************************************
** \brief VC P
*****************************************************************************/
typedef enum
{
//VC0 //VC1 //VC2
VcInPCh0 = 0u, // 输入通道0 PC0 输入通道0 PA0 输入通道0 PA5
VcInPCh1 = 1u, // 输入通道1 PC1 输入通道1 PA1 输入通道1 PB1
VcInPCh2 = 2u, // 输入通道2 PC2 输入通道2 PA2 输入通道2 PE9
VcInPCh3 = 3u, // 输入通道3 PC3 输入通道3 PA3 输入通道3 PE10
VcInPCh4 = 4u, // 输入通道4 PA0 输入通道4 PA4 输入通道4 PE11
VcInPCh5 = 5u, // 输入通道5 PA1 输入通道5 PA5 输入通道5 PE13
VcInPCh6 = 6u, // 输入通道6 PA2 输入通道6 PB1 输入通道6 PE14
VcInPCh7 = 7u, // 输入通道7 PA3 输入通道7 PB2 输入通道7 PE15
VcInPCh8 = 8u, // 输入通道7 PA4 输入通道8 PB10 输入通道8 PB11
VcInPCh9 = 9u, // 输入通道7 PA5 输入通道9 PB12 输入通道9 PB14
VcInPCh10 = 10u, // 输入通道7 PA6 输入通道10 PB13 输入通道10 PD9
VcInPCh11 = 11u, // 输入通道7 PA7 输入通道11 PB14 输入通道11 PD10
VcInPCh12 = 12u, // 输入通道7 PB4 输入通道12 PB4 输入通道12 PD11
VcInPCh13 = 13u, // 输入通道7 PB5 输入通道13 DAC0 输入通道13 PC7
VcInPCh14 = 14u, // 输入通道7 PB6 输入通道14 PB6 输入通道14 DAC0
VcInPCh15 = 15u, // 输入通道7 DAC0 输入通道15 PB7 输入通道15 DAC0
}en_vc_input_p_src_t;
/**
******************************************************************************
** \brief VC N
*****************************************************************************/
typedef enum
{
//VC0 //VC1 //VC2
VcInNCh0 = 0u, // 输入通道0 PA0 输入通道0 PC0 输入通道0 PA5
VcInNCh1 = 1u, // 输入通道1 PA1 输入通道1 PC1 输入通道1 PB1
VcInNCh2 = 2u, // 输入通道2 PA2 输入通道2 PC2 输入通道2 PE11
VcInNCh3 = 3u, // 输入通道3 PA3 输入通道3 PC3 输入通道3 PE15
VcInNCh4 = 4u, // 输入通道4 PA4 输入通道4 PA0 输入通道4 PB11
VcInNCh5 = 5u, // 输入通道5 PA5 输入通道5 PA1 输入通道5 PB14
VcInNCh6 = 6u, // 输入通道6 PA6 输入通道6 PB0 输入通道6 PD10
VcInNCh7 = 7u, // 输入通道7 PA7 输入通道7 PB1 输入通道7 PD11
VcInNCh8 = 8u, // 输入通道8 PC4 输入通道8 PB2 输入通道8 PC7
VcInNCh9 = 9u, // 输入通道9 PC5 输入通道9 PB3 输入通道9 DAC0
VcInNCh10 = 10u, // 输入通道10 DAC0 输入通道10 DAC1 输入通道10 DAC0
ResDivOut = 11u, // 电阻分压 电阻分压 NA
AiTs = 12u, // 内部温度传感器输出电压 内部温度传感器输出电压 内部温度传感器输出电压
AiBg1p2 = 13u, // 内部基准1.2V 内部基准1.2V 内部基准1.2V
AiAdcVref = 14u, // ADC参考电压VREF ADC参考电压VREF ADC参考电压VREF
AiLdo = 15u, // LDO输出电压 LDO输出电压 LDO输出电压
}en_vc_input_n_src_t;
/**
******************************************************************************
** \brief VC
*****************************************************************************/
typedef enum en_vc_irq_sel
{
VcIrqNone = 0u, ///< 无中断
VcIrqRise = 1u, ///< 上升沿触发
VcIrqFall = 2u, ///< 下降沿触发
VcIrqHigh = 3u, ///< 高电平触发
}en_vc_irq_sel_t;
/**
******************************************************************************
** \brief VC VC_IFR
*****************************************************************************/
typedef enum en_vc_stat
{
Vc0_Intf = 0u, // VC0中断标志
Vc1_Intf = 1u, // VC1中断标志
Vc0_Filter = 2u, // VC0 Filter 后的状态
Vc1_Filter = 3u, // VC1 Filter 后的状态
Vc2_Intf = 4u, // VC2中断标志
Vc2_Filter = 5u // VC2 Filter 后的状态
}en_vc_ifr_t;
/**
******************************************************************************
** \brief VC VCx_OUT_CFG(x=012)
** \note VC0CHX = CHAVC1 VC2CHX = CHB
*****************************************************************************/
typedef enum en_vc_output_cfg
{
VcOutInvTimer = 0u, // 结果输出反向到各Timer0,1,2,3 REFCLR
VcOutTIM0RCLR = 1u, // 结果输出到TIM0 REFCLR使能控制
VcOutTIM1RCLR = 2u, // 结果输出到TIM1 REFCLR使能控制
VcOutTIM2RCLR = 3u, // 结果输出到TIM2 REFCLR使能控制
VcOutTIM3RCLR = 4u, // 结果输出到TIM3 REFCLR使能控制
VcOutTIMBK = 5u, // 结果输出到Timer0,1,2,3刹车控制
VcOutInvTIM4 = 9u, // 结果输出到Timer4反向使能
VcOutTIM4 = 10u, // 结果输出到Timer4捕获输入CHX使能
VcOutInvTIM5 = 11u, // 结果输出到Timer5反向使能
VcOutTIM5 = 12u, // 结果输出到Timer5捕获输入CHX使能
VcOutInvTIM6 = 13u, // 结果输出到Timer6反向使能
VcOutTIM6 = 14u, // 结果输出到Timer6捕获输入CHX使能
VcOutBrake = 15u, // 结果作为Advanced Timer刹车控制
VcOutDisable = 16u // 结果输出除能
}en_vc_output_cfg_t;
/**
******************************************************************************
** \brief VC DIVVref VC_CR VC_REF2P5_SEL
*****************************************************************************/
typedef enum en_vc_div_vref
{
VcDivVrefAvcc = 0u, ///< AVCC
VcDivVrefAdc = 1u, ///< ADC_CR0 SREF选择参考电压
}en_vc_div_vref_t;
/**
******************************************************************************
** \brief VC VC_CR VC_REF2P5_SEL VC_DIV_EN VC_DIV
*****************************************************************************/
typedef struct stc_vc_dac_cfg
{
boolean_t bDivEn; // VC_CR: VC_DIV_EN
uint8_t u8DivVal; // VC_CR: VC_DIV 范围0-63
en_vc_div_vref_t enDivVref; // VC_CR: VC_REF2P5_SEL
}stc_vc_dac_cfg_t;
/**
******************************************************************************
** \brief VC
*****************************************************************************/
typedef struct stc_vc_channel_cfg
{
en_vc_channel_t enVcChannel; // VC通道选择
en_vc_cmp_delay_t enVcCmpDly; // VC迟滞
en_vc_bias_current_t enVcBiasCurrent; // VC功耗选择
en_vc_resp_filter_t enVcFilterTime; // 输出滤波时间
en_vc_input_p_src_t enVcInPin_P; // P端输入
en_vc_input_n_src_t enVcInPin_N; // N端输入
en_vc_output_cfg_t enVcOutCfg; // 输出配置
boolean_t bFlten; // 滤波输出使能
}stc_vc_channel_cfg_t;
/******************************************************************************
* Global definitions
******************************************************************************/
/******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
extern void Vc_CfgItType(en_vc_channel_t Channelx, en_vc_irq_sel_t ItType);
extern void Vc_ItCfg(en_vc_channel_t Channelx, boolean_t NewStatus);
extern boolean_t Vc_GetItStatus(en_vc_ifr_t Result);
extern void Vc_ClearItStatus(en_vc_ifr_t NewStatus);
extern en_result_t Vc_DacInit(stc_vc_dac_cfg_t *pstcDacCfg);
extern void Vc_Init(stc_vc_channel_cfg_t *pstcChannelCfg);
extern void Vc_Cmd(en_vc_channel_t enChannel, boolean_t NewStatus);
#ifdef __cplusplus
}
#endif
#endif /* __VC_H__ */
/******************************************************************************
* EOF (not truncated)
******************************************************************************/

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@ -0,0 +1,135 @@
/******************************************************************************
* Copyright (C) 2017, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/*****************************************************************************/
/** \file wdt.h
**
** Headerfile for WDT functions
**
**
** History:
** - 2017-05-10 Cathy First Version
**
*****************************************************************************/
#ifndef __WDT_H__
#define __WDT_H__
#include "ddl.h"
/**
******************************************************************************
** \defgroup WdtGroup Watchdog Timer (WDT)
**
******************************************************************************/
//@{
/******************************************************************************/
/* Global pre-processor symbols/macros ('#define') */
/******************************************************************************/
/******************************************************************************
* Global type definitions
******************************************************************************/
/**
******************************************************************************
** \brief wdt
*****************************************************************************/
typedef enum en_wdt_func
{
WdtResetEn = 0, ///<复位使能
WdtIntEn = 1, ///<中断使能
}en_wdt_func_t;
/**
******************************************************************************
** \brief wdt
*****************************************************************************/
typedef enum en_wdt_time
{
WdtT1ms6 = 0u, ///<1.6ms
WdtT3ms2 = 1u, ///<3.2ms
WdtT6ms4 = 2u, ///<6.4ms
WdtT13ms = 3u, ///<13ms
WdtT26ms = 4u, ///<26ms
WdtT51ms = 5u, ///<51ms
WdtT102ms = 6u, ///<102ms
WdtT205ms = 7u, ///<205ms
WdtT500ms = 8u, ///<500ms
WdtT820ms = 9u, ///<820ms
WdtT1s64 = 10u, ///<1.64s
WdtT3s28 = 11u, ///<3.28s
WdtT6s55 = 12u, ///<6.55s
WdtT13s1 = 13u, ///<13.1s
WdtT26s2 = 14u, ///<26.2s
WdtT52s4 = 15u, ///<52.4s
}en_wdt_time_t;
//wdt初始化
en_result_t Wdt_Init(en_wdt_func_t enFunc, en_wdt_time_t enTime);
//wdt开始和停止
void Wdt_Start(void);
//喂狗处理
void Wdt_Feed(void);
//喂狗处理
void Wdt_IrqClr(void);
//wdt溢出时间设置
void Wdt_WriteWdtLoad(uint8_t u8LoadValue);
///< 当前计数时间获取
uint8_t Wdt_ReadWdtValue(void);
//< 中断状态获取
boolean_t Wdt_GetIrqStatus(void);
///< 运行状态获取
boolean_t Wdt_ReadwdtStatus(void);
//@} // WdtGroup
#ifdef __cplusplus
#endif
#endif /* __WDT_H__ */

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@ -0,0 +1,661 @@
/******************************************************************************
* Copyright (C) 2017, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file adc.c
**
** ADC driver API.
**
** - 2017-06-28 Alex First Version
**
******************************************************************************/
/******************************************************************************
* Include files
******************************************************************************/
#include "adc.h"
/**
******************************************************************************
** \addtogroup AdcGroup
******************************************************************************/
//@{
/******************************************************************************
* Local pre-processor symbols/macros ('#define')
******************************************************************************/
/******************************************************************************
* Global variable definitions (declared in header file with 'extern')
******************************************************************************/
/******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/******************************************************************************
* Local function prototypes ('static')
******************************************************************************/
/******************************************************************************
* Local variable definitions ('static')
******************************************************************************/
/*****************************************************************************
* Function implementation - global ('extern') and local ('static')
*****************************************************************************/
/**
* \brief
* ADC
*
* \param [in] enAdcIrq ADC @ref en_adc_irq_type_t
*
* \retval
*/
boolean_t Adc_GetIrqStatus(en_adc_irq_type_t enAdcIrq)
{
if(M0P_ADC->IFR&enAdcIrq)
{
return TRUE;
}
else
{
return FALSE;
}
}
/**
* \brief
* ADC
*
* \param [in] enAdcIrq ADC @ref en_adc_irq_type_t
*
* \retval Null
*/
void Adc_ClrIrqStatus(en_adc_irq_type_t enAdcIrq)
{
M0P_ADC->ICR &= ~(uint32_t)enAdcIrq;
}
/**
* \brief
* ADC使
*
* \param
*
* \retval
*/
void Adc_EnableIrq(void)
{
M0P_ADC->CR0_f.IE = 1u;
}
/**
* \brief
* ADC
*
* \param
*
* \retval
*/
void Adc_DisableIrq(void)
{
M0P_ADC->CR0_f.IE = 0u;
}
/**
* \brief
* ADC
*
* \param [in] pstcAdcCfg ADC
*
* \retval en_result_t Ok:
* \retval en_result_t ErrorInvalidParameter:
*/
en_result_t Adc_Init(stc_adc_cfg_t* pstcAdcCfg)
{
if (NULL == pstcAdcCfg)
{
return ErrorInvalidParameter;
}
M0P_ADC->CR0 = 0x1u; ///< ADC 使能
delay10us(2);
M0P_ADC->CR0 |= (uint32_t)pstcAdcCfg->enAdcClkDiv |
(uint32_t)pstcAdcCfg->enAdcRefVolSel |
(uint32_t)pstcAdcCfg->enAdcOpBuf |
(uint32_t)pstcAdcCfg->enAdcSampCycleSel |
(uint32_t)pstcAdcCfg->enInRef;
M0P_ADC->CR1_f.MODE = pstcAdcCfg->enAdcMode;
M0P_ADC->CR1_f.ALIGN = pstcAdcCfg->enAdcAlign;
return Ok;
}
/**
* \brief
* ADC
*
* \param [in] enAdcTrigSel
*
* \retval en_result_t Null
*/
void Adc_SglExtTrigCfg(en_adc_trig_sel_t enAdcTrigSel, boolean_t bValue)
{
if(TRUE == bValue)
{
M0P_ADC->EXTTRIGGER0 |= (uint32_t)enAdcTrigSel;
}
else
{
M0P_ADC->EXTTRIGGER0 &= ~(uint32_t)enAdcTrigSel;
}
}
/**
* \brief
* ADC
*
* \param [in] enAdcTrigSel
* \param [in] TRUE or FALSE
*
* \retval en_result_t Null
*/
void Adc_SqrExtTrigCfg(en_adc_trig_sel_t enAdcTrigSel, boolean_t bValue)
{
if(TRUE == bValue)
{
M0P_ADC->EXTTRIGGER0 |= (uint32_t)enAdcTrigSel;
}
else
{
M0P_ADC->EXTTRIGGER0 &= ~(uint32_t)enAdcTrigSel;
}
}
/**
* \brief
* ADC
*
* \param [in] enAdcTrigSel
* \param [in] TRUE or FALSE
*
* \retval en_result_t Null
*/
void Adc_JqrExtTrigCfg(en_adc_trig_sel_t enAdcTrigSel, boolean_t bValue)
{
if(TRUE == bValue)
{
M0P_ADC->EXTTRIGGER1 |= (uint32_t)enAdcTrigSel;
}
else
{
M0P_ADC->EXTTRIGGER1 &= ~(uint32_t)enAdcTrigSel;
}
}
/**
* \brief
* ADC
*
* \param
*
* \retval
*/
void Adc_SGL_Start(void)
{
M0P_ADC->SGLSTART = 1u;
}
/**
* \brief
* ADC
*
* \param
*
* \retval
*/
void Adc_SGL_Stop(void)
{
M0P_ADC->SGLSTART = 0u;
}
/**
* \brief
* ADC
*
* \param
*
* \retval
*/
void Adc_SGL_Always_Start(void)
{
M0P_ADC->ALLSTART = 1u;
}
/**
* \brief
* ADC
*
* \param
*
* \retval
*/
void Adc_SGL_Always_Stop(void)
{
M0P_ADC->ALLSTART = 0u;
}
/**
* \brief
* ADC
*
* \param
*
* \retval
*/
void Adc_SQR_Start(void)
{
M0P_ADC->SQRSTART = 1u;
}
/**
* \brief
* ADC
*
* \param
*
* \retval
*/
void Adc_SQR_Stop(void)
{
M0P_ADC->SQRSTART = 0u;
}
/**
* \brief
* ADC
*
* \param
*
* \retval
*/
void Adc_JQR_Start(void)
{
M0P_ADC->JQRSTART = 1u;
}
/**
* \brief
* ADC
*
* \param
*
* \retval
*/
void Adc_JQR_Stop(void)
{
M0P_ADC->JQRSTART = 0u;
}
/**
* \brief
* ADC使
*
* \param
*
* \retval
*/
void Adc_Enable(void)
{
M0P_ADC->CR0_f.EN = 1u;
}
/**
* \brief
* ADC
*
* \param
*
* \retval
*/
void Adc_Disable(void)
{
M0P_ADC->CR0_f.EN = 0u;
}
/**
* \brief
*
*
* \param [in] pstcAdcCfg ADC
* \param [in] pstcAdcNormCfg
*
* \retval en_result_t Ok:
* \retval en_result_t ErrorInvalidParameter:
*/
en_result_t Adc_SqrModeCfg(stc_adc_sqr_cfg_t* pstcAdcSqrCfg)
{
if ((NULL == pstcAdcSqrCfg) || (pstcAdcSqrCfg->u8SqrCnt > 16))
{
return ErrorInvalidParameter;
}
M0P_ADC->CR1_f.RACCCLR = 0; //ADC转换结果累加寄存器ADC_ResultAcc清零
M0P_ADC->CR1_f.RACCEN = pstcAdcSqrCfg->enResultAcc;
M0P_ADC->CR1_f.DMASQR = pstcAdcSqrCfg->bSqrDmaTrig;
M0P_ADC->SQR2_f.CNT = pstcAdcSqrCfg->u8SqrCnt - 1;
return Ok;
}
/**
* \brief
*
*
* \param [in] pstcAdcCfg ADC
* \param [in] pstcAdcNormCfg
*
* \retval en_result_t Ok:
* \retval en_result_t ErrorInvalidParameter:
*/
en_result_t Adc_JqrModeCfg(stc_adc_jqr_cfg_t* pstcAdcJqrCfg)
{
if ((NULL == pstcAdcJqrCfg) || (pstcAdcJqrCfg->u8JqrCnt > 4))
{
return ErrorInvalidParameter;
}
M0P_ADC->CR1_f.DMASQR = pstcAdcJqrCfg->bJqrDmaTrig;
M0P_ADC->JQR_f.CNT = pstcAdcJqrCfg->u8JqrCnt - 1;
return Ok;
}
/**
* \brief
*
*
* \param [in]enstcAdcSampCh
*
* \retval en_result_t Ok:
* \retval en_result_t ErrorInvalidParameter:
*/
en_result_t Adc_CfgSglChannel( en_adc_samp_ch_sel_t enstcAdcSampCh)
{
M0P_ADC->CR0_f.SGLMUX = enstcAdcSampCh;
return Ok;
}
/**
* \brief
*
*
* \param [in]enstcAdcSqrChMux
* \param [in]enstcAdcSampCh
*
* \retval en_result_t Ok:
* \retval en_result_t ErrorInvalidParameter:
*/
en_result_t Adc_CfgSqrChannel(en_adc_sqr_chmux_t enstcAdcSqrChMux, en_adc_samp_ch_sel_t enstcAdcSampCh)
{
en_result_t enResult = Ok;
switch(enstcAdcSqrChMux)
{
case AdcSQRCH0MUX:
M0P_ADC->SQR0_f.CH0MUX = enstcAdcSampCh;
break;
case AdcSQRCH1MUX:
M0P_ADC->SQR0_f.CH1MUX = enstcAdcSampCh;
break;
case AdcSQRCH2MUX:
M0P_ADC->SQR0_f.CH2MUX = enstcAdcSampCh;
break;
case AdcSQRCH3MUX:
M0P_ADC->SQR0_f.CH3MUX = enstcAdcSampCh;
break;
case AdcSQRCH4MUX:
M0P_ADC->SQR0_f.CH4MUX = enstcAdcSampCh;
break;
case AdcSQRCH5MUX:
M0P_ADC->SQR0_f.CH5MUX = enstcAdcSampCh;
break;
case AdcSQRCH6MUX:
M0P_ADC->SQR1_f.CH6MUX = enstcAdcSampCh;
break;
case AdcSQRCH7MUX:
M0P_ADC->SQR1_f.CH7MUX = enstcAdcSampCh;
break;
case AdcSQRCH8MUX:
M0P_ADC->SQR1_f.CH8MUX = enstcAdcSampCh;
break;
case AdcSQRCH9MUX:
M0P_ADC->SQR1_f.CH9MUX = enstcAdcSampCh;
break;
case AdcSQRCH10MUX:
M0P_ADC->SQR1_f.CH10MUX = enstcAdcSampCh;
break;
case AdcSQRCH11MUX:
M0P_ADC->SQR1_f.CH11MUX = enstcAdcSampCh;
break;
case AdcSQRCH12MUX:
M0P_ADC->SQR2_f.CH12MUX = enstcAdcSampCh;
break;
case AdcSQRCH13MUX:
M0P_ADC->SQR2_f.CH13MUX = enstcAdcSampCh;
break;
case AdcSQRCH14MUX:
M0P_ADC->SQR2_f.CH14MUX = enstcAdcSampCh;
break;
case AdcSQRCH15MUX:
M0P_ADC->SQR2_f.CH15MUX = enstcAdcSampCh;
break;
default:
enResult = ErrorInvalidParameter;
break;
}
return enResult;
}
/**
* \brief
*
*
* \param [in]enstcAdcSqrChMux
* \param [in]enstcAdcSampCh
*
* \retval en_result_t Ok:
* \retval en_result_t ErrorInvalidParameter:
*/
en_result_t Adc_CfgJqrChannel(en_adc_jqr_chmux_t enstcAdcJqrChMux, en_adc_samp_ch_sel_t enstcAdcSampCh)
{
en_result_t enResult = Ok;
switch(enstcAdcJqrChMux)
{
case AdcJQRCH0MUX:
M0P_ADC->JQR_f.CH0MUX = enstcAdcSampCh;
break;
case AdcJQRCH1MUX:
M0P_ADC->JQR_f.CH1MUX = enstcAdcSampCh;
break;
case AdcJQRCH2MUX:
M0P_ADC->JQR_f.CH2MUX = enstcAdcSampCh;
break;
case AdcJQRCH3MUX:
M0P_ADC->JQR_f.CH3MUX = enstcAdcSampCh;
break;
default:
enResult = ErrorInvalidParameter;
break;
}
return enResult;
}
/**
* \brief
*
*
*
* \retval en_result_t
*/
uint32_t Adc_GetSglResult(void)
{
return M0P_ADC->RESULT;
}
/**
* \brief
*
*
* \param [in] enstcAdcSqrChMux @ref en_adc_sqr_chmux_t
*
* \retval en_result_t
*/
uint32_t Adc_GetSqrResult(en_adc_sqr_chmux_t enstcAdcSqrChMux)
{
volatile uint32_t *BaseSqrResultAddress = &(M0P_ADC->SQRRESULT0);
return *(BaseSqrResultAddress + enstcAdcSqrChMux);
}
/**
* \brief
*
*
* \param [in] enstcAdcJqrChMux @ref en_adc_jqr_chmux_t
*
* \retval en_result_t
*/
uint32_t Adc_GetJqrResult(en_adc_jqr_chmux_t enstcAdcJqrChMux)
{
volatile uint32_t *BaseJqrResultAddress = &(M0P_ADC->JQRRESULT0);
return *(BaseJqrResultAddress + enstcAdcJqrChMux);
}
/**
* \brief
*
*
*
* \retval en_result_t
*/
uint32_t Adc_GetAccResult(void)
{
return M0P_ADC->RESULTACC;
}
/**
* \brief
*
*
* \param
*
* \retval
*/
void Adc_ClrAccResult(void)
{
M0P_ADC->CR1_f.RACCCLR = 0u;
}
/**
* \brief
* ADC使()
*
* \param [in] pstcAdcIrqCfg ADC @ref stc_adc_threshold_cfg_t
*
* \retval
*/
void Adc_ThresholdCfg(stc_adc_threshold_cfg_t* pstcAdcThrCfg)
{
M0P_ADC->HT = pstcAdcThrCfg->u32AdcHighThd;
M0P_ADC->LT = pstcAdcThrCfg->u32AdcLowThd;
M0P_ADC->CR1_f.THCH = pstcAdcThrCfg->enSampChSel;
M0P_ADC->CR1_f.REGCMP = pstcAdcThrCfg->bAdcRegCmp;
M0P_ADC->CR1_f.HTCMP = pstcAdcThrCfg->bAdcHtCmp;
M0P_ADC->CR1_f.LTCMP = pstcAdcThrCfg->bAdcLtCmp;
}
/**
* \brief
* ADC
*
* \param [in] enChMap ADC @ref en_adc_channel_remap_type_t
*
* \retval
*/
void Adc_ChannelRemap(en_adc_channel_remap_type_t enChMap)
{
M0P_ADC->CR0_f.CHMAP = enChMap;
}
//@} // AdcGroup
/******************************************************************************
* EOF (not truncated)
******************************************************************************/

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@ -0,0 +1,206 @@
/******************************************************************************
*Copyright(C)2017, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/** \file aes.c
**
** Common API of AES.
** @link AesGroup Some description @endlink
**
** - 2019-04-16
**
******************************************************************************/
/*******************************************************************************
* Include files
******************************************************************************/
#include "aes.h"
/**
*******************************************************************************
** \addtogroup AesGroup
******************************************************************************/
//@{
/*******************************************************************************
* Local pre-processor symbols/macros ('#define')
******************************************************************************/
/*******************************************************************************
* Global variable definitions (declared in header file with 'extern')
******************************************************************************/
/*******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/*******************************************************************************
* Local variable definitions ('static')
******************************************************************************/
/*******************************************************************************
* Local function prototypes ('static')
******************************************************************************/
/*******************************************************************************
* Function implementation - global ('extern') and local ('static')
******************************************************************************/
/**
* \brief
* AES
*
* \param [in] pstcAesCfg AES @ref stc_aes_cfg_t
*
* \retval en_result_t Ok:
* \retval en_result_t ErrorInvalidParameter:
*/
en_result_t AES_Encrypt(stc_aes_cfg_t* pstcAesCfg)
{
if (NULL == pstcAesCfg)
{
return ErrorInvalidParameter;
}
M0P_AES->CR_f.KEYSIZE = pstcAesCfg->enKeyLen;
//Key cfg
M0P_AES->KEY0 = pstcAesCfg->pu32Key[0];
M0P_AES->KEY1 = pstcAesCfg->pu32Key[1];
M0P_AES->KEY2 = pstcAesCfg->pu32Key[2];
M0P_AES->KEY3 = pstcAesCfg->pu32Key[3];
if(AesKey192 == pstcAesCfg->enKeyLen)
{
M0P_AES->KEY4 = pstcAesCfg->pu32Key[4];
M0P_AES->KEY5 = pstcAesCfg->pu32Key[5];
}
if(AesKey256 == pstcAesCfg->enKeyLen)
{
M0P_AES->KEY4 = pstcAesCfg->pu32Key[4];
M0P_AES->KEY5 = pstcAesCfg->pu32Key[5];
M0P_AES->KEY6 = pstcAesCfg->pu32Key[6];
M0P_AES->KEY7 = pstcAesCfg->pu32Key[7];
}
//Data cfg
M0P_AES->DATA0 = pstcAesCfg->pu32Plaintext[0];
M0P_AES->DATA1 = pstcAesCfg->pu32Plaintext[1];
M0P_AES->DATA2 = pstcAesCfg->pu32Plaintext[2];
M0P_AES->DATA3 = pstcAesCfg->pu32Plaintext[3];
M0P_AES->CR_f.MODE = 0;//Encry
M0P_AES->CR_f.START = 1;
while(M0P_AES->CR_f.START == 1)
{
;
}
pstcAesCfg->pu32Cipher[0] = M0P_AES->DATA0;
pstcAesCfg->pu32Cipher[1] = M0P_AES->DATA1;
pstcAesCfg->pu32Cipher[2] = M0P_AES->DATA2;
pstcAesCfg->pu32Cipher[3] = M0P_AES->DATA3;
return Ok;
}
/**
* \brief
* AES
*
* \param [in] pstcAesCfg AES @ref stc_aes_cfg_t
*
* \retval en_result_t Ok:
* \retval en_result_t ErrorInvalidParameter:
*/
en_result_t AES_Decrypt(stc_aes_cfg_t* pstcAesCfg)
{
if (NULL == pstcAesCfg)
{
return ErrorInvalidParameter;
}
M0P_AES->CR_f.KEYSIZE = pstcAesCfg->enKeyLen;
//Key cfg
M0P_AES->KEY0 = pstcAesCfg->pu32Key[0];
M0P_AES->KEY1 = pstcAesCfg->pu32Key[1];
M0P_AES->KEY2 = pstcAesCfg->pu32Key[2];
M0P_AES->KEY3 = pstcAesCfg->pu32Key[3];
if(AesKey192 == pstcAesCfg->enKeyLen)
{
M0P_AES->KEY4 = pstcAesCfg->pu32Key[4];
M0P_AES->KEY5 = pstcAesCfg->pu32Key[5];
}
if(AesKey256 == pstcAesCfg->enKeyLen)
{
M0P_AES->KEY4 = pstcAesCfg->pu32Key[4];
M0P_AES->KEY5 = pstcAesCfg->pu32Key[5];
M0P_AES->KEY6 = pstcAesCfg->pu32Key[6];
M0P_AES->KEY7 = pstcAesCfg->pu32Key[7];
}
//Data cfg
M0P_AES->DATA0 = pstcAesCfg->pu32Cipher[0];
M0P_AES->DATA1 = pstcAesCfg->pu32Cipher[1];
M0P_AES->DATA2 = pstcAesCfg->pu32Cipher[2];
M0P_AES->DATA3 = pstcAesCfg->pu32Cipher[3];
M0P_AES->CR_f.MODE = 1;//UnEncry
M0P_AES->CR_f.START = 1;
while(M0P_AES->CR_f.START == 1)
{
;
}
pstcAesCfg->pu32Plaintext[0] = M0P_AES->DATA0;
pstcAesCfg->pu32Plaintext[1] = M0P_AES->DATA1;
pstcAesCfg->pu32Plaintext[2] = M0P_AES->DATA2;
pstcAesCfg->pu32Plaintext[3] = M0P_AES->DATA3;
return Ok;
}
//@} // AesGroup
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

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@ -0,0 +1,143 @@
/******************************************************************************
*Copyright(C)2018, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/** \file bgr.c
**
** Common API of bgr.
** @link flashGroup Some description @endlink
**
** - 2018-05-08
**
******************************************************************************/
/*******************************************************************************
* Include files
******************************************************************************/
#include "bgr.h"
/**
*******************************************************************************
** \addtogroup FlashGroup
******************************************************************************/
//@{
/*******************************************************************************
* Local pre-processor symbols/macros ('#define')
******************************************************************************/
/*******************************************************************************
* Global variable definitions (declared in header file with 'extern')
******************************************************************************/
/*******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/*******************************************************************************
* Local variable definitions ('static')
******************************************************************************/
/*******************************************************************************
* Local function prototypes ('static')
******************************************************************************/
/*******************************************************************************
* Function implementation - global ('extern') and local ('static')
******************************************************************************/
/**
*****************************************************************************
** \brief BGR 使
**
**
** \retval Null
*****************************************************************************/
void Bgr_BgrEnable(void)
{
M0P_BGR->CR |= 0x1u;
delay10us(2);
}
/**
*****************************************************************************
** \brief BGR
**
**
** \retval Null
*****************************************************************************/
void Bgr_BgrDisable(void)
{
M0P_BGR->CR &= 0x2u;
}
/**
*****************************************************************************
** \brief BGR 使(BGR)
**
**
** \retval Null
*****************************************************************************/
void Bgr_TempSensorEnable(void)
{
M0P_BGR->CR |= 0x2u;
delay10us(2);
}
/**
*****************************************************************************
** \brief BGR
**
**
** \retval Null
*****************************************************************************/
void Bgr_TempSensorDisable(void)
{
M0P_BGR->CR &= 0x1u;
}
//@} // BgrGroup
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

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@ -0,0 +1,576 @@
/*******************************************************************************
* Copyright (C) 2016, Huada Semiconductor Co., Ltd. All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co., Ltd. ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACCOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file hc32f46x_can.c
**
** A detailed description is available at
** @link CanGroup CAN description @endlink
**
** - 2018-12-13 1.0 Lux First version for Device Driver Library of CAN.
**
******************************************************************************/
/*******************************************************************************
* Include files
******************************************************************************/
#include "can.h"
/**
*******************************************************************************
** \addtogroup CanGroup
******************************************************************************/
//@{
/*******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/*******************************************************************************
* Local pre-processor symbols/macros ('#define')
******************************************************************************/
#define CAN_RESET_ENABLE() M0P_CAN->CFG_STAT_f.RESET = 1;
#define CAN_RESET_DISABLE() M0P_CAN->CFG_STAT_f.RESET = 0;\
while(M0P_CAN->CFG_STAT_f.RESET){;}
#define CAN_ACF_ID_REG_SEL ((uint8_t)0x00)
#define CAN_ACF_MASK_REG_SEL ((uint8_t)0x01)
/*! Parameter validity check for CAN Mode \a CanMode. */
#define IS_CAN_MODE_VALID(CanMode) \
( (CanExternalLoopBackMode == (CanMode)) || \
(CanInternalLoopBackMode == (CanMode)) || \
(CanTxSignalPrimaryMode == (CanMode)) || \
(CanTxSignalSecondaryMode == (CanMode)) || \
(CanListenOnlyMode == (CanMode)) \
)
/*! Parameter validity check for CAN Tx Cmd \a TxCmd. */
#define IS_TX_CMD_VALID(TxCmd) \
( (CanPTBTxCmd == (TxCmd)) || \
(CanPTBTxAbortCmd == (TxCmd)) || \
(CanSTBTxOneCmd == (TxCmd)) || \
(CanSTBTxAllCmd == (TxCmd)) || \
(CanSTBTxAbortCmd == (TxCmd)) \
)
/*! Parameter validity check for CAN status \a enCanStatus. */
#define IS_CAN_STATUS_VALID(enCanStatus) \
( (CanRxActive == (enCanStatus)) || \
(CanTxActive == (enCanStatus)) || \
(CanBusoff == (enCanStatus)) \
)
/*! Parameter validity check for CAN Irq type \a enCanIrqType. */
#define IS_CAN_IRQ_TYPE_VALID(enCanIrqType) \
( (CanRxIrqEn == (enCanIrqType)) || \
(CanRxOverIrqEn == (enCanIrqType)) || \
(CanRxBufFullIrqEn == (enCanIrqType)) || \
(CanRxBufAlmostFullIrqEn == (enCanIrqType)) || \
(CanTxPrimaryIrqEn == (enCanIrqType)) || \
(CanTxSecondaryIrqEn == (enCanIrqType)) || \
(CanErrorIrqEn == (enCanIrqType)) || \
(CanErrorPassiveIrqEn == (enCanIrqType)) || \
(CanArbiLostIrqEn == (enCanIrqType)) || \
(CanBusErrorIrqEn == (enCanIrqType)) \
)
/*! Parameter validity check for CAN Irq flag type \a enCanIrqFLg. */
#define IS_CAN_IRQ_FLAG_VALID(enCanIrqFLg) \
( (CanTxBufFullIrqFlg == (enCanIrqFLg)) || \
(CanRxIrqFlg == (enCanIrqFLg)) || \
(CanRxOverIrqFlg == (enCanIrqFLg)) || \
(CanRxBufFullIrqFlg == (enCanIrqFLg)) || \
(CanRxBufAlmostFullIrqFlg == (enCanIrqFLg)) || \
(CanTxPrimaryIrqFlg == (enCanIrqFLg)) || \
(CanTxSecondaryIrqFlg == (enCanIrqFLg)) || \
(CanErrorIrqFlg == (enCanIrqFLg)) || \
(CanAbortIrqFlg == (enCanIrqFLg)) || \
(CanErrorWarningIrqFlg == (enCanIrqFLg)) || \
(CanErrorPassivenodeIrqFlg == (enCanIrqFLg)) || \
(CanErrorPassiveIrqFlg == (enCanIrqFLg)) || \
(CanArbiLostIrqFlg == (enCanIrqFLg)) || \
(CanBusErrorIrqFlg == (enCanIrqFLg)) \
)
/*******************************************************************************
* Global variable definitions (declared in header file with 'extern')
******************************************************************************/
/*******************************************************************************
* Local function prototypes ('static')
******************************************************************************/
/*******************************************************************************
* Local variable definitions ('static')
******************************************************************************/
/*******************************************************************************
* Function implementation - global ('extern') and local ('static')
******************************************************************************/
/**
*******************************************************************************
** \brief CAN
**
** \param [in] pstcCanInitCfg @ref stc_can_init_config_t.
**
** \retval None
**
** \note None
**
******************************************************************************/
void CAN_Init(stc_can_init_config_t *pstcCanInitCfg)
{
ASSERT(NULL != pstcCanInitCfg);
CAN_RESET_ENABLE();
M0P_CAN->BT_f.PRESC = pstcCanInitCfg->stcCanBt.PRESC;
M0P_CAN->BT_f.SEG_1 = pstcCanInitCfg->stcCanBt.SEG_1;
M0P_CAN->BT_f.SEG_2 = pstcCanInitCfg->stcCanBt.SEG_2;
M0P_CAN->BT_f.SJW = pstcCanInitCfg->stcCanBt.SJW;
CAN_RESET_DISABLE();
M0P_CAN->LIMIT_f.AFWL = pstcCanInitCfg->stcWarningLimit.CanWarningLimitVal;
M0P_CAN->LIMIT_f.EWL = pstcCanInitCfg->stcWarningLimit.CanErrorWarningLimitVal;
M0P_CAN->TCTRL_f.TSMODE = pstcCanInitCfg->enCanSTBMode;
M0P_CAN->RCTRL_f.RBALL = pstcCanInitCfg->enCanRxBufAll;
M0P_CAN->RCTRL_f.ROM = pstcCanInitCfg->enCanRxBufMode;
M0P_CAN->RTIE = 0x00;
}
/**
*******************************************************************************
** \brief CAN (RESET CAN register)
**
** \param None
**
** \retval None
**
** \note None
**
******************************************************************************/
void CAN_DeInit(void)
{
CAN_RESET_ENABLE();
}
/**
*******************************************************************************
** \brief CAN
**
** \param [in] enMode . @ref en_can_mode_t
** \param [in] enCanSAck @ref en_can_self_ack_en_t
** \param [in] enNewState
** \arg Enable 使.
** \arg Disable .
** \retval None
**
** \note None
**
******************************************************************************/
void CAN_ModeConfig(en_can_mode_t enMode, en_can_self_ack_en_t enCanSAck, boolean_t enNewState)
{
ASSERT(IS_CAN_MODE_VALID(enMode));
ASSERT(IS_FUNCTIONAL_STATE(enNewState));
if(CanListenOnlyMode == enMode)
{
M0P_CAN->TCMD_f.LOM = enNewState;
}else
{
if(TRUE == enNewState)
{
M0P_CAN->CFG_STAT |= enMode;
}else
{
M0P_CAN->CFG_STAT &= ~(uint32_t)enMode;
}
}
M0P_CAN->RCTRL_f.SACK = enCanSAck;
}
/**
*******************************************************************************
** \brief CAN
**
** \param [in] pstcFilter @ref stc_can_filter_t.
**
** \param [in] enNewState
** \arg Enable 使.
** \arg Disable .
**
** \retval None
**
** \note None
**
******************************************************************************/
void CAN_FilterConfig(stc_can_filter_t *pstcFilter, boolean_t enNewState)
{
ASSERT(NULL != pstcFilter);
ASSERT(IS_FUNCTIONAL_STATE(enNewState));
CAN_RESET_ENABLE();
//<<Acceptance filter address
M0P_CAN->ACFCTRL_f.ACFADR = pstcFilter->enFilterSel;
//<<ID config
M0P_CAN->ACFCTRL_f.SELMASK = CAN_ACF_ID_REG_SEL;
M0P_CAN->ACF = pstcFilter->u32CODE;
//<<MASK config
M0P_CAN->ACFCTRL_f.SELMASK = CAN_ACF_MASK_REG_SEL;
M0P_CAN->ACF = pstcFilter->u32MASK;
//<<Frame format config
M0P_CAN->ACF_f.AIDEE = ((pstcFilter->enAcfFormat >> 1) & 0x01u);
M0P_CAN->ACF_f.AIDE = (pstcFilter->enAcfFormat & 0x01);
if(TRUE == enNewState)
{
M0P_CAN->ACFEN |= 1u << pstcFilter->enFilterSel;
}else
{
M0P_CAN->ACFEN &= ~(1u << pstcFilter->enFilterSel);
}
CAN_RESET_DISABLE();
}
/**
*******************************************************************************
** \brief CAN
**
** \param [in] pstcTxFrame @ref stc_can_txframe_t.
**
** \retval None
**
** \note None
**
******************************************************************************/
void CAN_SetFrame(stc_can_txframe_t *pstcTxFrame)
{
ASSERT(NULL != pstcTxFrame);
M0P_CAN->TCMD_f.TBSEL = pstcTxFrame->enBufferSel;
M0P_CAN->TBUF0 = pstcTxFrame->TBUF32_0;
M0P_CAN->TBUF1 = pstcTxFrame->TBUF32_1;
M0P_CAN->TBUF2 = pstcTxFrame->TBUF32_2[0];
M0P_CAN->TBUF3 = pstcTxFrame->TBUF32_2[1];
if(CanSTBSel == pstcTxFrame->enBufferSel)
{
M0P_CAN->TCTRL_f.TSNEXT = TRUE;
}
}
/**
*******************************************************************************
** \brief CAN
**
** \param [in] enTxCmd @ref en_can_tx_cmd_t.
**
**
** \note None
**
******************************************************************************/
void CAN_TransmitCmd(en_can_tx_cmd_t enTxCmd)
{
ASSERT(IS_TX_CMD_VALID(enTxCmd));
M0P_CAN->TCMD |= enTxCmd;
}
/**
*******************************************************************************
** \brief CAN
**
** \retval Can Tx buffer status @ref en_can_tx_buf_status_t
**
** \note None
**
******************************************************************************/
en_can_tx_buf_status_t CAN_TxBufStatusGet(void)
{
return (en_can_tx_buf_status_t)M0P_CAN->TCTRL_f.TSSTAT;
}
/**
*******************************************************************************
** \brief CAN
**
** \param [in] pstcRxFrame @ref stc_can_rxframe_t.
**
**
** \note None
**
******************************************************************************/
void CAN_Receive(stc_can_rxframe_t *pstcRxFrame)
{
ASSERT(NULL != pstcRxFrame);
pstcRxFrame->RBUF32_0 = M0P_CAN->RBUF0;
pstcRxFrame->RBUF32_1 = M0P_CAN->RBUF1;
pstcRxFrame->RBUF32_2[0] = M0P_CAN->RBUF2;
pstcRxFrame->RBUF32_2[1] = M0P_CAN->RBUF3;
M0P_CAN->RCTRL_f.RREL = 1;
}
/**
*******************************************************************************
** \brief CAN
**
**
** \retval Can rx buffer status @ref en_can_rx_buf_status_t
**
** \note None
**
******************************************************************************/
en_can_rx_buf_status_t CAN_RxBufStatusGet(stc_can_rxframe_t *pstcRxFrame)
{
return (en_can_rx_buf_status_t)M0P_CAN->RCTRL_f.RSSTAT;
}
/**
*******************************************************************************
** \brief CAN
**
** \param None
**
** \retval en_can_error_t
**
** \note None
**
******************************************************************************/
en_can_error_t CAN_ErrorStatusGet(void)
{
if(6 > M0P_CAN->EALCAP_f.KOER)
{
return (en_can_error_t)M0P_CAN->EALCAP_f.KOER;
}else
{
return UNKOWN_ERROR;
}
}
/**
*******************************************************************************
** \brief CAN
**
** \param enCanStatus CAN
** \arg true
** \arg false
** \retval boolean_t
**
** \note None
**
******************************************************************************/
boolean_t CAN_StatusGet(en_can_status_t enCanStatus)
{
ASSERT(IS_CAN_STATUS_VALID(enCanStatus));
if(M0P_CAN->CFG_STAT & enCanStatus)
{
return TRUE;
}else
{
return FALSE;
}
}
/**
*******************************************************************************
** \brief CAN 使
**
** \param [in] enCanIrqType @ref en_can_irq_type_t.
** \param [in] enNewState
** \arg Enable 使.
** \arg Disable .
**
** \retval None
**
** \note None
**
******************************************************************************/
void CAN_IrqCmd(en_can_irq_type_t enCanIrqType, boolean_t enNewState)
{
volatile uint32_t *u32pIE;
ASSERT(IS_CAN_IRQ_TYPE_VALID(enCanIrqType));
ASSERT(IS_FUNCTIONAL_STATE(enNewState));
u32pIE = (volatile uint32_t*)(&M0P_CAN->RTIE);
if(TRUE == enNewState)
{
*u32pIE |= (uint32_t)enCanIrqType;
}else
{
*u32pIE &= ~(uint32_t)enCanIrqType;
}
}
/**
*******************************************************************************
** \brief CAN
**
** \param [in] enCanIrqFlgType @ref en_can_irq_flag_type_t.
**
** \retval boolean_t TRUE or FALSE
**
** \note None
**
******************************************************************************/
boolean_t CAN_IrqFlgGet(en_can_irq_flag_type_t enCanIrqFlgType)
{
volatile uint32_t *u32pIE = NULL;
ASSERT(IS_CAN_IRQ_FLAG_VALID(enCanIrqFlgType));
u32pIE = (volatile uint32_t*)(&M0P_CAN->RTIE);
if( *u32pIE & (uint32_t)enCanIrqFlgType)
{
return TRUE;
}else
{
return FALSE;
}
}
/**
*******************************************************************************
** \brief CAN
**
** \param [in] enCanIrqFlgType @ref en_can_irq_flag_type_t.
**
** \retval None
**
** \note None
**
******************************************************************************/
void CAN_IrqFlgClr(en_can_irq_flag_type_t enCanIrqFlgType)
{
volatile uint32_t *u32pIE = NULL;
uint32_t u32IETempMsk = 0xFF2A00FF;
ASSERT(IS_CAN_IRQ_FLAG_VALID(enCanIrqFlgType));
u32pIE = (volatile uint32_t*)(&M0P_CAN->RTIE);
*u32pIE = (((*u32pIE)&u32IETempMsk) | (uint32_t)enCanIrqFlgType);
}
/**
*******************************************************************************
** \brief CAN
**
** \param None
**
** \retval Error Counter(0~255)
**
** \note None
**
******************************************************************************/
uint8_t CAN_RxErrorCntGet(void)
{
return M0P_CAN->RECNT;
}
/**
*******************************************************************************
** \brief CAN
**
** \param None
**
** \retval Error Counter(0~255)
**
** \note None
**
******************************************************************************/
uint8_t CAN_TxErrorCntGet(void)
{
return M0P_CAN->TECNT;
}
/**
*******************************************************************************
** \brief CAN
**
** \param None
**
** \retval address(0~31)
**
** \note None
**
******************************************************************************/
uint8_t CAN_ArbitrationLostCap(void)
{
return M0P_CAN->EALCAP_f.ALC;
}
//@} // CanGroup
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

View File

@ -0,0 +1,438 @@
/******************************************************************************
*Copyright(C)2017, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/** \file crc.c
**
** Common API of crc.
** @link crcGroup Some description @endlink
**
** - 2017-05-16
**
******************************************************************************/
/*******************************************************************************
* Include files
******************************************************************************/
#include "crc.h"
/**
*******************************************************************************
** \addtogroup CrcGroup
******************************************************************************/
//@{
/*******************************************************************************
* Local pre-processor symbols/macros ('#define')
******************************************************************************/
/*******************************************************************************
* Global variable definitions (declared in header file with 'extern')
******************************************************************************/
/*******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/*******************************************************************************
* Local variable definitions ('static')
******************************************************************************/
/*******************************************************************************
* Local function prototypes ('static')
******************************************************************************/
/*******************************************************************************
* Function implementation - global ('extern') and local ('static')
******************************************************************************/
/**
*****************************************************************************
** \brief CRC16 ()
**
** CRC16.
**
** \param [in] pu8Data
** \param [in] u32Len
**
** \retval CRC16 CRC16.
*****************************************************************************/
uint16_t CRC16_Get8(uint8_t* pu8Data, uint32_t u32Len)
{
uint32_t u32Index = 0;
M0P_CRC->CR_f.CR = 0;
M0P_CRC->RESULT = 0xFFFF;
for(u32Index = 0;u32Index<u32Len;u32Index++)
{
*((volatile uint8_t*)(&(M0P_CRC->DATA))) = pu8Data[u32Index];
}
return (M0P_CRC->RESULT_f.RESULT);
}
/**
*****************************************************************************
** \brief CRC16 ()
**
** CRC16.
**
** \param [in] pu16Data
** \param [in] u32Len
**
** \retval CRC16 CRC16.
*****************************************************************************/
uint16_t CRC16_Get16(uint16_t* pu16Data, uint32_t u32Len)
{
uint32_t u32Index = 0;
M0P_CRC->CR_f.CR = 0;
M0P_CRC->RESULT_f.RESULT = 0xFFFF;
for (u32Index=0; u32Index<u32Len; u32Index++)
{
*((volatile uint16_t*)(&(M0P_CRC->DATA))) = pu16Data[u32Index];
}
return (M0P_CRC->RESULT_f.RESULT);
}
/**
*****************************************************************************
** \brief CRC16 ()
**
** CRC16.
**
** \param [in] pu32Data
** \param [in] u32Len
**
** \retval CRC16 CRC16.
*****************************************************************************/
uint16_t CRC16_Get32(uint32_t* pu32Data, uint32_t u32Len)
{
uint32_t u32Index = 0;
M0P_CRC->CR_f.CR = 0;
M0P_CRC->RESULT_f.RESULT = 0xFFFF;
for (u32Index=0; u32Index<u32Len; u32Index++)
{
M0P_CRC->DATA_f.DATA = pu32Data[u32Index];
}
return (M0P_CRC->RESULT_f.RESULT);
}
/**
*****************************************************************************
** \brief CRC16 ()
**
** CRC16.
**
** \param [in] pu8Data
** \param [in] u32Len
** \param [in] u16CRC CRC16
**
** \retval Ok CRC
** \retval Error CRC
*****************************************************************************/
en_result_t CRC16_Check8(uint8_t* pu8Data, uint32_t u32Len, uint16_t u16CRC)
{
en_result_t enResult = Ok;
uint32_t u32Index = 0;
M0P_CRC->CR_f.CR = 0;
M0P_CRC->RESULT_f.RESULT = 0xFFFF;
for (u32Index=0; u32Index<u32Len; u32Index++)
{
*((volatile uint8_t*)(&(M0P_CRC->DATA))) = pu8Data[u32Index];
}
*((volatile uint8_t*)(&(M0P_CRC->DATA))) = (uint8_t)((((uint32_t)u16CRC)>>0)&0xFF);
*((volatile uint8_t*)(&(M0P_CRC->DATA))) = (uint8_t)(((uint32_t)u16CRC>>8)&0xFF);
enResult = M0P_CRC->CR_f.FLAG ? Ok : Error;
return (enResult);
}
/**
*****************************************************************************
** \brief CRC16 ()
**
** CRC16.
**
** \param [in] pu16Data
** \param [in] u32Len
** \param [in] u16CRC CRC16
**
** \retval Ok CRC
** \retval Error CRC
*****************************************************************************/
en_result_t CRC16_Check16(uint16_t* pu16Data, uint32_t u32Len, uint16_t u16CRC)
{
en_result_t enResult = Ok;
uint32_t u32Index = 0;
M0P_CRC->CR_f.CR = 0;
M0P_CRC->RESULT_f.RESULT = 0xFFFF;
for (u32Index=0; u32Index<u32Len; u32Index++)
{
*((volatile uint16_t*)(&(M0P_CRC->DATA))) = pu16Data[u32Index];
}
*((volatile uint16_t*)(&(M0P_CRC->DATA))) = u16CRC;
enResult = M0P_CRC->CR_f.FLAG ? Ok : Error;
return (enResult);
}
/**
*****************************************************************************
** \brief CRC16 ()
**
** CRC16.
**
** \param [in] pu32Data
** \param [in] u32Len
** \param [in] u16CRC CRC16
**
** \retval Ok CRC
** \retval Error CRC
*****************************************************************************/
en_result_t CRC16_Check32(uint32_t* pu32Data, uint32_t u32Len, uint16_t u16CRC)
{
en_result_t enResult = Ok;
uint32_t u32Index = 0;
M0P_CRC->CR_f.CR = 0;
M0P_CRC->RESULT_f.RESULT = 0xFFFFFFFFu;
for (u32Index=0; u32Index<u32Len; u32Index++)
{
*((volatile uint32_t*)(&(M0P_CRC->DATA))) = pu32Data[u32Index];
}
*((volatile uint16_t*)(&(M0P_CRC->DATA))) = ((uint16_t)u16CRC);
enResult = M0P_CRC->CR_f.FLAG ? Ok : Error;
return (enResult);
}
/**
*****************************************************************************
** \brief CRC16 ()
**
** CRC16.
**
** \param [in] pu8Data
** \param [in] u32Len
**
** \retval CRC16 CRC16.
*****************************************************************************/
uint32_t CRC32_Get8(uint8_t* pu8Data, uint32_t u32Len)
{
uint32_t u32Index = 0;
M0P_CRC->CR_f.CR = 1;
M0P_CRC->RESULT = 0xFFFFFFFFu;
for(u32Index = 0;u32Index<u32Len;u32Index++)
{
*((volatile uint8_t*)(&(M0P_CRC->DATA))) = pu8Data[u32Index];
}
return (M0P_CRC->RESULT_f.RESULT);
}
/**
*****************************************************************************
** \brief CRC16 ()
**
** CRC16.
**
** \param [in] pu16Data
** \param [in] u32Len
**
** \retval CRC16 CRC16.
*****************************************************************************/
uint32_t CRC32_Get16(uint16_t* pu16Data, uint32_t u32Len)
{
uint32_t u32Index = 0;
M0P_CRC->CR_f.CR = 1;
M0P_CRC->RESULT_f.RESULT = 0xFFFFFFFFu;
for (u32Index=0; u32Index<u32Len; u32Index++)
{
*((volatile uint16_t*)(&(M0P_CRC->DATA))) = pu16Data[u32Index];
}
return (M0P_CRC->RESULT_f.RESULT);
}
/**
*****************************************************************************
** \brief CRC16 ()
**
** CRC16.
**
** \param [in] pu32Data
** \param [in] u32Len
**
** \retval CRC16 CRC16.
*****************************************************************************/
uint32_t CRC32_Get32(uint32_t* pu32Data, uint32_t u32Len)
{
uint32_t u32Index = 0;
M0P_CRC->CR_f.CR = 1;
M0P_CRC->RESULT_f.RESULT = 0xFFFFFFFFu;
for (u32Index=0; u32Index<u32Len; u32Index++)
{
M0P_CRC->DATA_f.DATA = pu32Data[u32Index];
}
return (M0P_CRC->RESULT_f.RESULT);
}
/**
*****************************************************************************
** \brief CRC16 ()
**
** CRC16.
**
** \param [in] pu8Data
** \param [in] u32Len
** \param [in] u16CRC CRC16
**
** \retval Ok CRC
** \retval Error CRC
*****************************************************************************/
en_result_t CRC32_Check8(uint8_t* pu8Data, uint32_t u32Len, uint32_t u32CRC)
{
en_result_t enResult = Ok;
uint32_t u32Index = 0;
M0P_CRC->CR_f.CR = 1;
M0P_CRC->RESULT_f.RESULT = 0xFFFFFFFFu;
for (u32Index=0; u32Index<u32Len; u32Index++)
{
*((volatile uint8_t*)(&(M0P_CRC->DATA))) = pu8Data[u32Index];
}
*((volatile uint8_t*)(&(M0P_CRC->DATA))) = (uint8_t)((u32CRC>>0)&0xFF);
*((volatile uint8_t*)(&(M0P_CRC->DATA))) = (uint8_t)((u32CRC>>8)&0xFF);
*((volatile uint8_t*)(&(M0P_CRC->DATA))) = (uint8_t)((u32CRC>>16)&0xFF);
*((volatile uint8_t*)(&(M0P_CRC->DATA))) = (uint8_t)((u32CRC>>24)&0xFF);
enResult = M0P_CRC->CR_f.FLAG ? Ok : Error;
return (enResult);
}
/**
*****************************************************************************
** \brief CRC16 ()
**
** CRC16.
**
** \param [in] pu16Data
** \param [in] u32Len
** \param [in] u16CRC CRC16
**
** \retval Ok CRC
** \retval Error CRC
*****************************************************************************/
en_result_t CRC32_Check16(uint16_t* pu16Data, uint32_t u32Len, uint32_t u32CRC)
{
en_result_t enResult = Ok;
uint32_t u32Index = 0;
M0P_CRC->CR_f.CR = 1;
M0P_CRC->RESULT_f.RESULT = 0xFFFFFFFFu;
for (u32Index=0; u32Index<u32Len; u32Index++)
{
*((volatile uint16_t*)(&(M0P_CRC->DATA))) = pu16Data[u32Index];
}
*((volatile uint16_t*)(&(M0P_CRC->DATA))) = (uint16_t)((u32CRC>>0)&0xFFFF);
*((volatile uint16_t*)(&(M0P_CRC->DATA))) = (uint16_t)((u32CRC>>16)&0xFFFF);
enResult = M0P_CRC->CR_f.FLAG ? Ok : Error;
return (enResult);
}
/**
*****************************************************************************
** \brief CRC16 ()
**
** CRC16.
**
** \param [in] pu32Data
** \param [in] u32Len
** \param [in] u16CRC CRC16
**
** \retval Ok CRC
** \retval Error CRC
*****************************************************************************/
en_result_t CRC32_Check32(uint32_t* pu32Data, uint32_t u32Len, uint32_t u32CRC)
{
en_result_t enResult = Ok;
uint32_t u32Index = 0;
M0P_CRC->CR_f.CR = 1;
M0P_CRC->RESULT_f.RESULT = 0xFFFFFFFFu;
for (u32Index=0; u32Index<u32Len; u32Index++)
{
*((volatile uint32_t*)(&(M0P_CRC->DATA))) = pu32Data[u32Index];
}
*((volatile uint32_t*)(&(M0P_CRC->DATA))) = u32CRC;
enResult = M0P_CRC->CR_f.FLAG ? Ok : Error;
return (enResult);
}
//@} // CrcGroup
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

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@ -0,0 +1,410 @@
/******************************************************************************
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file dac.c
**
** dac driver API.
**
** - 2019-04-10 First Version
**
******************************************************************************/
/******************************************************************************
* Include files
******************************************************************************/
#include "dac.h"
/**
******************************************************************************
** \addtogroup AdcGroup
******************************************************************************/
//@{
/******************************************************************************
* Local pre-processor symbols/macros ('#define')
******************************************************************************/
/******************************************************************************
* Global variable definitions (declared in header file with 'extern')
******************************************************************************/
/******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/******************************************************************************
* Local function prototypes ('static')
******************************************************************************/
/******************************************************************************
* Local variable definitions ('static')
******************************************************************************/
/*****************************************************************************
* Function implementation - global ('extern') and local ('static')
*****************************************************************************/
/**
******************************************************************************
** \brief 使DMA DMA_CR0DMAEN0
**
** @param NewState : TRUE FALSE
** \retval
**
******************************************************************************/
void Dac0_DmaCmd(boolean_t NewState)
{
SetBit((uint32_t)(&(M0P_DAC->CR0)), 12, NewState);
}
/**
******************************************************************************
** \brief 使DMA DMA_CR0DMAEN1
**
** @param NewState : TRUE FALSE
** \retval
**
******************************************************************************/
void Dac1_DmaCmd(boolean_t NewState)
{
SetBit((uint32_t)(&(M0P_DAC->CR0)), 28, NewState);
}
/**
******************************************************************************
** \brief DACDMA DMA_CR0DMAUDRIE0
**
** @param NewState : TRUE FALSE
** \retval
**
******************************************************************************/
void Dac0_DmaITCfg(boolean_t NewState)
{
SetBit((uint32_t)(&(M0P_DAC->CR0)), 13, NewState);
}
/**
******************************************************************************
** \brief DACDMA DMA_CR0DMAUDRIE1
**
** @param NewState : TRUE FALSE
** \retval
**
******************************************************************************/
void Dac1_DmaITCfg(boolean_t NewState)
{
SetBit((uint32_t)(&(M0P_DAC->CR0)), 29, NewState);
}
/**
******************************************************************************
** \brief DACDMA DMA_SRDMAUDR0
**
** @param
** \retval TRUE FALSE
**
******************************************************************************/
boolean_t Dac0_GetITStatus(void)
{
return GetBit((uint32_t)(&(M0P_DAC->SR)), 13);
}
/**
******************************************************************************
** \brief DACDMA DMA_SRDMAUDR1
**
** @param
** \retval TRUE FALSE
**
******************************************************************************/
boolean_t Dac1_GetITStatus(void)
{
return GetBit((uint32_t)(&(M0P_DAC->SR)), 29);
}
/**
******************************************************************************
** \brief DAC使 DMA_CR0EN0
**
** @param NewState : TRUE FALSE
** \retval
**
******************************************************************************/
void Dac0_Cmd(boolean_t NewState)
{
SetBit((uint32_t)(&(M0P_DAC->CR0)), 0, NewState);
}
/**
******************************************************************************
** \brief DAC使 DMA_CR0EN1
**
** @param NewState : TRUE FALSE
** \retval
**
******************************************************************************/
void Dac1_Cmd(boolean_t NewState)
{
SetBit((uint32_t)(&(M0P_DAC->CR0)), 16, NewState);
}
/**
******************************************************************************
** \brief DAC DMA_SWTRIGRSWTRIG0
**
** @param
** \retval
**
******************************************************************************/
void Dac0_SoftwareTriggerCmd(void)
{
SetBit((uint32_t)(&(M0P_DAC->SWTRIGR)), 0, TRUE);
}
/**
******************************************************************************
** \brief DAC DMA_SWTRIGRSWTRIG1
**
** @param
** \retval
**
******************************************************************************/
void Dac1_SoftwareTriggerCmd(void)
{
SetBit((uint32_t)(&(M0P_DAC->SWTRIGR)), 1, TRUE);
}
/**
******************************************************************************
** \brief DAC0
**
** @param DAC_InitStruct : DAC0
** \retval
**
******************************************************************************/
void Dac0_Init(stc_dac_cfg_t* DAC_InitStruct)
{
M0P_DAC->CR0_f.BOFF0 = DAC_InitStruct->boff_t;
M0P_DAC->CR0_f.TEN0 = DAC_InitStruct->ten_t;
M0P_DAC->CR0_f.TSEL0 = DAC_InitStruct->tsel_t;
M0P_DAC->CR0_f.WAVE0 = DAC_InitStruct->wave_t;
M0P_DAC->CR0_f.MAMP0 = DAC_InitStruct->mamp_t;
M0P_DAC->CR0_f.SREF0 = DAC_InitStruct->sref_t;
if(DAC_InitStruct->align == DacLeftAlign)
{
M0P_DAC->DHR12L0_f.DHR0 = DAC_InitStruct->dhr12;
}
else if(DAC_InitStruct->align == DacRightAlign)
{
M0P_DAC->DHR12R0_f.DHR0 = DAC_InitStruct->dhr12;
}
else
{
M0P_DAC->DHR8R0_f.DHR0 = DAC_InitStruct->dhr8;
}
}
/**
******************************************************************************
** \brief DAC1
**
** @param DAC_InitStruct : DAC1
** \retval
**
******************************************************************************/
void Dac1_Init(stc_dac_cfg_t* DAC_InitStruct)
{
M0P_DAC->CR0_f.BOFF1 = DAC_InitStruct->boff_t;
M0P_DAC->CR0_f.TEN1 = DAC_InitStruct->ten_t;
M0P_DAC->CR0_f.TSEL1 = DAC_InitStruct->tsel_t;
M0P_DAC->CR0_f.WAVE1 = DAC_InitStruct->wave_t;
M0P_DAC->CR0_f.MAMP1 = DAC_InitStruct->mamp_t;
M0P_DAC->CR0_f.SREF1 = DAC_InitStruct->sref_t;
if(DAC_InitStruct->align == DacLeftAlign)
{
M0P_DAC->DHR12L1_f.DHR1 = DAC_InitStruct->dhr12;
}
else if(DAC_InitStruct->align == DacRightAlign)
{
M0P_DAC->DHR12R1_f.DHR1 = DAC_InitStruct->dhr12;
}
else
{
M0P_DAC->DHR8R1_f.DHR1 = DAC_InitStruct->dhr8;
}
}
/**
******************************************************************************
** \brief DAC0
**
** @param DAC_Channel: Dac_0
** @param DAC_Align : Right_Align Left_Align
** @param DAC_Bit : Bit8 Bit12
** @param Data :
** \retval
**
******************************************************************************/
void Dac0_SetChannelData(en_align_t DAC_Align, en_bitno_t DAC_Bit, uint16_t Data)
{
if(DAC_Align == DacRightAlign)
{
if(DAC_Bit == DacBit8)
{
M0P_DAC->DHR8R0_f.DHR0 = (uint8_t)Data;
}
else if(DAC_Bit == DacBit12)
{
M0P_DAC->DHR12R0_f.DHR0 = Data;
}
else
{
return;
}
}
else if(DAC_Align == DacLeftAlign)
{
if(DAC_Bit == DacBit8)
{
return;
}
else if(DAC_Bit == DacBit12)
{
M0P_DAC->DHR12L0_f.DHR0 = Data;
}
else
{
return;
}
}
else
{
return;
}
}
/**
******************************************************************************
** \brief DAC1
**
** @param DAC_Channel: Dac_1
** @param DAC_Align : Right_Align Left_Align
** @param DAC_Bit : Bit8 Bit12
** @param Data :
** \retval
**
******************************************************************************/
void Dac1_SetChannelData(en_align_t DAC_Align, en_bitno_t DAC_Bit, uint16_t Data)
{
if(DAC_Align == DacRightAlign)
{
if(DAC_Bit == DacBit8)
{
M0P_DAC->DHR8R1_f.DHR1 = (uint8_t)Data;
}
else if(DAC_Bit == DacBit12)
{
M0P_DAC->DHR12R1_f.DHR1 = Data;
}
else
{
return;
}
}
else if(DAC_Align == DacLeftAlign)
{
if(DAC_Bit == DacBit8)
{
return;
}
else if(DAC_Bit == DacBit12)
{
M0P_DAC->DHR12L1_f.DHR1 = Data;
}
else
{
return;
}
}
else
{
return;
}
}
/**
******************************************************************************
** \brief DACDAC_DOR0
**
** @param
** \retval DAC_DOR0
**
******************************************************************************/
uint16_t Dac0_GetDataOutputValue(void)
{
uint16_t tmp;
tmp = M0P_DAC->DOR0_f.DOR0;
return tmp&0x0fff;
}
/**
******************************************************************************
** \brief DACDAC_DOR1
**
** @param
** \retval DAC_DOR1
**
******************************************************************************/
uint16_t Dac1_GetDataOutputValue(void)
{
uint16_t tmp;
tmp = M0P_DAC->DOR1_f.DOR1;
return tmp&0x0fff;
}
/******************************************************************************
* EOF (not truncated)
******************************************************************************/

View File

@ -0,0 +1,250 @@
/*******************************************************************************
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file ddl.c
**
** Common API of DDL.
** @link ddlGroup Some description @endlink
**
** - 2019-03-03
**
******************************************************************************/
/******************************************************************************/
/* Include files */
/******************************************************************************/
#include "ddl.h"
/**
******************************************************************************
** \addtogroup DDL Common Functions
******************************************************************************/
//@{
/******************************************************************************/
/* Local pre-processor symbols/macros ('#define') */
/******************************************************************************/
/******************************************************************************/
/* Global variable definitions (declared in header file with 'extern') */
/******************************************************************************/
/******************************************************************************/
/* Local type definitions ('typedef') */
/******************************************************************************/
/******************************************************************************/
/* Local variable definitions ('static') */
/******************************************************************************/
/******************************************************************************/
/* Local function prototypes ('static') */
/******************************************************************************/
/******************************************************************************/
/* Function implementation - global ('extern') and local ('static') */
/******************************************************************************/
#ifndef __DEBUG
#define __DEBUG
//#define __CC_ARM
#endif
uint32_t Log2(uint32_t u32Val)
{
uint32_t u32V1 = 0;
if(0u == u32Val)
{
return 0;
}
while(u32Val > 1u)
{
u32V1++;
u32Val /=2;
}
return u32V1;
}
/**
*******************************************************************************
** \brief Memory clear function for DDL_ZERO_STRUCT()
******************************************************************************/
void ddl_memclr(void *pu8Address, uint32_t u32Count)
{
uint8_t *pu8Addr = (uint8_t *)pu8Address;
if(NULL == pu8Addr)
{
return;
}
while (u32Count--)
{
*pu8Addr++ = 0;
}
}
/**
* \brief delay1ms
* delay approximately 1ms.
* \param [in] u32Cnt
* \retval void
*/
void delay1ms(uint32_t u32Cnt)
{
uint32_t u32end;
SysTick->LOAD = 0xFFFFFF;
SysTick->VAL = 0;
SysTick->CTRL = SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_CLKSOURCE_Msk;
while(u32Cnt-- > 0)
{
SysTick->VAL = 0;
u32end = 0x1000000 - SystemCoreClock/1000;
while(SysTick->VAL > u32end)
{
;
}
}
SysTick->CTRL = (SysTick->CTRL & (~SysTick_CTRL_ENABLE_Msk));
}
/**
* \brief delay100us
* delay approximately 100us.
* \param [in] u32Cnt
* \retval void
*/
void delay100us(uint32_t u32Cnt)
{
uint32_t u32end;
SysTick->LOAD = 0xFFFFFF;
SysTick->VAL = 0;
SysTick->CTRL = SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_CLKSOURCE_Msk;
while(u32Cnt-- > 0)
{
SysTick->VAL = 0;
u32end = 0x1000000 - SystemCoreClock/10000;
while(SysTick->VAL > u32end)
{
;
}
}
SysTick->CTRL = (SysTick->CTRL & (~SysTick_CTRL_ENABLE_Msk));
}
/**
* \brief delay10us
* delay approximately 10us.
* \param [in] u32Cnt
* \retval void
*/
void delay10us(uint32_t u32Cnt)
{
uint32_t u32end;
SysTick->LOAD = 0xFFFFFF;
SysTick->VAL = 0;
SysTick->CTRL = SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_CLKSOURCE_Msk;
while(u32Cnt-- > 0)
{
SysTick->VAL = 0;
u32end = 0x1000000 - SystemCoreClock/100000;
while(SysTick->VAL > u32end)
{
;
}
}
SysTick->CTRL = (SysTick->CTRL & (~SysTick_CTRL_ENABLE_Msk));
}
/**
* \brief set register bit
*
* \param [in] addr
* \param [in] offset
* \retval void
*/
void SetBit(uint32_t addr, uint32_t offset, boolean_t bFlag)
{
if(TRUE == bFlag)
{
*((volatile uint32_t *)(addr)) |= ((1UL)<<(offset));
}
else
{
*((volatile uint32_t *)(addr)) &= (~(1UL<<(offset)));
}
}
/**
* \brief get register bit
*
* \param [in] addr
* \param [in] offset
* \retval void
*/
boolean_t GetBit(uint32_t addr, uint32_t offset)
{
return ((((*((volatile uint32_t *)(addr))) >> (offset)) & 1u) > 0) ? TRUE : FALSE;
}
//@} // DDL Functions
/******************************************************************************
* EOF (not truncated)
******************************************************************************/

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@ -0,0 +1,119 @@
/******************************************************************************
*Copyright(C)2018, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/** \file debug.c
**
** Common API of debug.
** @link flashGroup Some description @endlink
**
** - 2018-05-08
**
******************************************************************************/
/*******************************************************************************
* Include files
******************************************************************************/
#include "debug.h"
/**
*******************************************************************************
** \addtogroup FlashGroup
******************************************************************************/
//@{
/*******************************************************************************
* Local pre-processor symbols/macros ('#define')
******************************************************************************/
/*******************************************************************************
* Global variable definitions (declared in header file with 'extern')
******************************************************************************/
/*******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/*******************************************************************************
* Local variable definitions ('static')
******************************************************************************/
/*******************************************************************************
* Local function prototypes ('static')
******************************************************************************/
/*******************************************************************************
* Function implementation - global ('extern') and local ('static')
******************************************************************************/
/**
*****************************************************************************
** \brief 使
**
**
** \retval TRUE or FALSE
*****************************************************************************/
en_result_t Debug_ActiveEnable(en_debug_module_active_t enModule)
{
M0P_DEBUG_ACTIVE->DEBUG_ACTIVE &= ~(uint32_t)enModule;
return Ok;
}
/**
*****************************************************************************
** \brief
**
**
** \retval TRUE or FALSE
*****************************************************************************/
en_result_t Debug_ActiveDisable(en_debug_module_active_t enModule)
{
M0P_DEBUG_ACTIVE->DEBUG_ACTIVE |= (uint32_t)enModule;
return Ok;
}
//@} // BgrGroup
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

View File

@ -0,0 +1,624 @@
/******************************************************************************
* Copyright (C) 2016, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file dmac.c
**
** A detailed description is available at
** @link DmacGroup Dmac description @endlink
**
** - 2018-03-09 1.0 Hongjh First version for Device Driver Library of Dmac.
**
******************************************************************************/
/*******************************************************************************
* Include files
******************************************************************************/
#include "dmac.h"
/**
*******************************************************************************
** \addtogroup DmacGroup
******************************************************************************/
//@{
/*******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/*******************************************************************************
* Local pre-processor symbols/macros ('#define')
******************************************************************************/
/******************************************************************************/
/* DMA */
/******************************************************************************/
/************** Bits definition for DMA_CONFBx(x=0~1) register *************/
#define DMA_TRANSFER_WIDTH_Pos (26U) /*!< DMAC_CONFBx: ERR_IE Position */
#define DMA_TRANSFER_WIDTH_Msk (0x03U << DMA_TRANSFER_WIDTH_Pos) /*!< DMAC_CONFBx: ERR_IE Mask 0x0C000000 */
/************** Bits definition for DMA_CONFBx(x=0~1) register *************/
#define DMA_ERR_IE_Pos (20U) /*!< DMAC_CONFBx: ERR_IE Position */
#define DMA_ERR_IE_Msk (0x01U << DMA_ERR_IE_Pos) /*!< DMAC_CONFBx: ERR_IE Mask 0x00000010 */
/************** Bits definition for DMA_CONFBx(x=0~1) register *************/
#define DMA_FIS_IE_Pos (19U) /*!< DMAC_CONFBx: FIS_IE Position */
#define DMA_FIS_IE_Msk (0x01U << DMA_FIS_IE_Pos) /*!< DMAC_CONFBx: FIS_IE Mask 0x00000010 */
/************** Bits definition for DMA_CONFBx(x=0~1) register *************/
#define DMA_STAT_Pos (16U) /*!< DMAC_CONFBx: STAT Position */
#define DMA_STAT_Msk (0x07U << DMA_STAT_Pos) /*!< DMAC_CONFBx: STAT Mask 0x00070000 */
/************** Bits definition for DMA_CONFBx(x=0~1) register *************/
#define DMA_TRANSFER_RELOAD_Pos (0U) /*!< DMAC_CONFBx: MSK Position */
#define DMA_TRANSFER_RELOAD_Msk (0x01U << DMA_TRANSFER_RELOAD_Pos) /*!< DMAC_CONFBx: MSK Mask 0x00000010 */
/************** Bits definition for DMA_CONFAx(x=0~1) register *************/
#define DMA_CH_ENABLE_Pos (31U) /*!< DMAC_CONFAx: ENS Position */
#define DMA_CH_ENABLE_Msk (0x01U << DMA_CH_ENABLE_Pos) /*!< DMAC_CONFAx: ENS Mask 0x80000000 */
/************** Bits definition for DMA_CONFAx(x=0~1) register *************/
#define DMA_CH_PAUSE_Pos (30U) /*!< DMAC_CONFAx: PAS Position */
#define DMA_CH_PAUSE_Msk (0x01U << DMA_CH_PAUSE_Pos) /*!< DMAC_CONFAx: PAS Mask 0x40000000 */
/************** Bits definition for DMA_CONFAx(x=0~1) register *************/
#define DMA_SOFTWARE_START_Pos (29U) /*!< DMAC_CONFAx: ENS Position */
#define DMA_SOFTWARE_START_Msk (0x01U << DMA_SOFTWARE_START_Pos) /*!< DMAC_CONFAx: ENS Mask 0x20000000 */
/************** Bits definition for DMA_CONFAx(x=0~1) register *************/
#define DMA_TRI_SEL_Pos (22U) /*!< DMAC_CONFAx: TRISEL Position */
#define DMA_TRI_SEL_Msk (0x7FU << DMA_TRI_SEL_Pos) /*!< DMAC_CONFAx: TRISEL Mask 0x1FC00000 */
/************** Bits definition for DMA_CONFAx(x=0~1) register *************/
#define DMA_BC_SEL_Pos (16U) /*!< DMAC_CONFAx: TRISEL Position */
#define DMA_BC_SEL_Msk (0x0FU << DMA_BC_SEL_Pos) /*!< DMAC_CONFAx: TRISEL Mask 0x000F0000 */
/************** Bits definition for DMA_CONFAx(x=0~1) register *************/
#define DMA_TC_SEL_Pos (0U) /*!< DMAC_CONFAx: TRISEL Position */
#define DMA_TC_SEL_Msk (0xFFFFU << DMA_TC_SEL_Pos) /*!< DMAC_CONFAx: TRISEL Mask 0x0000FFFF */
/************** Bits definition for DMA_CONF register *************/
#define DMA_ENABLE_Pos (31U) /*!< DMAC_CONF: TRISEL Position */
#define DMA_ENABLE_Msk (0x01U << DMA_ENABLE_Pos) /*!< DMAC_CONF: TRISEL Mask 0x80000000 */
/************** Bits definition for DMA_CONF register *************/
#define DMA_PRIORITY_Pos (28U) /*!< DMAC_CONF: TRISEL Position */
#define DMA_PRIORITY_Msk (0x01U << DMA_PRIORITY_Pos) /*!< DMAC_CONF: TRISEL Mask 0x10000000 */
/*! Dmac通道参数有效性检查. */
#define IS_VALID_CH(x) \
( (DmaCh0 == (x)) || \
(DmaCh1 == (x)))
/*! DMA 传输数据宽度,参数有效性检查. */
#define IS_VALID_TRN_WIDTH(x) \
( (DmaMsk8Bit == (x)) || \
(DmaMsk16Bit == (x)) || \
(DmaMsk32Bit == (x)))
/*! DMA源地址控制模式参数有效性检查. */
#define IS_VALID_SRC_ADDR_MODE(x) \
( (DmaMskSrcAddrFix == (x)) || \
(DmaMskSrcAddrInc == (x)))
/*! DMA目的地址控制模式参数有效性检查. */
#define IS_VALID_DST_ADDR_MODE(x) \
( (DmaMskDstAddrFix == (x)) || \
(DmaMskDstAddrInc == (x)))
/*! DMA 优先级, 参数有效性检查. */
#define IS_VALID_PRIO_MODE(x) \
( (DmaMskPriorityFix == (x)) || \
(DmaMskPriorityLoop == (x)))
/*! DMA 传输模式,参数有效性检查. */
#define IS_VALID_TRANSFER_MODE(x) \
( (DmaMskOneTransfer == (x)) || \
(DmaMskContinuousTransfer == (x)))
/*! 块传输大小,参数有效性检查. */
#define IS_VALID_BLKSIZE(x) ((!((x) & ~(DMA_BC_SEL_Msk >> DMA_BC_SEL_Pos)))&&((x)>0))
/*! 块传输次数,参数有效性检查. */
#define IS_VALID_TRNCNT(x) (!((x) & ~(DMA_TC_SEL_Msk >> DMA_TC_SEL_Pos)))
/*******************************************************************************
* Global variable definitions (declared in header file with 'extern')
******************************************************************************/
/*******************************************************************************
* Local function prototypes ('static')
******************************************************************************/
/*******************************************************************************
* Local variable definitions ('static')
******************************************************************************/
/*******************************************************************************
* Function implementation - global ('extern') and local ('static')
******************************************************************************/
/**
*******************************************************************************
** \brief DMAC
**
** \param [in] enCh .
** \param [in] pstcCfg DMAC.
**
** \retval Ok .
** \retval ErrorInvalidParameter pstcCfg.
**
** \note None
**
******************************************************************************/
en_result_t Dma_InitChannel(en_dma_channel_t enCh, stc_dma_cfg_t* pstcCfg)
{
ASSERT(IS_VALID_CH(enCh));
ASSERT(NULL != pstcCfg);
ASSERT(IS_VALID_BLKSIZE(pstcCfg->u16BlockSize));
ASSERT(IS_VALID_TRNCNT(pstcCfg->u16TransferCnt));
ASSERT(IS_VALID_TRN_WIDTH(pstcCfg->enTransferWidth));
ASSERT(IS_VALID_SRC_ADDR_MODE(pstcCfg->enSrcAddrMode));
ASSERT(IS_VALID_DST_ADDR_MODE(pstcCfg->enDstAddrMode));
ASSERT(IS_VALID_PRIO_MODE(pstcCfg->enPriority));
ASSERT(IS_VALID_TRANSFER_MODE(pstcCfg->enTransferMode));
/* 检查通道值有效性和pstcCfg是否空指针 */
if (NULL == pstcCfg)
{
return ErrorInvalidParameter;
}
*(&M0P_DMAC->CONFB0+enCh) = 0;
*(&M0P_DMAC->CONFB0+enCh) = (uint32_t)pstcCfg->enMode |
(uint32_t)pstcCfg->enTransferWidth |
(uint32_t)pstcCfg->enSrcAddrMode |
(uint32_t)pstcCfg->enDstAddrMode |
(uint32_t)pstcCfg->enSrcAddrReloadCtl |
(uint32_t)pstcCfg->enDestAddrReloadCtl|
(uint32_t)pstcCfg->enSrcBcTcReloadCtl |
(uint32_t)pstcCfg->enTransferMode;
/*首先把TRI_SEL[6:0] BC[3:0] TC[15:0]这些位清零,然后再赋值*/
*(&M0P_DMAC->CONFA0+enCh) &= ((uint32_t)~(DMA_TRI_SEL_Msk | DMA_BC_SEL_Msk | DMA_TC_SEL_Msk));
*(&M0P_DMAC->CONFA0+enCh) |= (uint32_t)(pstcCfg->u16TransferCnt - 1) |
((uint32_t)(pstcCfg->u16BlockSize - 1)<<16)|
(uint32_t)(pstcCfg->enRequestNum<<22);
M0P_DMAC->CONF |= (uint32_t)(pstcCfg->enPriority);
*(&M0P_DMAC->SRCADR0+enCh) = (uint32_t)(pstcCfg->u32SrcAddress);
*(&M0P_DMAC->DSTADR0+enCh) = (uint32_t)(pstcCfg->u32DstAddress);
return Ok;
}
/**
*******************************************************************************
** \brief DMA使使.
**
** \param None
**
** \retval None
**
** \note None
**
******************************************************************************/
void Dma_Enable(void)
{
M0P_DMAC->CONF |= DMA_ENABLE_Msk;
}
/**
*******************************************************************************
** \brief DMA.
**
** \param None
**
** \retval None
**
** \note None
**
******************************************************************************/
void Dma_Disable(void)
{
M0P_DMAC->CONF &= (~DMA_ENABLE_Msk);
}
/**
*******************************************************************************
** \brief DMA.
**
** \param [] enCh dma.
**
** \retval None
**
** \note None
**
******************************************************************************/
void Dma_SwStart(en_dma_channel_t enCh)
{
*(&M0P_DMAC->CONFA0+enCh) |= DMA_SOFTWARE_START_Msk;
}
/**
*******************************************************************************
** \brief DMA.
**
** \param [] enCh dma.
**
** \retval None
**
** \note None
**
******************************************************************************/
void Dma_SwStop(en_dma_channel_t enCh)
{
*(&M0P_DMAC->CONFA0+enCh) &= (~DMA_SOFTWARE_START_Msk);
}
/**
*******************************************************************************
** \brief 使dma.
**
** \param [] enCh dma.
**
** \retval None
**
** \note None
**
******************************************************************************/
void Dma_EnableChannelIrq(en_dma_channel_t enCh)
{
*(&M0P_DMAC->CONFB0+enCh) |= DMA_FIS_IE_Msk;
}
/**
*******************************************************************************
** \brief dma.
**
** \param [] enCh dma.
**
** \retval None
**
** \note None
**
******************************************************************************/
void Dma_DisableChannelIrq(en_dma_channel_t enCh)
{
*(&M0P_DMAC->CONFB0+enCh) &= (~DMA_FIS_IE_Msk);
}
/**
*******************************************************************************
** \brief 使dma..
**
** \param [] enCh dma.
**
** \retval None
**
** \note None
**
******************************************************************************/
void Dma_EnableChannelErrIrq(en_dma_channel_t enCh)
{
*(&M0P_DMAC->CONFB0+enCh) |= DMA_ERR_IE_Msk;
}
/**
*******************************************************************************
** \brief dma..
**
** \param [] enCh dma.
**
** \retval None
**
** \note None
**
******************************************************************************/
void Dma_DisableChannelErrIrq(en_dma_channel_t enCh)
{
*(&M0P_DMAC->CONFB0+enCh) &= (~DMA_ERR_IE_Msk);
}
/**
*******************************************************************************
** \brief 使dma
**
** \param [] enCh dma.
**
** \retval None
**
** \note None
**
******************************************************************************/
void Dma_EnableChannel(en_dma_channel_t enCh)
{
*(&M0P_DMAC->CONFA0+enCh) |= DMA_CH_ENABLE_Msk;
}
/**
*******************************************************************************
** \brief dma
**
** \param [] enCh dma.
**
** \retval None
**
** \note None
**
******************************************************************************/
void Dma_DisableChannel(en_dma_channel_t enCh)
{
*(&M0P_DMAC->CONFA0+enCh) &= (~DMA_CH_ENABLE_Msk);
}
/**
*******************************************************************************
** \brief (Block)
**
** \param [] enCh
** \param [] u16BlkSize (Block).
**
** \retval None
**
** \note None
**
******************************************************************************/
void Dma_SetBlockSize(en_dma_channel_t enCh, uint16_t u16BlkSize)
{
volatile uint32_t *pReg = (&M0P_DMAC->CONFA0+enCh);
*pReg = ((*pReg) & ((uint32_t)~DMA_BC_SEL_Msk)) | ((((uint32_t)u16BlkSize-1)&0x0f)<<DMA_BC_SEL_Pos);
}
/**
*******************************************************************************
** \brief (Block)
**
** \param [in] enCh .
** \param [in] u16TrnCnt (Block).
**
** \retval None
**
** \note None
**
******************************************************************************/
void Dma_SetTransferCnt(en_dma_channel_t enCh, uint16_t u16TrnCnt)
{
volatile uint32_t *pReg = (&M0P_DMAC->CONFA0+enCh);
*pReg = ((*pReg)&((uint32_t)~DMA_TC_SEL_Msk))|(((uint32_t)(u16TrnCnt-1)<<DMA_TC_SEL_Pos));
}
/**
*******************************************************************************
** \brief DMACCONFA:ENS.
**
** \param [in] enCh .
**
** \retval None
**
** \note None
**
******************************************************************************/
void Dma_EnableContinusTranfer(en_dma_channel_t enCh)
{
*(&M0P_DMAC->CONFB0+enCh) |= DMA_TRANSFER_RELOAD_Msk;
}
/**
*******************************************************************************
** \brief DMAC.
**
** \param [] enCh .
**
** \retval None
**
** \note None
**
******************************************************************************/
void Dma_DisableContinusTranfer(en_dma_channel_t enCh)
{
*(&M0P_DMAC->CONFB0+enCh) &= (~DMA_TRANSFER_RELOAD_Msk);
}
/**
*******************************************************************************
** \brief dma.
**
** \param None
**
** \retval None.
**
** \note None
**
******************************************************************************/
void Dma_HaltTranfer(void)
{
M0P_DMAC->CONF_f.HALT = 0x1;
}
/**
*******************************************************************************
** \brief dma.
**
** \param None
**
** \retval None
**
** \note None
**
******************************************************************************/
void Dma_RecoverTranfer(void)
{
M0P_DMAC->CONF_f.HALT = 0x0;
}
/**
*******************************************************************************
** \brief dma.
**
** \param [] enCh .
**
** \retval void
**
** \note None
**
******************************************************************************/
void Dma_PauseChannelTranfer(en_dma_channel_t enCh)
{
*(&M0P_DMAC->CONFA0+enCh) |= DMA_CH_PAUSE_Msk;
}
/**
*******************************************************************************
** \brief dma.
**
** \param [] enCh .
**
** \retval None
**
** \note None
**
******************************************************************************/
void Dma_RecoverChannelTranfer(en_dma_channel_t enCh)
{
*(&M0P_DMAC->CONFA0+enCh) &= (~DMA_CH_PAUSE_Msk);
}
/**
*******************************************************************************
** \brief .
**
** \param [] enCh dma.
** \param [] enWidth .
**
** \retval None
**
** \note None
**
******************************************************************************/
void Dma_SetTransferWidth(en_dma_channel_t enCh, en_dma_transfer_width_t enWidth)
{
volatile uint32_t *pReg = (&M0P_DMAC->CONFA0+enCh);
*pReg = ((*pReg)&((uint32_t)~DMA_TRANSFER_WIDTH_Msk))|((uint32_t)enWidth);
}
/**
*******************************************************************************
** \brief dma.
**
** \param [] enPrio .
**
** \retval None
**
** \note None
**
******************************************************************************/
void Dma_SetChPriority(en_dma_priority_t enPrio)
{
M0P_DMAC->CONF = ((M0P_DMAC->CONF)&((uint32_t)~DMA_PRIORITY_Msk))|((uint32_t)enPrio);
}
/**
*******************************************************************************
** \brief DMA.
**
** \param [] enCh dma.
**
** \retval en_dma_stat_t DMA
**
** \note None
**
******************************************************************************/
en_dma_stat_t Dma_GetStat(en_dma_channel_t enCh)
{
return (en_dma_stat_t)((*(&M0P_DMAC->CONFB0+enCh)&(DMA_STAT_Msk))>>DMA_STAT_Pos);
}
/**
*******************************************************************************
** \brief DMA.
**
** \param [] enCh dma.
**
** \retval None
**
** \note None
**
******************************************************************************/
void Dma_ClrStat(en_dma_channel_t enCh)
{
*(&M0P_DMAC->CONFB0+enCh) &= (~DMA_STAT_Msk);
}
/**
*******************************************************************************
** \brief
**
** \param [] enCh dma.
** \param [] u32Address .
**
** \retval None
**
** \note None
**
******************************************************************************/
void Dma_SetSourceAddress(en_dma_channel_t enCh, uint32_t u32Address)
{
*(&M0P_DMAC->SRCADR0+enCh) = u32Address;
}
/**
*******************************************************************************
** \brief .
**
** \param [] enCh dma.
** \param [] u32Address .
**
** \retval None
**
** \note None
**
******************************************************************************/
void Dma_SetDestinationAddress(en_dma_channel_t enCh, uint32_t u32Address)
{
*(&M0P_DMAC->DSTADR0+enCh) = u32Address;
}
//@} // DmacGroup
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

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@ -0,0 +1,701 @@
/******************************************************************************
*Copyright(C)2018, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/** \file flash.c
**
** Common API of flash.
** @link flashGroup Some description @endlink
**
** - 2018-05-08
**
******************************************************************************/
/*******************************************************************************
* Include files
******************************************************************************/
#include "flash.h"
/**
*******************************************************************************
** \addtogroup FlashGroup
******************************************************************************/
//@{
/*******************************************************************************
* Local pre-processor symbols/macros ('#define')
******************************************************************************/
#define FLASH_END_ADDR (0x0001FFFFu)
#define FLASH_BYPASS() M0P_FLASH->BYPASS = 0x5A5A;\
M0P_FLASH->BYPASS = 0xA5A5;
#define FLASH_IE_TRUE (0x03)
#define FLASH_IE_FALSE (0x00)
#define FLASH_TIMEOUT_INIT (0xFFu)
#define FLASH_TIMEOUT_PGM (0xFFu)
#define FLASH_TIMEOUT_ERASE (0xFFu)
#define FLASH_LOCK_ALL (0u)
#define FLASH_UNLOCK_ALL (0xFFFFFFFFu)
/*******************************************************************************
* Global variable definitions (declared in header file with 'extern')
******************************************************************************/
/*******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/**
******************************************************************************
** \brief FLASH OP
**
** Flash
******************************************************************************/
typedef enum en_flash_op
{
Read = 0u, ///<读配置值
Program = 1u, ///<编程配置值
SectorErase = 2u, ///<扇区擦除配置值
ChipErase = 3u, ///<全片擦除配置值
} en_flash_op_t;
/**
******************************************************************************
** \brief FLASH
**
** FLASH (4MHz)
******************************************************************************/
const uint32_t pu32PcgTimer4M[] = {
0x20u, //Tnvs
0x17u, //Tpgs
0x1Bu, //Tprog
0x4650u, //Tserase
0x222E0u, //Tmerase
0x18u, //Tprcv
0xF0u, //Tsrcv
0x3E8u //Tmrcv
};
/*******************************************************************************
* Local variable definitions ('static')
******************************************************************************/
/*******************************************************************************
* Local function prototypes ('static')
******************************************************************************/
/*******************************************************************************
* Function implementation - global ('extern') and local ('static')
******************************************************************************/
/**
*****************************************************************************
** \brief Flash
**
**
** \param [in] enFlashIntType Flash
**
** \retval TRUE or FALSE
*****************************************************************************/
boolean_t Flash_GetIntFlag(en_flash_int_type_t enFlashIntType)
{
boolean_t bRetVal = FALSE;
if(M0P_FLASH->IFR & enFlashIntType)
{
bRetVal = TRUE;
}
return bRetVal;
}
/**
*****************************************************************************
** \brief Flash
**
**
** \param [in] enFlashIntType Flash
**
** \retval Ok or Error
*****************************************************************************/
en_result_t Flash_ClearIntFlag(en_flash_int_type_t enFlashIntType)
{
en_result_t enResult = Error;
M0P_FLASH->ICLR &= ~(uint32_t)enFlashIntType;
enResult = Ok;
return enResult;
}
/**
*****************************************************************************
** \brief Flash使
**
**
** \param [in] enFlashIntType Flash
**
** \retval Ok or Error
*****************************************************************************/
en_result_t Flash_EnableIrq (en_flash_int_type_t enFlashIntType)
{
en_result_t enResult = Error;
FLASH_BYPASS();
M0P_FLASH->CR_f.IE |= enFlashIntType;
enResult = Ok;
return enResult;
}
/**
*****************************************************************************
** \brief Flash
**
**
** \param [in] enFlashIntType Flash
**
** \retval Ok or Error
*****************************************************************************/
en_result_t Flash_DisableIrq(en_flash_int_type_t enFlashIntType)
{
en_result_t enResult = Error;
FLASH_BYPASS();
M0P_FLASH->CR_f.IE &= ~(uint32_t)enFlashIntType;
enResult = Ok;
return enResult;
}
/**
*****************************************************************************
** \brief FLASH
**
** FLASH.
**
** \param [in] u8FreqCfg FLASH(HCLK)
** 1 - 4MHz;
** 2 - 8MHz;
** 4 - 16MHz;
** 6 - 24MHz;
** 8 - 32MHz;
** 12 - 48MHz;
** other -
** \param [in] bDpstbEn TRUE - DeepSleepFLASH;
** FALSE - DeepSleepFLASH;
**
** \retval Ok .
** \retval ErrorInvalidParameter .
** \retval ErrorUninitialized
*****************************************************************************/
en_result_t Flash_Init(uint8_t u8FreqCfg, boolean_t bDpstbEn)
{
uint32_t u32Index = 0;
volatile uint32_t u32TimeOut = FLASH_TIMEOUT_INIT;
en_result_t enResult = Ok;
uint32_t u32PrgTimer[8] = {0};
volatile uint32_t *pu32PrgTimerReg = (volatile uint32_t*)M0P_FLASH;
if ((1 != u8FreqCfg) && (2 != u8FreqCfg) &&
(4 != u8FreqCfg) && (6 != u8FreqCfg) &&
(8 != u8FreqCfg) && (12 != u8FreqCfg))
{
enResult = ErrorInvalidParameter;
return (enResult);
}
M0P_FLASH->CR_f.DPSTB_EN = bDpstbEn;
//flash时间参数配置值计算
for(u32Index=0; u32Index<8; u32Index++)
{
u32PrgTimer[u32Index] = u8FreqCfg * pu32PcgTimer4M[u32Index];
}
if(12 == u8FreqCfg)
{
u32PrgTimer[1] = 0xFF;
}
//flash时间参数寄存器配置
for(u32Index=0; u32Index<8; u32Index++)
{
u32TimeOut = FLASH_TIMEOUT_INIT;
while(pu32PrgTimerReg[u32Index] != u32PrgTimer[u32Index])
{
if(u32TimeOut--)
{
FLASH_BYPASS();
pu32PrgTimerReg[u32Index] = u32PrgTimer[u32Index];
}
else
{
return ErrorUninitialized;
}
}
}
return (enResult);
}
/**
*****************************************************************************
** \brief FLASH
**
** FLASH1.
**
** \param [in] u32Addr Flash
** \param [in] u8Data 1
**
** \retval Ok .
** \retval ErrorInvalidParameter FLASH
** \retval ErrorTimeout
*****************************************************************************/
en_result_t Flash_WriteByte(uint32_t u32Addr, uint8_t u8Data)
{
en_result_t enResult = Ok;
volatile uint32_t u32TimeOut = FLASH_TIMEOUT_PGM;
if (FLASH_END_ADDR < u32Addr)
{
enResult = ErrorInvalidParameter;
return (enResult);
}
//busy?
u32TimeOut = FLASH_TIMEOUT_PGM;
while (TRUE == M0P_FLASH->CR_f.BUSY)
{
if(0 == u32TimeOut--)
{
return ErrorTimeout;
}
}
//set OP
u32TimeOut = FLASH_TIMEOUT_PGM;
while(Program != M0P_FLASH->CR_f.OP)
{
if(u32TimeOut--)
{
FLASH_BYPASS();
M0P_FLASH->CR_f.OP = Program;
}
else
{
return ErrorTimeout;
}
}
//Flash 解锁
Flash_UnlockAll();
//write data
*((volatile uint8_t*)u32Addr) = u8Data;
//busy?
u32TimeOut = FLASH_TIMEOUT_PGM;
while (TRUE == M0P_FLASH->CR_f.BUSY)
{
if(0 == u32TimeOut--)
{
return ErrorTimeout;
}
}
//Flash 加锁
Flash_LockAll();
return (enResult);
}
/**
*****************************************************************************
** \brief FLASH
**
** FLASH2.
**
** \param [in] u32Addr Flash
** \param [in] u16Data 2
**
** \retval Ok .
** \retval ErrorInvalidParameter FLASH
** \retval ErrorTimeout
*****************************************************************************/
en_result_t Flash_WriteHalfWord(uint32_t u32Addr, uint16_t u16Data)
{
en_result_t enResult = Ok;
volatile uint32_t u32TimeOut = FLASH_TIMEOUT_PGM;
if (FLASH_END_ADDR < u32Addr)
{
enResult = ErrorInvalidParameter;
return (enResult);
}
//busy?
u32TimeOut = FLASH_TIMEOUT_PGM;
while (TRUE == M0P_FLASH->CR_f.BUSY)
{
if(0 == u32TimeOut--)
{
return ErrorTimeout;
}
}
//set OP
u32TimeOut = FLASH_TIMEOUT_PGM;
while(Program != M0P_FLASH->CR_f.OP)
{
if(u32TimeOut--)
{
FLASH_BYPASS();
M0P_FLASH->CR_f.OP = Program;
}
else
{
return ErrorTimeout;
}
}
//Flash 解锁
Flash_UnlockAll();
//write data
*((volatile uint16_t*)u32Addr) = u16Data;
//busy?
u32TimeOut = FLASH_TIMEOUT_PGM;
while (TRUE == M0P_FLASH->CR_f.BUSY)
{
if(0 == u32TimeOut--)
{
return ErrorTimeout;
}
}
//Flash 加锁
Flash_LockAll();
return (enResult);
}
/**
*****************************************************************************
** \brief FLASH
**
** FLASH1.
**
** \param [in] u32Addr Flash
** \param [in] u32Data 1
**
** \retval Ok .
** \retval ErrorInvalidParameter FLASH
** \retval ErrorTimeout
*****************************************************************************/
en_result_t Flash_WriteWord(uint32_t u32Addr, uint32_t u32Data)
{
en_result_t enResult = Ok;
volatile uint32_t u32TimeOut = FLASH_TIMEOUT_PGM;
if (FLASH_END_ADDR < u32Addr)
{
enResult = ErrorInvalidParameter;
return (enResult);
}
//busy?
u32TimeOut = FLASH_TIMEOUT_PGM;
while (TRUE == M0P_FLASH->CR_f.BUSY)
{
if(0 == u32TimeOut--)
{
return ErrorTimeout;
}
}
//Flash 解锁
Flash_UnlockAll();
//set OP
u32TimeOut = FLASH_TIMEOUT_PGM;
while(Program != M0P_FLASH->CR_f.OP)
{
if(u32TimeOut--)
{
FLASH_BYPASS();
M0P_FLASH->CR_f.OP = Program;
}
else
{
return ErrorTimeout;
}
}
//write data
*((volatile uint32_t*)u32Addr) = u32Data;
//busy?
u32TimeOut = FLASH_TIMEOUT_PGM;
while (TRUE == M0P_FLASH->CR_f.BUSY)
{
if(0 == u32TimeOut--)
{
return ErrorTimeout;
}
}
//Flash 加锁
Flash_LockAll();
return (enResult);
}
/**
*****************************************************************************
** \brief FLASH
**
** FLASH .
**
** \param [in] u32SectorAddr
**
** \retval Ok .
** \retval ErrorInvalidParameter FLASH
** \retval ErrorTimeout
*****************************************************************************/
en_result_t Flash_SectorErase(uint32_t u32SectorAddr)
{
en_result_t enResult = Ok;
volatile uint32_t u32TimeOut = FLASH_TIMEOUT_ERASE;
if (FLASH_END_ADDR < u32SectorAddr)
{
enResult = ErrorInvalidParameter;
return (enResult);
}
//busy?
u32TimeOut = FLASH_TIMEOUT_ERASE;
while (TRUE == M0P_FLASH->CR_f.BUSY)
{
if(0 == u32TimeOut--)
{
return ErrorTimeout;
}
}
//Flash 解锁
Flash_UnlockAll();
//set OP
u32TimeOut = FLASH_TIMEOUT_ERASE;
while(SectorErase != M0P_FLASH->CR_f.OP)
{
if(u32TimeOut--)
{
FLASH_BYPASS();
M0P_FLASH->CR_f.OP = SectorErase;
}
else
{
return ErrorTimeout;
}
}
//write data
*((volatile uint8_t*)u32SectorAddr) = 0;
//busy?
u32TimeOut = FLASH_TIMEOUT_ERASE;
while (TRUE == M0P_FLASH->CR_f.BUSY)
{
if(0 == u32TimeOut--)
{
return ErrorTimeout;
}
}
//Flash 加锁
Flash_LockAll();
return (enResult);
}
/**
*****************************************************************************
** \brief FLASH (RAM)
**
** FLASH .
**
**
** \retval Ok .
** \retval ErrorTimeout
**
*****************************************************************************/
en_result_t Flash_ChipErase(void)
{
en_result_t enResult = Ok;
volatile uint32_t u32TimeOut = FLASH_TIMEOUT_ERASE;
//busy?
u32TimeOut = FLASH_TIMEOUT_ERASE;
while (TRUE == M0P_FLASH->CR_f.BUSY)
{
if(0 == u32TimeOut--)
{
return ErrorTimeout;
}
}
//set OP
u32TimeOut = FLASH_TIMEOUT_ERASE;
while(ChipErase != M0P_FLASH->CR_f.OP)
{
if(u32TimeOut--)
{
FLASH_BYPASS();
M0P_FLASH->CR_f.OP = ChipErase;
}
else
{
return ErrorTimeout;
}
}
//Flash 解锁
Flash_UnlockAll();
//write data
*((volatile uint8_t*)0) = 0;
//busy?
u32TimeOut = FLASH_TIMEOUT_ERASE;
while (TRUE == M0P_FLASH->CR_f.BUSY)
{
if(0 == u32TimeOut--)
{
return ErrorTimeout;
}
}
//Flash 加锁
Flash_LockAll();
return (enResult);
}
/**
*****************************************************************************
** \brief FLASH
**
**
** \retval Null
*****************************************************************************/
void Flash_LockAll(void)
{
FLASH_BYPASS();
M0P_FLASH->SLOCK0 = FLASH_LOCK_ALL;
FLASH_BYPASS();
M0P_FLASH->SLOCK1 = FLASH_LOCK_ALL;
}
/**
*****************************************************************************
** \brief FLASH
**
**
** \retval Null
*****************************************************************************/
void Flash_UnlockAll(void)
{
FLASH_BYPASS();
M0P_FLASH->SLOCK0 = FLASH_UNLOCK_ALL;
FLASH_BYPASS();
M0P_FLASH->SLOCK1 = FLASH_UNLOCK_ALL;
}
/**
*****************************************************************************
** \brief FLASH
**
** \param [in] enWaitCycle FLASH
**
** \retval Ok
** \retval ErrorInvalidParameter
*****************************************************************************/
en_result_t Flash_WaitCycle(en_flash_waitcycle_t enWaitCycle)
{
en_result_t enResult = Ok;
FLASH_BYPASS();
M0P_FLASH->CR_f.WAIT = enWaitCycle;
return enResult;
}
/**
*****************************************************************************
** \brief FLASH LOCK
**
** \param [in] enLock @ref en_flash_lock_t
** \param [in] u32LockValue 32bitsbit=0Sectorbit=1
** \note Sector[enLock*128 + i*4, enLock*128 + i*4+3]
** (iu32LockValuebit0~31)
** enLock = FlashLock1, u32LockValue = 0x00000002,
** [Sector128,Sector131]
** \retval Ok
** \retval ErrorInvalidParameter
*****************************************************************************/
en_result_t Flash_LockSet(en_flash_lock_t enLock, uint32_t u32LockValue)
{
FLASH_BYPASS();
*((&M0P_FLASH->SLOCK0) + enLock) = u32LockValue;
return Ok;
}
//@} // FlashGroup
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

View File

@ -0,0 +1,569 @@
/******************************************************************************
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file Gpio.c
**
** GPIO driver API.
** @link Driver Group Some description @endlink
**
** - 2018-04-22 1.0 Lux First version
**
******************************************************************************/
/*******************************************************************************
* Include files
******************************************************************************/
#include "gpio.h"
/**
*******************************************************************************
** \addtogroup GpioGroup
******************************************************************************/
//@{
/*******************************************************************************
* Local pre-processor symbols/macros ('#define')
******************************************************************************/
#define IS_VALID_PIN(port,pin) ( )
/*******************************************************************************
* Global variable definitions (declared in header file with 'extern') *
******************************************************************************/
/*******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/*******************************************************************************
* Local function prototypes ('static')
******************************************************************************/
/*******************************************************************************
* Local variable definitions ('static')
******************************************************************************/
/*******************************************************************************
* Function implementation - global ('extern') and local ('static')
******************************************************************************/
/**
*******************************************************************************
** \brief GPIO
**
** \param [in] enPort IO Port
** \param [in] enPin IO Pin
** \param [in] pstcGpioCfg IO
**
** \retval Ok
**
******************************************************************************/
en_result_t Gpio_Init(en_gpio_port_t enPort, en_gpio_pin_t enPin, stc_gpio_cfg_t *pstcGpioCfg)
{
//配置为默认值,GPIO功能
SetBit((uint32_t)&M0P_GPIO->PAADS + enPort, enPin, FALSE);
*((uint32_t*)(((uint32_t)(&(M0P_GPIO->PA00_SEL)) + enPort) + (((uint32_t)enPin)<<2))) = GpioAf0;
//默认输出值配置
SetBit(((uint32_t)&M0P_GPIO->PAOUT + enPort), enPin, pstcGpioCfg->bOutputVal);
//方向配置
SetBit(((uint32_t)&M0P_GPIO->PADIR + enPort), enPin, (boolean_t)(pstcGpioCfg->enDir));
//驱动能力配置
SetBit(((uint32_t)&M0P_GPIO->PADR + enPort), enPin, (boolean_t)(pstcGpioCfg->enDrv));
//上拉/下拉配置
SetBit(((uint32_t)&M0P_GPIO->PAPU + enPort), enPin, (boolean_t)(pstcGpioCfg->enPu));
SetBit(((uint32_t)&M0P_GPIO->PAPD + enPort), enPin, (boolean_t)(pstcGpioCfg->enPd));
//开漏输出功能
SetBit(((uint32_t)&M0P_GPIO->PAOD + enPort), enPin, (boolean_t)(pstcGpioCfg->enOD));
M0P_GPIO->CTRL2_f.AHB_SEL = pstcGpioCfg->enCtrlMode;
return Ok;
}
/**
*******************************************************************************
** \brief GPIO IO
**
** \param [in] enPort IO Port
** \param [in] enPin IO Pin
**
** \retval boolean_t IO
******************************************************************************/
boolean_t Gpio_GetInputIO(en_gpio_port_t enPort, en_gpio_pin_t enPin)
{
return GetBit(((uint32_t)&M0P_GPIO->PAIN + enPort), enPin);
}
/**
*******************************************************************************
** \brief GPIO IO Port
**
** \param [in] enPort IO Port
**
** \retval boolean_t IO Port
******************************************************************************/
uint16_t Gpio_GetInputData(en_gpio_port_t enPort)
{
return (uint16_t)(*((uint32_t *)((uint32_t)&M0P_GPIO->PAIN + enPort)));
}
/**
*******************************************************************************
** \brief GPIO IO
**
** \param [in] enPort IO Port
** \param [in] enPin IO Pin
** \param [out] bVal
**
** \retval en_result_t Ok
**
******************************************************************************/
en_result_t Gpio_WriteOutputIO(en_gpio_port_t enPort, en_gpio_pin_t enPin, boolean_t bVal)
{
SetBit(((uint32_t)&M0P_GPIO->PAOUT + enPort), enPin, bVal);
return Ok;
}
/**
*******************************************************************************
** \brief GPIO IO
**
** \param [in] enPort IO Port
** \param [in] enPin IO Pin
**
** \retval boolean_t IO
******************************************************************************/
boolean_t Gpio_ReadOutputIO(en_gpio_port_t enPort, en_gpio_pin_t enPin)
{
return GetBit(((uint32_t)&M0P_GPIO->PAOUT + enPort), enPin);
}
/**
*******************************************************************************
** \brief GPIO IO PortPortPIN
**
** \param [in] enPort IO Port
** \param [in] u16ValMsk Port16PIN,PINbit1
**
** \retval boolean_t IO Port
******************************************************************************/
en_result_t Gpio_SetPort(en_gpio_port_t enPort, uint16_t u16ValMsk)
{
*((uint16_t*)(((uint32_t)&(M0P_GPIO->PABSET)) + enPort)) = u16ValMsk;
return Ok;
}
/**
*******************************************************************************
** \brief GPIO IO
**
** \param [in] enPort IO Port
** \param [in] enPin IO Pin
**
** \retval en_result_t Ok
**
******************************************************************************/
en_result_t Gpio_SetIO(en_gpio_port_t enPort, en_gpio_pin_t enPin)
{
SetBit(((uint32_t)&M0P_GPIO->PABSET + enPort), enPin, TRUE);
return Ok;
}
/**
*******************************************************************************
** \brief GPIO IO PortPortPIN
**
** \param [in] enPort IO Port
** \param [in] u16ValMsk Port16PIN,PINbit1
**
** \retval boolean_t IO Port
******************************************************************************/
en_result_t Gpio_ClrPort(en_gpio_port_t enPort, uint16_t u16ValMsk)
{
*((uint16_t*)(((uint32_t)&(M0P_GPIO->PABCLR)) + enPort)) = u16ValMsk;
return Ok;
}
/**
*******************************************************************************
** \brief GPIO IO
**
** \param [in] enPort IO Port
** \param [in] enPin IO Pin
**
** \retval en_result_t Ok
**
******************************************************************************/
en_result_t Gpio_ClrIO(en_gpio_port_t enPort, en_gpio_pin_t enPin)
{
SetBit(((uint32_t)&M0P_GPIO->PABCLR + enPort), enPin, TRUE);
return Ok;
}
/**
*******************************************************************************
** \brief GPIO IO Port//PortPIN
**
** \param [in] enPort IO Port
** \param [in] u32ValMsk 16bitsPort16PIN,
** 16bitsPort16PIN,
** PINbit1,PIN1,PIN
**
** \retval en_result_t Ok
**
******************************************************************************/
en_result_t Gpio_SetClrPort(en_gpio_port_t enPort, uint32_t u32ValMsk)
{
*((uint32_t*)(((uint32_t)&(M0P_GPIO->PABSETCLR)) + enPort)) = u32ValMsk;
return Ok;
}
/**
*******************************************************************************
** \brief GPIO IO
**
** \param [in] enPort IO Port
** \param [in] enPin IO Pin
**
** \retval Ok
**
******************************************************************************/
en_result_t Gpio_SetAnalogMode(en_gpio_port_t enPort, en_gpio_pin_t enPin)
{
SetBit((uint32_t)&M0P_GPIO->PAADS + enPort, enPin, TRUE);
return Ok;
}
/**
*******************************************************************************
** \brief GPIO IO
**
** \param [in] enPort IO Port
** \param [in] enPin IO Pin
** \param [in] enAf
** \retval Ok
**
******************************************************************************/
en_result_t Gpio_SetAfMode(en_gpio_port_t enPort, en_gpio_pin_t enPin, en_gpio_af_t enAf)
{
*((uint32_t*)(((uint32_t)(&(M0P_GPIO->PA00_SEL)) + enPort) + (((uint32_t)enPin)<<2))) = enAf;
return Ok;
}
/**
*******************************************************************************
** \brief GPIO IO使
**
** \param [in] enPort IO Port
** \param [in] enPin IO Pin
** \param [in] enType 使
**
** \retval Ok
******************************************************************************/
en_result_t Gpio_EnableIrq(en_gpio_port_t enPort, en_gpio_pin_t enPin, en_gpio_irqtype_t enType)
{
uint32_t u32PieAddr;
u32PieAddr = ((uint32_t)((&M0P_GPIO->PAHIE) + enType)) + enPort;
SetBit(u32PieAddr, enPin, TRUE);
return Ok;
}
/**
*******************************************************************************
** \brief GPIO IO
**
** \param [in] enPort IO Port
** \param [in] enPin IO Pin
** \param [in] enType 使
**
** \retval Ok
******************************************************************************/
en_result_t Gpio_DisableIrq(en_gpio_port_t enPort, en_gpio_pin_t enPin, en_gpio_irqtype_t enType)
{
uint32_t u32PieAddr;
u32PieAddr = ((uint32_t)((&M0P_GPIO->PAHIE) + enType)) + enPort;
SetBit(u32PieAddr, enPin, FALSE);
return Ok;
}
/**
*******************************************************************************
** \brief GPIO IO
**
** \param [in] u8Port IO Port
** \param [in] u8Pin IO Pin
**
** \retval IO
******************************************************************************/
boolean_t Gpio_GetIrqStatus(en_gpio_port_t enPort, en_gpio_pin_t enPin)
{
return GetBit((uint32_t)&M0P_GPIO->PA_STAT + enPort, enPin);
}
/**
*******************************************************************************
** \brief GPIO IO
**
** \param [in] u8Port IO Port
** \param [in] u8Pin IO Pin
**
** \retval Ok
******************************************************************************/
en_result_t Gpio_ClearIrq(en_gpio_port_t enPort, en_gpio_pin_t enPin)
{
SetBit((uint32_t)&M0P_GPIO->PA_ICLR + enPort, enPin, FALSE);
return Ok;
}
/**
*******************************************************************************
** \brief GPIO
**
** \param [in] enIrqMode
**
** \retval Ok
******************************************************************************/
en_result_t Gpio_SfIrqModeCfg(en_gpio_sf_irqmode_t enIrqMode)
{
M0P_GPIO->CTRL0_f.IESEL = enIrqMode;
return Ok;
}
/**
*******************************************************************************
** \brief GPIO IR
**
** \param [in] enIrPolMode IR
**
** \retval Ok
******************************************************************************/
en_result_t Gpio_SfIrPolCfg(en_gpio_sf_irpol_t enIrPolMode)
{
M0P_GPIO->CTRL1_f.IR_POL = enIrPolMode;
return Ok;
}
/**
*******************************************************************************
** \brief GPIO HCLK
**
** \param [in] enGate HCLK使
** \param [in] enDiv
**
** \retval Ok
******************************************************************************/
en_result_t Gpio_SfHClkOutputCfg(en_gpio_sf_hclkout_g_t enGate, en_gpio_sf_hclkout_div_t enDiv)
{
M0P_GPIO->CTRL1_f.HCLK_EN = enGate;
M0P_GPIO->CTRL1_f.HCLK_SEL = enDiv;
return Ok;
}
/**
*******************************************************************************
** \brief GPIO PCLK
**
** \param [in] enGate PCLK使
** \param [in] enDiv
**
** \retval Ok
******************************************************************************/
en_result_t Gpio_SfPClkOutputCfg(en_gpio_sf_pclkout_g_t enGate, en_gpio_sf_pclkout_div_t enDiv)
{
M0P_GPIO->CTRL1_f.PCLK_EN = enGate;
M0P_GPIO->CTRL1_f.PCLK_SEL = enDiv;
return Ok;
}
/**
*******************************************************************************
** \brief GPIO
**
** \param [in] enExtClk
**
** \retval Ok
******************************************************************************/
en_result_t Gpio_SfExtClkCfg(en_gpio_sf_ssn_extclk_t enExtClk)
{
M0P_GPIO->CTRL1_f.EXT_CLK_SEL = enExtClk;
return Ok;
}
/**
*******************************************************************************
** \brief GPIO SSN
**
** \param [in] enSpi SSN SPI
** \param [in] enSsn SSN
**
** \retval Ok
******************************************************************************/
en_result_t Gpio_SfSsnCfg(en_gpio_sf_ssnspi_t enSpi, en_gpio_sf_ssn_extclk_t enSsn)
{
//SPI0
if(enSpi == GpioSpi0)
{
M0P_GPIO->CTRL1_f.SSN0_SEL = enSsn;
}
//SPI1
if(enSpi == GpioSpi1)
{
M0P_GPIO->CTRL2_f.SSN1_SEL = enSsn;
}
return Ok;
}
/**
*******************************************************************************
** \brief GPIO Timer
**
** \param [in] enTimG Timer
** \param [in] enSf Timer
**
** \retval Ok
******************************************************************************/
en_result_t Gpio_SfTimGCfg(en_gpio_sf_tim_g_t enTimG, en_gpio_sf_t enSf)
{
if(enTimG&0x20u)
{
enTimG &= ~0x20u;
M0P_GPIO->PCAS &= (uint32_t)(~(0x07U<<enTimG));
M0P_GPIO->PCAS |= (uint32_t)(enSf<<enTimG);
}
else
{
M0P_GPIO->TIMGS &= (uint32_t)(~(0x07U<<enTimG));
M0P_GPIO->TIMGS |= (uint32_t)(enSf<<enTimG);
}
return Ok;
}
/**
*******************************************************************************
** \brief GPIO Timer ETR
**
** \param [in] enTimE Timer
** \param [in] enSf Timer
**
** \retval Ok
******************************************************************************/
en_result_t Gpio_SfTimECfg(en_gpio_sf_tim_e_t enTimE, en_gpio_sf_t enSf)
{
if(enTimE&0x20u)
{
enTimE &= ~0x20u;
M0P_GPIO->PCAS &= (uint32_t)(~(0x07U<<enTimE));
M0P_GPIO->PCAS |= (uint32_t)(enSf<<enTimE);
}
else
{
M0P_GPIO->TIMES &= (uint32_t)(~(0x07U<<enTimE));
M0P_GPIO->TIMES |= (uint32_t)(enSf<<enTimE);
}
return Ok;
}
/**
*******************************************************************************
** \brief GPIO Timer
**
** \param [in] enTimC Timer
** \param [in] enSf Timer
**
** \retval Ok
******************************************************************************/
en_result_t Gpio_SfTimCCfg(en_gpio_sf_tim_c_t enTimC, en_gpio_sf_t enSf)
{
M0P_GPIO->TIMCPS &= (uint32_t)(~(0x07u<<enTimC));
M0P_GPIO->TIMCPS |= (uint32_t)(enSf<<enTimC);
return Ok;
}
/**
*******************************************************************************
** \brief GPIO PCA
**
** \param [in] enPca PCA
** \param [in] enSf PCA
**
** \retval Ok
******************************************************************************/
en_result_t Gpio_SfPcaCfg(en_gpio_sf_pca_t enPca, en_gpio_sf_t enSf)
{
M0P_GPIO->PCAS &= (uint32_t)(~(0x07u<<enPca));
M0P_GPIO->PCAS |= (uint32_t)(enSf<<enPca);
return Ok;
}
//@} // GpioGroup
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

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@ -0,0 +1,176 @@
/******************************************************************************
*Copyright(C)2017, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/** \file crc.c
**
** Common API of crc.
** @link crcGroup Some description @endlink
**
** - 2017-05-16
**
******************************************************************************/
/*******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
#include "hdiv.h"
/**
*******************************************************************************
** \addtogroup CrcGroup
******************************************************************************/
//@{
/*******************************************************************************
* Local pre-processor symbols/macros ('#define')
******************************************************************************/
/*******************************************************************************
* Global variable definitions (declared in header file with 'extern')
******************************************************************************/
/*******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/*******************************************************************************
* Local variable definitions ('static')
******************************************************************************/
/*******************************************************************************
* Local function prototypes ('static')
******************************************************************************/
/*******************************************************************************
* Function implementation - global ('extern') and local ('static')
******************************************************************************/
/**
* \brief
* HDIV
*
* \param [in] Dividend
* \param [in] Dividsor
* \param [out] stcDivResult
*
* \retval en_result_t Ok:
* \retval en_result_t ErrorInvalidParameter:
*/
en_result_t Hdiv_Unsigned(uint32_t Dividend,uint16_t Divisor,stc_div_unsigned_result_t* stcDivResult)
{
M0P_HDIV->SIGN_f.SIGN = 0;
if(NULL == stcDivResult)
{
return ErrorInvalidParameter;
}
(M0P_HDIV ->DIVIDEND) = Dividend;
(M0P_HDIV ->DIVISOR) = Divisor;
if(Hdiv_GetZeroState() == TRUE)
{
return ErrorInvalidParameter;
}
while(Hdiv_GetEndState() != TRUE)
{
;
}
stcDivResult->Quotient = M0P_HDIV->QUOTIENT_f.QUOTIENT;
stcDivResult->Remainder = M0P_HDIV ->REMAINDER_f.REMAINDER;
return Ok;
}
/**
* \brief
* HDIV
*
* \param [in] Dividend
* \param [in] Dividsor
* \param [out] stcDivResult
*
* \retval en_result_t Ok:
* \retval en_result_t ErrorInvalidParameter:
*/
en_result_t Hdiv_Signed(int32_t Dividend,int16_t Divisor,stc_div_signed_result_t* stcDivResult)
{
__IO uint32_t * pDivdend = &(M0P_HDIV ->DIVIDEND);
__IO uint32_t * pDivsor = &(M0P_HDIV ->DIVISOR);
if(NULL == stcDivResult)
{
return ErrorInvalidParameter;
}
M0P_HDIV->SIGN_f.SIGN = 1;
*(__IO int32_t *)pDivdend = Dividend;
*(__IO int16_t *)pDivsor = Divisor;
if(Hdiv_GetZeroState() == TRUE)
{
return ErrorInvalidParameter;
}
while(Hdiv_GetEndState() != TRUE)
{
;
}
stcDivResult->Quotient = M0P_HDIV->QUOTIENT_f.QUOTIENT;
stcDivResult->Remainder = M0P_HDIV ->REMAINDER_f.REMAINDER;
return Ok;
}
boolean_t Hdiv_GetEndState(void)
{
return M0P_HDIV->STAT_f.END;
}
boolean_t Hdiv_GetZeroState(void)
{
return M0P_HDIV->STAT_f.ZERO;
}
//@} // CrcGroup
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

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@ -0,0 +1,267 @@
/*************************************************************************************
* Copyright (C) 2017, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file I2C.c
**
** WDT function driver API.
** @link SampleGroup Some description @endlink
**
** - 2018-03-13 1.0 CJ First version for Device Driver Library of Module.
**
******************************************************************************/
/******************************************************************************/
/* Include files */
/******************************************************************************/
#include "i2c.h"
/**
*******************************************************************************
** \addtogroup I2cGroup
******************************************************************************/
//@{
/******************************************************************************/
/* Local function prototypes ('static') */
/******************************************************************************/
/**
******************************************************************************
** \brief I2C
**
** \param [in] u8Tm
**
** \retval enRet
**
******************************************************************************/
en_result_t I2C_SetBaud(M0P_I2C_TypeDef* I2Cx, uint8_t u8Tm)
{
en_result_t enRet = Error;
I2Cx->TM = u8Tm;
enRet = Ok;
return enRet;
}
/**
******************************************************************************
** \brief I2C
**
** \param [in] enFunc
**
** \retval enRet
**
******************************************************************************/
en_result_t I2C_SetFunc(M0P_I2C_TypeDef* I2Cx, en_i2c_func_t enFunc)
{
en_result_t enRet = Error;
SetBit((uint32_t)&I2Cx->CR, enFunc, TRUE);
enRet = Ok;
return enRet;
}
/**
******************************************************************************
** \brief I2C
**
** \param [in] enFunc
**
** \retval enRet
**
******************************************************************************/
en_result_t I2C_ClearFunc(M0P_I2C_TypeDef* I2Cx, en_i2c_func_t enFunc)
{
en_result_t enRet = Error;
SetBit((uint32_t)&I2Cx->CR, enFunc, FALSE);
enRet = Ok;
return enRet;
}
/**
******************************************************************************
** \brief I2C
**
** \param
**
** \retval bIrq
**
******************************************************************************/
boolean_t I2C_GetIrq(M0P_I2C_TypeDef* I2Cx)
{
if(I2Cx->CR&0x8)
{
return TRUE;
}
else
{
return FALSE;
}
}
/**
******************************************************************************
** \brief I2C
**
** \param
**
** \retval bIrq
**
******************************************************************************/
en_result_t I2C_ClearIrq(M0P_I2C_TypeDef* I2Cx)
{
en_result_t enRet = Error;
I2Cx->CR &= ~0x8u;
enRet = Ok;
return enRet;
}
/**
******************************************************************************
** \brief I2C
**
** \param
**
** \retval I2C
**
******************************************************************************/
uint8_t I2C_GetState(M0P_I2C_TypeDef* I2Cx)
{
uint8_t u8State = 0;
u8State = I2Cx->STAT;
return u8State;
}
/**
******************************************************************************
** \brief
**
** \param u8Data
**
** \retval
**
******************************************************************************/
en_result_t I2C_WriteByte(M0P_I2C_TypeDef* I2Cx, uint8_t u8Data)
{
en_result_t enRet = Error;
I2Cx->DATA = u8Data;
enRet = Ok;
return enRet;
}
/**
******************************************************************************
** \brief
**
** \param
**
** \retval
**
******************************************************************************/
uint8_t I2C_ReadByte(M0P_I2C_TypeDef* I2Cx)
{
uint8_t u8Data = 0;
u8Data = I2Cx->DATA;
return u8Data;
}
/**
******************************************************************************
** \brief I2C
**
** \param pstcI2CCfg
**
** \retval
**
******************************************************************************/
en_result_t I2C_Init(M0P_I2C_TypeDef* I2Cx, stc_i2c_cfg_t *pstcI2CCfg)
{
en_result_t enRet = Error;
uint8_t u8Tm;
if(M0P_I2C0 == I2Cx)
{
M0P_RESET->PERI_RESET0 &= ~(uint32_t)0x10u;
M0P_RESET->PERI_RESET0 |= (uint32_t)0x10u;
}
else
{
M0P_RESET->PERI_RESET0 &= ~(uint32_t)0x20u;
M0P_RESET->PERI_RESET0 |= (uint32_t)0x20u;
}
I2Cx->CR = 0;
I2Cx->CR = pstcI2CCfg->enMode;
if((pstcI2CCfg->u32Baud<<4) > pstcI2CCfg->u32Pclk)
{
return Error;
}
if(I2cMasterMode == pstcI2CCfg->enMode)
{
I2Cx->TMRUN = TRUE;
///< Fsck = Fpclk/8*(Tm+1)
u8Tm = ((pstcI2CCfg->u32Pclk / pstcI2CCfg->u32Baud) >> 3) - 1;
if(9 > u8Tm)
{
I2C_SetFunc(I2Cx,I2cHlm_En);
}
enRet = I2C_SetBaud(I2Cx, u8Tm);
}
else
{
I2Cx->TMRUN = FALSE;
pstcI2CCfg->u8SlaveAddr = (uint8_t)(((uint32_t)pstcI2CCfg->u8SlaveAddr<<1)|(pstcI2CCfg->bGc));
I2Cx->ADDR = pstcI2CCfg->u8SlaveAddr;
}
return enRet;
}
//@} // I2cGroup

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@ -0,0 +1,321 @@
/******************************************************************************
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file i2s.c
**
** I2S driver API.
**
** - 2019-07-05 lsq First Version
**
******************************************************************************/
/******************************************************************************
* Include files
******************************************************************************/
#include "i2s.h"
/**
******************************************************************************
** \addtogroup AdcGroup
******************************************************************************/
//@{
/******************************************************************************
* Local pre-processor symbols/macros ('#define')
******************************************************************************/
/******************************************************************************
* Global variable definitions (declared in header file with 'extern')
******************************************************************************/
/******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/******************************************************************************
* Local function prototypes ('static')
******************************************************************************/
/******************************************************************************
* Local variable definitions ('static')
******************************************************************************/
/*****************************************************************************
* Function implementation - global ('extern') and local ('static')
*****************************************************************************/
/**
******************************************************************************
* @brief 使I2Sx
* @param i2sx: M0P_I2S0M0P_I2S1
* @param i2s_it:
* @arg I2S_IT_TXE: 使
* @arg I2S_IT_RXNEIE:使
* @arg I2S_IT_ERRIE: 使
* @param NewState: =ENALE DISABLE
* @retval None
**
******************************************************************************/
void I2S_ConfIt(M0P_I2S_TypeDef *i2sx, uint8_t i2s_it, en_en_state_t NewState)
{
uint32_t itmark=0;
itmark=1<<i2s_it;
if(NewState == ENABLE) //使能中断
{
i2sx->CR |= itmark;
}
else if(NewState == DISABLE) //禁止中断
{
i2sx->CR &= ~itmark;
}
else
{
;
}
}
/**
******************************************************************************
** \brief I2SDMA使
**
* @param i2sx: M0P_I2S0M0P_I2S1
* @param i2s_it:
* @arg I2S_RDMA_EN: DMA使
* @arg I2S_LDMA_EN: DMA使
* @param NewState: =ENALE DISABLE
** \retval none
**
******************************************************************************/
void I2s_ConfDma(M0P_I2S_TypeDef *i2sx, uint8_t rl_dma_en, en_en_state_t NewState)
{
uint32_t itmark=0;
itmark = 1<<rl_dma_en;
if(NewState == ENABLE) //使能左声道或右声道DMA
{
i2sx->CR |= itmark;
}
else if(NewState == DISABLE) //禁止左声道或右声道DMA
{
i2sx->CR &= ~itmark;
}
else
{
;
}
}
/**
******************************************************************************
** \brief I2S
**
* @param i2sx: M0P_I2S0M0P_I2S1
* @param i2s_status:
* @arg I2S_RXNE_L:
* @arg I2S_TXE_L:
* @arg I2S_UDR_L:
* @arg I2S_UDR_R:
* @arg I2S_OVR_L:
* @arg I2S_BSY:
* @arg I2S_FRE:
* @arg I2S_OVR_R:
* @arg I2S_RXNE_R:
* @arg I2S_TXE_R:
** \retval RESET SET
**
******************************************************************************/
en_flag_status_t I2s_GetStatus(M0P_I2S_TypeDef *i2sx, uint8_t i2s_status)
{
uint16_t itmark=0;
en_flag_status_t bitstatus;
itmark=(uint16_t)1<<i2s_status;
if(!(i2sx->SR & itmark))
{
bitstatus = RESET;
}
else
{
bitstatus = SET;
}
return bitstatus;
}
/**
******************************************************************************
** \brief I2S
**
* @param i2sx: M0P_I2S0M0P_I2S1
* @param i2s_status:
* @arg I2S_FLAG_UDF:
* @arg I2S_FLAG_OVR:
* @arg I2S_FLAG_FRE:
** \retval none
**
******************************************************************************/
void I2s_ClearITPendingBit(M0P_I2S_TypeDef *i2sx, uint8_t i2s_it_flag)
{
uint32_t bitstatus;
bitstatus = 1<<i2s_it_flag;
i2sx->ICR &= ~bitstatus;
}
/**
******************************************************************************
** \brief DRL
**
* @param i2sx: M0P_I2S0M0P_I2S1
* @param Data: 16
** \retval none
**
******************************************************************************/
void I2s_SendDataL(M0P_I2S_TypeDef *i2sx, uint16_t Data)
{
i2sx->DRL_f.DRL = Data;
}
/**
******************************************************************************
** \brief DRR
**
* @param i2sx: M0P_I2S0M0P_I2S1
* @param Data: 16
** \retval none
**
******************************************************************************/
void I2s_SendDataR(M0P_I2S_TypeDef *i2sx, uint16_t Data)
{
i2sx->DRR_f.DRR = Data;
}
/**
******************************************************************************
** \brief DRL
**
* @param i2sx: M0P_I2S0M0P_I2S1
** \retval
**
******************************************************************************/
uint16_t I2s_ReceiveDataL(M0P_I2S_TypeDef *i2sx)
{
uint16_t data;
data = (uint16_t)i2sx->DRL;
return data;
}
/**
******************************************************************************
** \brief DRR
**
* @param i2sx: M0P_I2S0M0P_I2S1
** \retval
**
******************************************************************************/
uint16_t I2s_ReceiveDataR(M0P_I2S_TypeDef *i2sx)
{
uint16_t data;
data = (uint16_t)i2sx->DRR;
return data;
}
/**
******************************************************************************
** \brief I2Sx
** ()FRACT=0:
** (1)(MCKOE=1)
** 16=I2SxCLK/[(16*2)*(2*I2SDIV+ODD)*8]
** 32=I2SxCLK/[(32*2)*(2*I2SDIV+ODD)*4]
** (2)(MCKOE=0)
** 16=I2SxCLK/[(16*2)*(2*I2SDIV+ODD)]
** 32=I2SxCLK/[(32*2)*(2*I2SDIV+ODD)]
** ()FRACT=0:
** (1)(MCKOE=1)
** 16=I2SxCLK/[(16*2)*(2*(I2SDIV+FRACT/64))*8]
** 32=I2SxCLK/[(32*2)*(2*(I2SDIV+FRACT/64))*4]
** (2)(MCKOE=0)
** 16=I2SxCLK/[(16*2)*(2*(I2SDIV+FRACT/64))]
** 32=I2SxCLK/[(32*2)*(2*(I2SDIV+FRACT/64))]
** I2SDIVFRACTI2SODD
* @param i2sx: M0P_I2S0M0P_I2S1
* @param i2s_conf
** \retval
**
******************************************************************************/
void I2s_Init(M0P_I2S_TypeDef *i2sx, stc_i2s_config_t *i2s_conf)
{
i2sx->CFGR_f.CFG = i2s_conf->i2s_Mode; //设置模式
i2sx->CFGR_f.PCMSYNC = i2s_conf->i2s_PcmSync; //PCM帧同步位 只有在I2SSTD=3的情况下该位才有意义
i2sx->CFGR_f.CKSEL = i2s_conf->i2s_Cksel; //主模式下I2S始终选择0PCLK 1:HCLK
i2sx->CFGR_f.STD = i2s_conf->i2s_Std; //标准选择 0I2S Philips 1:MAS左对齐 2LSB右对齐 3PCM标准
i2sx->CFGR_f.DATLEN = i2s_conf->i2s_Datalen; //要传输的数据长度
i2sx->CFGR_f.CHIEN = i2s_conf->i2s_Chlen; //每个音频通道的位数016位 132位
i2sx->PR_f.MCKOE = i2s_conf->i2s_Mckoe; //主时钟MCK输出使能
i2sx->PR_f.I2SDIV = i2s_conf->i2s_Div;
i2sx->PR_f.FRACT = i2s_conf->i2s_Fract;
i2sx->PR_f.ODD = i2s_conf->i2s_Odd;
}
/**
******************************************************************************
** \brief 使I2Sx
**
* @param i2sx: M0P_I2S0M0P_I2S1
**
* @param NewState :EANBLE DISABLE
** \retval
**
******************************************************************************/
void I2S_Cmd(M0P_I2S_TypeDef *i2sx, en_en_state_t NewState)
{
i2sx->CFGR_f.E = NewState;
}
/******************************************************************************
* EOF (not truncated)
******************************************************************************/

View File

@ -0,0 +1,290 @@
/******************************************************************************
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file lcd.c
**
** lcd driver API.
**
** - 2019-04-02 First Version
**
******************************************************************************/
/******************************************************************************
* Include files
******************************************************************************/
#include "lcd.h"
/**
******************************************************************************
** \addtogroup AdcGroup
******************************************************************************/
//@{
/******************************************************************************
* Local pre-processor symbols/macros ('#define')
******************************************************************************/
/******************************************************************************
* Global variable definitions (declared in header file with 'extern')
******************************************************************************/
/******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/******************************************************************************
* Local function prototypes ('static')
******************************************************************************/
/******************************************************************************
* Local variable definitions ('static')
******************************************************************************/
/*****************************************************************************
* Function implementation - global ('extern') and local ('static')
*****************************************************************************/
/**
******************************************************************************
** \brief LCDINTF
**
** @param
** \retval
**
******************************************************************************/
boolean_t Lcd_GetItStatus(void)
{
return (((M0P_LCD->CR1)>>11)&0x01)? TRUE : FALSE;
}
/**
******************************************************************************
** \brief INTF
**
** @param
** \retval
**
******************************************************************************/
void Lcd_ClearItPendingBit(void)
{
SetBit((uint32_t)(&(M0P_LCD->INTCLR)), 10, 0);
}
/**
******************************************************************************
** \brief LCD
**
** \param pstcSegComPara stcSegCom
**
** \retval enRet
**
******************************************************************************/
en_result_t Lcd_GetSegCom(stc_lcd_segcompara_t *pstcSegComPara,stc_lcd_segcom_t *pstcSegCom)
{
en_result_t enRet = Error;
pstcSegCom->stc_seg32_51_com0_8_t.seg32_51_com0_8 = 0xffffffffu;
pstcSegCom->u32Seg0_31 = 0xffffffffu;
if(pstcSegComPara->u8MaxSeg>51)
{
return ErrorInvalidParameter;
}
switch(pstcSegComPara->LcdBiasSrc)
{
case LcdInResHighPower:
case LcdInResLowPower:
case LcdInResMidPower:
pstcSegCom->stc_seg32_51_com0_8_t.segcom_bit.Mux = 1;
break;
case LcdExtCap:
case LcdExtRes:
pstcSegCom->stc_seg32_51_com0_8_t.segcom_bit.Mux = 0;
pstcSegCom->stc_seg32_51_com0_8_t.segcom_bit.Seg32_35 = 0;
break;
default:
return ErrorInvalidParameter;
}
switch(pstcSegComPara->LcdDuty)
{
case LcdStatic:
pstcSegCom->stc_seg32_51_com0_8_t.segcom_bit.Com0_3 = (~1u)&0x0fu;
break;
case LcdDuty2:
pstcSegCom->stc_seg32_51_com0_8_t.segcom_bit.Com0_3 = (~3u)&0x0fu;
break;
case LcdDuty3:
pstcSegCom->stc_seg32_51_com0_8_t.segcom_bit.Com0_3 = (~7u)&0x0fu;
break;
case LcdDuty4:
pstcSegCom->stc_seg32_51_com0_8_t.segcom_bit.Com0_3 = (~15u)&0x0fu;
break;
case LcdDuty6:
pstcSegCom->stc_seg32_51_com0_8_t.segcom_bit.Com0_3 = 0;
pstcSegCom->stc_seg32_51_com0_8_t.segcom_bit.Seg39Com4 = 0;
pstcSegCom->stc_seg32_51_com0_8_t.segcom_bit.Seg38Com5 = 0;
pstcSegCom->stc_seg32_51_com0_8_t.segcom_bit.Seg37Com6 = 1;
pstcSegCom->stc_seg32_51_com0_8_t.segcom_bit.Seg36Com7 = 1;
break;
case LcdDuty8:
pstcSegCom->stc_seg32_51_com0_8_t.segcom_bit.Com0_3 = 0;
pstcSegCom->stc_seg32_51_com0_8_t.segcom_bit.Seg39Com4 = 0;
pstcSegCom->stc_seg32_51_com0_8_t.segcom_bit.Seg38Com5 = 0;
pstcSegCom->stc_seg32_51_com0_8_t.segcom_bit.Seg37Com6 = 0;
pstcSegCom->stc_seg32_51_com0_8_t.segcom_bit.Seg36Com7 = 0;
break;
default:
return ErrorInvalidParameter;
}
enRet = Ok;
return enRet;
}
/**
******************************************************************************
** \brief LCD COMSEG使使Seg
**
** \param [in] pstcSegCom
**
** \retval enRet
**
******************************************************************************/
void Lcd_SetSegCom(stc_lcd_segcom_t *pstcSegCom)
{
M0P_LCD->POEN0 = pstcSegCom->u32Seg0_31;
M0P_LCD->POEN1 = pstcSegCom->stc_seg32_51_com0_8_t.seg32_51_com0_8;
M0P_LCD->POEN1_f.COMMUX = TRUE;
}
/**
******************************************************************************
** \brief LCD
**
** \param stcLcdCfg
**
** \retval
**
******************************************************************************/
void Lcd_Init(stc_lcd_cfg_t *pstcLcdCfg)
{
M0P_LCD->CR0_f.BSEL = pstcLcdCfg->LcdBiasSrc;
M0P_LCD->CR0_f.DUTY = pstcLcdCfg->LcdDuty;
M0P_LCD->CR0_f.BIAS = pstcLcdCfg->LcdBias;
M0P_LCD->CR0_f.CPCLK = pstcLcdCfg->LcdCpClk;
M0P_LCD->CR0_f.LCDCLK = pstcLcdCfg->LcdScanClk;
M0P_LCD->CR1_f.MODE = pstcLcdCfg->LcdMode;
M0P_LCD->CR1_f.CLKSRC = pstcLcdCfg->LcdClkSrc;
M0P_LCD->CR0_f.EN = pstcLcdCfg->LcdEn;
}
/**
******************************************************************************
** \brief
**
** \param
**
** \retval
**
******************************************************************************/
void Lcd_FullDisp(void)
{
uint8_t tmp;
volatile uint32_t *ram = NULL;
ram = &M0P_LCD->RAM0;
for(tmp=0;tmp<16;tmp++)
{
*ram = 0xffffffffu;
ram++;
}
}
/**
******************************************************************************
** \brief
**
** \param
**
** \retval
**
******************************************************************************/
void Lcd_ClearDisp(void)
{
uint8_t tmp;
volatile uint32_t *ram = NULL;
ram = &M0P_LCD->RAM0;
for(tmp=0;tmp<16;tmp++)
{
*ram = 0;
ram++;
}
}
/**
******************************************************************************
** \brief LCD RAM 0-f
**
** \param u8Row RAM0-15u8Data
**
** \retval enRet
**
******************************************************************************/
en_result_t Lcd_WriteRam(uint8_t u8Row,uint32_t u32Data)
{
en_result_t enRet = Error;
volatile uint32_t *ram = NULL;
ram = (volatile uint32_t*)&M0P_LCD->RAM0;
if (u8Row > 15)
{
enRet = ErrorInvalidParameter;
return enRet;
}
ram += u8Row;
*ram = u32Data;
enRet = Ok;
return enRet;
}
/******************************************************************************
* EOF (not truncated)
******************************************************************************/

View File

@ -0,0 +1,122 @@
/******************************************************************************
*Copyright(C)2017, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/** \file lpm.c
**
** Common API of lpm.
** @link LpmGroup Some description @endlink
**
** - 2017-06-06
**
******************************************************************************/
/*******************************************************************************
* Include files
******************************************************************************/
#include "lpm.h"
/**
*******************************************************************************
** \addtogroup LpmGroup
******************************************************************************/
//@{
/*******************************************************************************
* Local pre-processor symbols/macros ('#define')
******************************************************************************/
/*******************************************************************************
* Global variable definitions (declared in header file with 'extern')
******************************************************************************/
/*******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/*******************************************************************************
* Local variable definitions ('static')
******************************************************************************/
/*******************************************************************************
* Local function prototypes ('static')
******************************************************************************/
/*******************************************************************************
* Function implementation - global ('extern') and local ('static')
******************************************************************************/
/**
*****************************************************************************
** \brief
**
** \input bOnExit - TRUE:退
** FALSE
**
** \retval NULL
*****************************************************************************/
void Lpm_GotoDeepSleep(boolean_t bOnExit)
{
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
SCB->SCR |= 1u<<bOnExit;
__WFI();
}
/**
*****************************************************************************
** \brief
**
** \input bOnExit - TRUE:退
** FALSE
**
** \retval NULL
*****************************************************************************/
void Lpm_GotoSleep(boolean_t bOnExit)
{
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
SCB->SCR |= 1u<<bOnExit;
__WFI();
}
//@} // LpmGroup
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

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@ -0,0 +1,171 @@
/******************************************************************************
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file lptim.c
**
** lptim driver API.
** @link pcnt Group Some description @endlink
**
** - 2019-04-09 First Version
**
******************************************************************************/
/******************************************************************************
* Include files
******************************************************************************/
#include "lptim.h"
/**
******************************************************************************
** \addtogroup PCNTGroup
******************************************************************************/
//@{
/******************************************************************************
* Local pre-processor symbols/macros ('#define')
******************************************************************************/
/******************************************************************************
* Global variable definitions (declared in header file with 'extern')
******************************************************************************/
/******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/******************************************************************************
* Local function prototypes ('static')
******************************************************************************/
/******************************************************************************
* Local variable definitions ('static')
******************************************************************************/
/**
******************************************************************************
** \brief LPTIMx使
** @param Lptimx : LPTIM0 LPTIM1
** @param NewStatus : TRUE FALSE
** \retval
**
******************************************************************************/
void Lptim_ConfIt(M0P_LPTIMER_TypeDef* Lptimx, boolean_t NewStatus)
{
SetBit((uint32_t)(&(Lptimx->CR)), 10, NewStatus);
}
/**
******************************************************************************
** \brief LPTIMx/
** @param Lptimx : LPTIM0 LPTIM1
** @param NewStatus : TRUE FALSE
** \retval
**
******************************************************************************/
void Lptim_Cmd(M0P_LPTIMER_TypeDef* Lptimx, boolean_t NewStatus)
{
SetBit((uint32_t)(&(Lptimx->CR)), 0, NewStatus);
}
/**
******************************************************************************
** \brief LPTIMx
** @param Lptimx : LPTIM0 LPTIM1
** \retval TRUE FALSE
**
******************************************************************************/
boolean_t Lptim_GetItStatus(M0P_LPTIMER_TypeDef* Lptimx)
{
return GetBit((uint32_t)(&(Lptimx->IFR)), 0);
}
/**
******************************************************************************
** \brief LPTIMx
** @param Lptimx : LPTIM0 LPTIM1
** \retval
**
******************************************************************************/
void Lptim_ClrItStatus(M0P_LPTIMER_TypeDef* Lptimx)
{
SetBit((uint32_t)(&(Lptimx->ICLR)), 0, 0);
}
/**
******************************************************************************
** \brief LPTIMx
** @param Lptimx : LPTIM0 LPTIM1
** @param InitStruct : LPTIMx
** \retval en_result_t
**
******************************************************************************/
en_result_t Lptim_Init(M0P_LPTIMER_TypeDef* Lptimx, stc_lptim_cfg_t* InitStruct)
{
uint16_t u16TimeOut;
u16TimeOut = 1000;
Lptimx->CR_f.PRS = InitStruct->enPrs;
Lptimx->CR_f.TCK_SEL = InitStruct->enTcksel;
Lptimx->CR_f.GATE_P = InitStruct->enGatep;
Lptimx->CR_f.GATE = InitStruct->enGate;
Lptimx->CR_f.TOG_EN = InitStruct->enTogen;
Lptimx->CR_f.CT = InitStruct->enCt;
Lptimx->CR_f.MD = InitStruct->enMd;
while(u16TimeOut--)
{
if(Lptimx->CR_f.WT_FLAG)
{
break;
}
}
if(u16TimeOut == 0)
{
return ErrorTimeout;
}
Lptimx->ARR_f.ARR = InitStruct->u16Arr;
return Ok;
}
/******************************************************************************
* EOF (not truncated)
******************************************************************************/

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@ -0,0 +1,409 @@
/*************************************************************************************
* Copyright (C) 2017, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file lpuart.c
**
** LPUART function driver API.
** @link SampleGroup Some description @endlink
**
** - 2017-05-17 1.0 CJ First version for Device Driver Library of Module.
**
******************************************************************************/
/******************************************************************************/
/* Include files */
/******************************************************************************/
#include "lpuart.h"
/**
******************************************************************************
** \addtogroup LPUartGroup
******************************************************************************/
//@{
/******************************************************************************/
/* Local pre-processor symbols/macros ('#define') */
/******************************************************************************/
/******************************************************************************/
/* Local function prototypes ('static') */
/******************************************************************************/
/******************************************************************************/
/* Local variable definitions ('static') */
/******************************************************************************/
/**
******************************************************************************
** \brief LPUART使
**
** \param [in] LPUARTxenIrqSelor使
**
** \retval OK
**\retval ErrorInvalidParameter
******************************************************************************/
en_result_t LPUart_EnableIrq(M0P_LPUART_TypeDef* LPUARTx, en_lpuart_irq_sel_t enIrqSel)
{
SetBit((uint32_t)(&(LPUARTx->SCON)), enIrqSel, TRUE);
return Ok;
}
/**
******************************************************************************
** \brief LPUART
**
** \param [in] LPUARTxenIrqSelor
**
** \retval OK
**\retval ErrorInvalidParameter
******************************************************************************/
en_result_t LPUart_DisableIrq(M0P_LPUART_TypeDef* LPUARTx, en_lpuart_irq_sel_t enIrqSel)
{
SetBit((uint32_t)(&(LPUARTx->SCON)), enIrqSel, FALSE);
return Ok;
}
/**
******************************************************************************
** \brief lpuart
**
** \param [in] LPUARTxenClk
**
** \retval Ok
**\retval ErrorInvalidParameter
******************************************************************************/
en_result_t LPUart_SelSclk(M0P_LPUART_TypeDef* LPUARTx, en_lpuart_sclksel_t enSclk)
{
ASSERT(IS_VALID_CLK(enSclk));
LPUARTx->SCON_f.SCLKSEL = enSclk;
return Ok;
}
/**
******************************************************************************
** \brief LPUART
**
** \param [in] LPUARTxstcMultiCfg
**
** \retval OK
**\retval ErrorInvalidParameter
******************************************************************************/
en_result_t LPUart_SetMultiMode(M0P_LPUART_TypeDef* LPUARTx, stc_lpuart_multimode_t* pstcMultiCfg)
{
if(NULL != pstcMultiCfg)
{
LPUARTx->SCON_f.ADRDET = TRUE;
LPUARTx->SADDR = pstcMultiCfg->u8SlaveAddr;
LPUARTx->SADEN = pstcMultiCfg->u8SaddEn;
}
else
{
return ErrorInvalidParameter;
}
return Ok;
}
/**
******************************************************************************
** \brief LPUART线使
**
** \param [in] LPUARTx
**
** \retval Null
******************************************************************************/
void LPUart_HdModeEnable(M0P_LPUART_TypeDef* LPUARTx)
{
LPUARTx->SCON_f.HDSEL = TRUE;
}
/**
******************************************************************************
** \brief LPUART线
**
** \param [in] LPUARTx
**
** \retval Null
******************************************************************************/
void LPUart_HdModeDisable(M0P_LPUART_TypeDef* LPUARTx)
{
LPUARTx->SCON_f.HDSEL = FALSE;
}
/**
******************************************************************************
** \brief LPUART/TB8
**
** \param [in] LPUARTx
** \param [in] TRUE-TB8FALSE-TB8
**
** \retval Null
******************************************************************************/
void LPUart_SetTb8(M0P_LPUART_TypeDef* LPUARTx, boolean_t bTB8Value)
{
LPUARTx->SCON_f.B8CONT = bTB8Value;
}
/**
******************************************************************************
** \brief RB8
**
** \param [in] LPUARTx
**
** \retval RB8
**\retval ErrorInvalidParameter
******************************************************************************/
boolean_t LPUart_GetRb8(M0P_LPUART_TypeDef* LPUARTx)
{
return (LPUARTx->SBUF_f.DATA8);
}
/**
******************************************************************************
** \brief LPUART
**
** \param [in] LPUARTx addr
**
** \retval OK
**\retval ErrorInvalidParameter
******************************************************************************/
en_result_t LPUart_SetSaddr(M0P_LPUART_TypeDef* LPUARTx,uint8_t u8Addr)
{
LPUARTx->SADDR = u8Addr;
return Ok;
}
/**
******************************************************************************
** \brief LPUART使
**
** \param [in] u8IdxenFunc
**
** \retval OK
**\retval ErrorInvalidParameter
******************************************************************************/
en_result_t LPUart_EnableFunc(M0P_LPUART_TypeDef* LPUARTx, en_lpuart_func_t enFunc)
{
SetBit((uint32_t)(&(LPUARTx->SCON)), enFunc, TRUE);
return Ok;
}
/**
******************************************************************************
** \brief LPUART
**
** \param [in] u8IdxenFunc
**
** \retval OK
**\retval ErrorInvalidParameter
******************************************************************************/
en_result_t LPUart_DisableFunc(M0P_LPUART_TypeDef* LPUARTx, en_lpuart_func_t enFunc)
{
SetBit((uint32_t)(&(LPUARTx->SCON)), enFunc, FALSE);
return Ok;
}
/**
******************************************************************************
** \brief LPUART
**
** \param [in] u8Idx
**
** \retval
******************************************************************************/
uint8_t LPUart_GetIsr(M0P_LPUART_TypeDef* LPUARTx)
{
return (LPUARTx->ISR);
}
/**
******************************************************************************
** \brief LPUART
**
** \param [in] u8IdxenStatus
**
** \retval
**\retval ErrorInvalidParameter
******************************************************************************/
boolean_t LPUart_GetStatus(M0P_LPUART_TypeDef* LPUARTx,en_lpuart_status_t enStatus)
{
boolean_t bStatus = FALSE;
ASSERT(IS_VALID_STATUS(enStatus));
bStatus = GetBit((uint32_t)(&(LPUARTx->ISR)), enStatus);
return bStatus;
}
/**
******************************************************************************
** \brief LPUART
**
** \param [in] u8Idx
**
** \retval OK
******************************************************************************/
en_result_t LPUart_ClrIsr(M0P_LPUART_TypeDef* LPUARTx)
{
LPUARTx->ICR = 0u;
return Ok;
}
/**
******************************************************************************
** \brief LPUART
**
** \param [in] u8IdxenStatus
**
** \retval
**\retval ErrorInvalidParameter
******************************************************************************/
en_result_t LPUart_ClrStatus(M0P_LPUART_TypeDef* LPUARTx,en_lpuart_status_t enStatus)
{
ASSERT(IS_VALID_STATUS(enStatus));
SetBit((uint32_t)(&(LPUARTx->ICR)), enStatus, FALSE);
return Ok;
}
/**
******************************************************************************
** \brief LPUART,
**
** \param [in] u8IdxData
**
** \retval Ok
**\retval ErrorInvalidParameter
******************************************************************************/
en_result_t LPUart_SendData(M0P_LPUART_TypeDef* LPUARTx, uint8_t u8Data)
{
while(FALSE == LPUart_GetStatus(LPUARTx,LPUartTxe))
{}
LPUARTx->SBUF_f.DATA = u8Data;
while(FALSE == LPUart_GetStatus(LPUARTx,LPUartTC))
{}
LPUart_ClrStatus(LPUARTx,LPUartTC);
return Ok;
}
/**
******************************************************************************
** \brief LPUART,
**
** \param [in] u8IdxData
**
** \retval Ok
**\retval ErrorInvalidParameter
******************************************************************************/
en_result_t LPUart_SendDataIt(M0P_LPUART_TypeDef* LPUARTx, uint8_t u8Data)
{
LPUARTx->SBUF_f.DATA = u8Data;
return Ok;
}
/**
******************************************************************************
** \brief LPUART
**
** \param [in] u8Idx
**
** \retval
**\retval ErrorInvalidParameter
******************************************************************************/
uint8_t LPUart_ReceiveData(M0P_LPUART_TypeDef* LPUARTx)
{
return (LPUARTx->SBUF_f.DATA);
}
/**
******************************************************************************
** \brief LPUART
**
** \param [in] u8IdxpstcCfg @ref stc_lpuart_cfg_t
**
** \retval OK
**\retval ErrorInvalidParameter
******************************************************************************/
en_result_t LPUart_Init(M0P_LPUART_TypeDef* LPUARTx,stc_lpuart_cfg_t* pstcCfg)
{
en_result_t enRet = Error;
const uint32_t u32Over[3] = {0x4, 0x3, 0x2};
uint16_t u16OverShift;
float32_t f32Scnt=0;
if(NULL == pstcCfg)
{
return ErrorInvalidParameter;
}
LPUARTx->SCON = 0;
LPUARTx->SCON = (uint32_t)pstcCfg->enStopBit |
(uint32_t)pstcCfg->enMmdorCk |
(uint32_t)pstcCfg->stcBaud.enSclkDiv |
(uint32_t)pstcCfg->stcBaud.enSclkSel |
(uint32_t)pstcCfg->enRunMode;
if((LPUartMskMode1 == pstcCfg->enRunMode) || (LPUartMskMode3 == pstcCfg->enRunMode))
{
u16OverShift = u32Over[pstcCfg->stcBaud.enSclkDiv/LPUartMsk8Or16Div];
f32Scnt = (float32_t)(pstcCfg->stcBaud.u32Sclk)/(float32_t)(pstcCfg->stcBaud.u32Baud<<u16OverShift);
LPUARTx->SCNT = (uint16_t)(float32_t)(f32Scnt + 0.5f);
LPUart_EnableFunc(LPUARTx,LPUartRenFunc); ///<使能收发
}
enRet = Ok;
return enRet;
}
//@} // LPUartGroup

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